公开(公告)号：US06515335B1

公开(公告)日：2003-02-04

申请号：US10037611

申请日：2002-01-04

申请人： Silke H. Christiansen ,  Alfred Grill ,  Patricia M. Mooney

发明人： Silke H. Christiansen ,  Alfred Grill ,  Patricia M. Mooney

IPC分类号： H01L31392

CPC分类号： H01L21/76251 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02631 ,  H01L21/324 ,  H01L21/76243

摘要： A method of fabricating relaxed SiGe buffer layers with low threading dislocation densities on silicon-on-insulator (SOI) substrates is provided. The relaxed SiGe buffer layers are fabricated by the epitaxial deposition of a defect-free Stranski-Krastanov Ge or SiGe islands on a surface of the SOI substrate; the capping and planarizing of the islands with a Si or Si-rich SiGe layer, and the annealing of the structure at elevated temperatures until intermixing and thereby formation of a relaxed SiGe layer on the insulating layer (i.e., buried oxide layer) of the initial SOI wafer is achieved. The present invention is also directed to semiconductor structures, devices and integrated circuits which include at least the relaxed SiGe buffer layer mentioned above.

摘要翻译： 提供了一种在绝缘体上硅（SOI）衬底上制造具有低穿透位错密度的弛豫SiGe缓冲层的方法。 通过在SOI衬底的表面上外延沉积无缺陷的Stranski-Krastanov Ge或SiGe岛来制造弛豫的SiGe缓冲层; 用Si或Si富SiGe层对岛进行封盖和平面化，以及在升高的温度下对结构进行退火，直到混合，从而在初始的绝缘层（即，掩埋氧化物层）上形成松弛的SiGe层 实现了SOI晶片。 本发明还涉及至少包括上述松弛的SiGe缓冲层的半导体结构，器件和集成电路。

公开(公告)号：US06428894B1

公开(公告)日：2002-08-06

申请号：US08868772

申请日：1997-06-04

申请人： Katherina E. Babich ,  Alessandro Cesare Callegari ,  Julien Fontaine ,  Alfred Grill ,  Christopher V. Jahnes ,  Vishnubhai Vitthalbhai Patel

发明人： Katherina E. Babich ,  Alessandro Cesare Callegari ,  Julien Fontaine ,  Alfred Grill ,  Christopher V. Jahnes ,  Vishnubhai Vitthalbhai Patel

IPC分类号： B32B900

CPC分类号： H01L21/02274 ,  C23C16/26 ,  C23C16/30 ,  G03F7/091 ,  H01L21/02115 ,  H01L21/02271 ,  H01L21/0276 ,  H01L21/31144 ,  H01L21/312 ,  H01L21/3127 ,  Y10T428/24942 ,  Y10T428/24975 ,  Y10T428/265 ,  Y10T428/30

摘要： Disclosed is vapor deposited BARC and method of preparing tunable and removable antireflective coatings based on amorphous carbon films. These films can be hydrogenated, fluorinated, nitrogenated carbon films. Such films have an index of refraction and an extinction coefficient tunable from about 1.4 to about 2.1 and from about 0.1 to about 0.6, respectively, at UV and DUV wavelengths, in particular 365, 248 and 193 nm. Moreover, the films produced by the present invention can be deposited over device topography with high conformality, and they are etchable by oxygen and/or a fluoride ion etch process. Because of their unique properties, these films can be used to form a tunable and removable antireflective coating at UV and DUV wavelengths to produce near zero reflectance at the resist/BARC coating interface. This BARC greatly improves performance of semiconductor chips.

摘要翻译： 公开了蒸汽沉积的BARC和基于无定形碳膜制备可调谐和可去除的抗反射涂层的方法。 这些膜可以是氢化，氟化，氮化的碳膜。 这些膜的折射率和消光系数分别在UV和DUV波长，特别是365,248和193nm处可调，分别为约1.4至约2.1和约0.1至约0.6。 此外，由本发明生产的膜可以以高共形性沉积在器件形貌上，并且它们可通过氧和/或氟离子蚀刻工艺进行蚀刻。 由于其独特的性质，这些膜可用于在UV和DUV波长处形成可调谐和可去除的抗反射涂层，以在抗蚀剂/ BARC涂层界面处产生接近零的反射率。 该BARC大大提高了半导体芯片的性能。

公开(公告)号：US06346747B1

公开(公告)日：2002-02-12

申请号：US09329004

申请日：1999-06-09

申请人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel

发明人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel

IPC分类号： H01L2348

CPC分类号： C23C16/5096 ,  C23C16/26 ,  C23C16/56 ,  H01L21/3146 ,  Y10S427/103 ,  Y10S427/104

摘要： A method for fabricating a thermally stable carbon-based low dielectric constant film such as a hydrogenated amorphous carbon film or a diamond-like carbon film in a parallel plate chemical vapor deposition process utilizing plasma enhanced chemical vapor deposition process is disclosed. Electronic devices containing insulating layers of thermally stable carbon-based low dielectric constant materials that are prepared by the method are further disclosed. In order to render the carbon-based low dielectric constant film thermally stable, i.e., at a temperature of at least 400° C., the films are heat treated at a temperature of not less than 350° C. for at least 0.5 hour. To enable the fabrication of thermally stable carbon-based low dielectric constant film, specific precursor materials such as cyclic hydrocarbons should be used, for instance, cyclohexane or benzene. The geometry of the chemical vapor deposition chamber is important in making the present invention thermally stable low dielectric constant films in order to achieve a specific bias voltage on the substrate onto which the electronic structure is formed.

摘要翻译： 公开了一种利用等离子体增强化学气相沉积工艺在平行板化学气相沉积工艺中制造热稳定性碳基低介电常数膜的方法，例如氢化无定形碳膜或类金刚石碳膜。 还公开了通过该方法制备的含有热稳定性碳基低介电常数材料绝缘层的电子器件。 为了使碳基低介电常数膜热稳定，即在至少400℃的温度下，将膜在不低于350℃的温度下热处理至少0.5小时。 为了制造热稳定性的碳系低介电常数膜，可以使用环状烃等环状烃等特定的前体材料。 化学气相沉积室的几何形状对于使本发明热稳定的低介电常数膜是重要的，以便在其上形成电子结构的基板上实现特定的偏置电压。

公开(公告)号：US06316167B1

公开(公告)日：2001-11-13

申请号：US09480442

申请日：2000-01-10

申请人： Marie Angelopoulos ,  Katherina Babich ,  Alfred Grill ,  Scott David Halle ,  Arpan Pravin Mahorowala ,  Vishnubhai Vitthalbhai Patel

发明人： Marie Angelopoulos ,  Katherina Babich ,  Alfred Grill ,  Scott David Halle ,  Arpan Pravin Mahorowala ,  Vishnubhai Vitthalbhai Patel

IPC分类号： G03F726

CPC分类号： H01L21/3122 ,  C23C16/30 ,  C23C16/32 ,  C23C16/325 ,  G03F7/091 ,  H01L21/02112 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0276 ,  H01L21/31144 ,  H01L21/31633 ,  H01L21/76832 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： A lithographic structure and method of fabrication and use thereof having a plurality of layers at least one of which is a an RCHX layer which comprises a material having structural formula R:C:H:X, wherein R is selected from the group consisting of Si, Ge, B, Sn, Fe, Ti and combinations thereof and wherein X is not present or is selected from the group consisting of one or more of O, N, S, and F and a layer of an energy active material. The RCHX layers are useful as hardmask layers, anti-reflection layers and hardmask anti-reflection layers. The RCHX layer can be vapor-deposited and patterned by patterning the energy active material and transferring the pattern to the RCHX layer.

摘要翻译： 一种光刻结构及其制造方法，其具有多个层，其中至少一层是包含具有结构式R：C：H：X的材料的RCHX层，其中R选自Si ，Ge，B，Sn，Fe，Ti及其组合，其中X不存在或选自O，N，S和F中的一种或多种，​​以及能量活性材料层。 RCHX层可用作硬掩模层，防反射层和硬掩模抗反射层。 可以通过图案化能量活性材料并将图案转移到RCHX层来蒸镀和图案化RCHX层。

公开(公告)号：US6140226A

公开(公告)日：2000-10-31

申请号：US126212

申请日：1998-07-30

申请人： Alfred Grill ,  John Patrick Hummel ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

发明人： Alfred Grill ,  John Patrick Hummel ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

IPC分类号： H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76811 ,  H01L21/76813 ,  H01L2221/1063 ,  Y10S438/945

摘要： The present invention relates to lithographic methods for forming a dual relief pattern in a substrate, and the application of such methods to fabricating multilevel interconnect structures in semiconductor chips by a Dual Damascene process in which dual relief cavities formed in a dielectric are filled with conductive material to form the wiring and via levels. The invention comprises a twice patterned single mask layer Dual Damascene process modified by the addition of an easy-to-integrate sidewall liner to protect organic interlevel and intralevel dielectrics from potential damage induced by photoresist stripping steps during lithographic rework. The invention further comprises a method for forming a dual pattern hard mask which may be used to form dual relief cavities for use in Dual Damascene processing, said dual pattern hard mask comprising a first set of one or more layers with a first pattern, and a second set of one or more layers with a second pattern.

公开(公告)号：US6017814A

公开(公告)日：2000-01-25

申请号：US192133

申请日：1998-11-13

申请人： Alfred Grill ,  Katherine Lynn Saenger

发明人： Alfred Grill ,  Katherine Lynn Saenger

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/44

CPC分类号： H01L21/7682 ,  H01L23/5222 ,  H01L23/5329 ,  H01L2924/0002

摘要： A structured dielectric layer and fabrication process for separating wiring levels and wires within a level on a semiconductor chip is described incorporating a lower dielectric layer having narrow air gaps to form dielectric pillars or lines and an upper dielectric layer formed over the pillars or fine lines wherein the air gaps function to substantially reduce the effective dielectric constant of the structured layer. The invention overcomes the problem of solid dielectric layers which would have the higher dielectric constant of the solid material used.

摘要翻译： 描述了一种用于分离半导体芯片上的电平内的配线电平和电线的结构化介电层和制造工艺，其包括具有窄气隙的下介电层以形成电介质柱或线，以及形成在柱或细线上的上电介质层，其中 气隙用于大大降低结构化层的有效介电常数。 本发明克服了使用固体材料的介电常数较高的固体电介质层的问题。

公开(公告)号：US5869880A

公开(公告)日：1999-02-09

申请号：US596909

申请日：1996-03-13

申请人： Alfred Grill ,  Katherine Lynn Saenger

发明人： Alfred Grill ,  Katherine Lynn Saenger

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485

CPC分类号： H01L21/7682 ,  H01L23/5222 ,  H01L23/5329 ,  H01L2924/0002

摘要： A structured dielectric layer and fabrication process for separating wiring levels and wires within a level on a semiconductor chip is described incorporating a lower dielectric layer having narrow air gaps to form dielectric pillars or lines and an upper dielectric layer formed over the pillars or fine lines wherein the air gaps function to substantially reduce the effective dielectric constant of the structured layer. The invention overcomes the problem of solid dielectric layers which would have the higher dielectric constant of the solid material used.

公开(公告)号：US5796166A

公开(公告)日：1998-08-18

申请号：US668241

申请日：1996-06-21

申请人： Paul David Agnello ,  Cyril Cabral, Jr. ,  Alfred Grill ,  Christopher Vincent Jahnes ,  Thomas John Licata ,  Ronnen Andrew Roy

发明人： Paul David Agnello ,  Cyril Cabral, Jr. ,  Alfred Grill ,  Christopher Vincent Jahnes ,  Thomas John Licata ,  Ronnen Andrew Roy

IPC分类号： H01L21/28 ,  H01L21/46 ,  H01L21/8238 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/092 ,  H01L27/105 ,  H01L27/108 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78 ,  H01L29/94

CPC分类号： H01L21/28185 ,  H01L21/28061 ,  H01L21/28202 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/4941 ,  H01L29/4958 ,  H01L29/513 ,  H01L29/518 ,  H01L29/94

摘要： A multilayer structure having an oxygen or dopant diffusion barrier fabricated of an electrically conductive, thermally stable material of refractory metal-silicon-nitrogen which is resistant to oxidation, prevents out-diffusion of dopants from silicon and has a wide process window wherein the refractory metal is selected from Ta, W, Nb, V, Ti, Zr, Hf, Cr and Mo.

公开(公告)号：US5789320A

公开(公告)日：1998-08-04

申请号：US636456

申请日：1996-04-23

申请人： Panayotis Constantinou Andricacos ,  James Hartfiel Comfort ,  Alfred Grill ,  David Edward Kotecki ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger ,  Alejandro Gabriel Schrott

发明人： Panayotis Constantinou Andricacos ,  James Hartfiel Comfort ,  Alfred Grill ,  David Edward Kotecki ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger ,  Alejandro Gabriel Schrott

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/44

CPC分类号： H01L27/1085 ,  H01L28/60

摘要： Noble metal plating on a preexisting seed layer is used in the fabrication of electrodes for DRAM and FRAM. The plating may be spatially selective or nonselective. In the nonselective case, a blanket film is first plated and then patterned after deposition by spatially selective material removal. In the selective case, the plated deposits are either selectively grown in lithographically defined areas by a through-mask plating technique, or selectively grown as a conformal coating on the exposed regions of a preexisting electrode structure. A diamond-like carbon mask can be used in the plating process. A self-aligned process is disclosed for selectively coating insulators in a through-mask process.

摘要翻译： 用于DRAM和FRAM的电极的制造中使用预先存在的种子层上的贵金属电镀。 电镀可以是空间选择性的或非选择性的。 在非选择性情况下，首先将覆盖膜镀覆，然后通过空间选择性材料去除在沉积后进行图案化。 在选择性情况下，电镀沉积物可以通过通孔掩模技术在光刻定义的区域中选择性地生长，或者在预先存在的电极结构的暴露区域上选择性地生长为保形涂层。 在电镀工艺中可以使用类金刚石碳膜。 公开了一种自对准工艺，用于在通过掩模工艺中选择性地涂覆绝缘体。

公开(公告)号：US5302266A

公开(公告)日：1994-04-12

申请号：US951924

申请日：1992-09-25

申请人： Henry J. Grabarz ,  Alfred Grill ,  William M. Holber ,  Joseph S. Logan ,  James T. C. Yeh

发明人： Henry J. Grabarz ,  Alfred Grill ,  William M. Holber ,  Joseph S. Logan ,  James T. C. Yeh

IPC分类号： C23C14/34 ,  C23C14/04 ,  C23C14/32 ,  C23C14/35 ,  H01J37/32 ,  H01L21/285 ,  H01L21/768 ,  H05H1/18

CPC分类号： C23C14/046 ,  C23C14/32 ,  C23C14/357 ,  H01J37/32009 ,  H01J37/32623 ,  H01J37/32678 ,  H01L21/76877 ,  H01J2237/3327

摘要： An electron cyclotron resonance plasma heating apparatus system and process in which microwave energy is transmitted directly in an axial direction through an evacuated chamber to generate energetic electrons. These energetic electrons spiral around the magnetic field lines formed by the solenoid and spiral substantially parallel to the axis. A metal atom vapor source transmits the metal atom vapor into the chamber through a housing port in the chamber wall. The metal atom vapor source in the housing is out of the line of sight of the substrate. The metal atoms are ionized by the energized electrons, and these ionized metal atoms are confined to the plasma column substantially free of neutral atoms as such ionized metal approaches and contacts the substrate in said evacuated chamber. In this way, the ionized metal atoms substantially avoid contact with the wall of chamber. A sputter target of a second metal may be placed in the plane of the substrate and a bias voltage applied to the target. Atoms of the second metal are then sputtered off and ionized by the plasma and are deposited on the substrate with the first metal ions.

摘要翻译： 电子回旋共振等离子体加热装置系统和微波能量通过真空室沿轴向直接传递以产生高能电子的过程。 这些高能电子围绕由螺线管形成的磁场线与螺旋线基本平行。 金属原子蒸汽源通过室壁中的壳体端口将金属原子蒸气传输到室中。 壳体中的金属原子蒸汽源不在衬底的视线之内。 金属原子被激发电子电离，这些离子化的金属原子被限制在基本上不含中性原子的等离子体柱上，因为这样的电离金属靠近并接触所述真空室中的衬底。 以这种方式，电离金属原子基本上避免与室的壁接触。 可以将第二金属的溅射靶放置在基板的平面中，并将偏置电压施加到靶。 然后将第二金属的原子溅射并通过等离子体离子化，并用第一金属离子沉积在基底上。