公开(公告)号：US10177112B2

公开(公告)日：2019-01-08

申请号：US15422674

申请日：2017-02-02

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Edward Fuergut ,  Georg Meyer-Berg

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/498

Abstract: A method of manufacturing a package which comprises encapsulating at least part of an electronic chip by an encapsulant, subsequently covering a part of the electronic chip with a chip attach medium, and attaching the encapsulated electronic chip on a chip carrier via the chip attach medium.

公开(公告)号：US20180315744A1

公开(公告)日：2018-11-01

申请号：US15965230

申请日：2018-04-27

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Guenther Kolmeder

IPC: H01L27/02 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L23/495 ,  H01L23/00 ,  H01L23/367

CPC classification number: H01L21/77 ,  H01L27/04 ,  H01L29/06 ,  H01L29/78

Abstract: A power semiconductor device includes a power transistor arranged in a power device region of a semiconductor substrate. The power semiconductor device further includes a first circuit arranged in a first circuit region of the semiconductor substrate. The power semiconductor device further includes a second circuit arranged in a second circuit region of the semiconductor substrate. The first circuit region is arranged at a first edge of the semiconductor substrate. The second circuit region is arranged at a second edge of the semiconductor substrate. The power device region is arranged between the first circuit region and the second circuit region.

公开(公告)号：US10049962B2

公开(公告)日：2018-08-14

申请号：US15171364

申请日：2016-06-02

Applicant: Infineon Technologies AG

Inventor： Georg Meyer-Berg ,  Edward Fuergut ,  Joachim Mahler

IPC: H01L23/13 ,  H01L23/04 ,  H01L23/538 ,  H01L25/065 ,  H01L23/44 ,  H01L25/07 ,  H05K7/20 ,  H05K7/08 ,  H05K7/10 ,  H05K7/02 ,  H01L23/00

Abstract: A semiconductor power arrangement includes a chip carrier having a first surface and a second surface opposite the first surface. The semiconductor power arrangement further includes a plurality of power semiconductor chips attached to the chip carrier, wherein the power semiconductor chips are inclined to the first and/or second surface of the chip carrier.

公开(公告)号：US20170338169A1

公开(公告)日：2017-11-23

申请号：US15600857

申请日：2017-05-22

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Michael Bauer ,  Jochen Dangelmaier ,  Reimund Engl ,  Johann Gatterbauer ,  Frank Hille ,  Michael Huettinger ,  Werner Kanert ,  Heinrich Koerner ,  Brigitte Ruehle ,  Francisco Javier Santos Rodriguez ,  Antonio Vellei

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/29 ,  H01L21/02 ,  H01L23/00

CPC classification number: H01L24/48 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02288 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49582 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/0346 ,  H01L2224/03826 ,  H01L2224/03827 ,  H01L2224/03831 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/45573 ,  H01L2224/45611 ,  H01L2224/45618 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/45649 ,  H01L2224/45655 ,  H01L2224/45657 ,  H01L2224/45664 ,  H01L2224/45666 ,  H01L2224/4567 ,  H01L2224/45671 ,  H01L2224/45672 ,  H01L2224/4568 ,  H01L2224/45686 ,  H01L2224/4569 ,  H01L2224/45693 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/4813 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48507 ,  H01L2224/73265 ,  H01L2224/85205 ,  H01L2224/85375 ,  H01L2224/85801 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/0132 ,  H01L2924/10253 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2924/01046 ,  H01L2224/45669 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01056 ,  H01L2924/00 ,  H01L2224/43848

Abstract: In various embodiments, a chip package is provided. The chip package may include a chip, a metal contact structure including a non-noble metal and electrically contacting the chip, a packaging material, and a protective layer including or essentially consisting of a portion formed at an interface between a portion of the metal contact structure and the packaging material, wherein the protective layer may include a noble metal, wherein the portion of the protective layer may include a plurality of regions free from the noble metal, and wherein the regions free from the noble metal may provide an interface between the packaging material and the non-noble metal of the metal contact structure.

公开(公告)号：US09793255B2

公开(公告)日：2017-10-17

申请号：US14595669

申请日：2015-01-13

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Ralf Otremba ,  Hans-Joachim Schulze ,  Guenther Ruhl ,  Hans-Joerg Timme

IPC: H01L29/06 ,  H01L27/02 ,  H01L27/088 ,  H01L27/06 ,  H01L23/427 ,  H01L23/367 ,  H01L29/49 ,  H01L29/78 ,  H01L23/525 ,  H01L29/861 ,  H01L29/739

CPC classification number: H01L27/0248 ,  H01L23/3677 ,  H01L23/4275 ,  H01L23/525 ,  H01L27/0676 ,  H01L27/088 ,  H01L29/49 ,  H01L29/4983 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/8611 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power semiconductor device includes a wiring structure adjoining at least one side of a semiconductor body and comprising at least one electrically conductive compound. The power semiconductor device further includes a cooling material in the wiring structure. The cooling material is characterized by a change in structure by means of absorption of energy at a temperature TC ranging between 150° C. and 400° C.

公开(公告)号：US09673170B2

公开(公告)日：2017-06-06

申请号：US14451868

申请日：2014-08-05

Applicant: Infineon Technologies AG

Inventor： Rupert Fischer ,  Peter Strobel ,  Joachim Mahler ,  Konrad Roesl ,  Alexander Heinrich

IPC: H01L21/68 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18 ,  H01L21/683 ,  H01L23/495 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L24/97 ,  H01L21/6835 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/49575 ,  H01L24/83 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L2221/68354 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/04026 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/06181 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/40227 ,  H01L2224/40247 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/8381 ,  H01L2224/8382 ,  H01L2224/83851 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/95001 ,  H01L2224/95091 ,  H01L2224/97 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/84 ,  H01L2224/27 ,  H01L2924/014 ,  H01L2224/03 ,  H01L2924/00

Abstract: Methods for connecting chips to a chip carrier are disclosed. In some embodiments the method for connecting a plurality of chips to a chip carrier includes placing first chips on a transfer carrier, placing second chips on the transfer carrier, placing the transfer carrier with the first and second chips on the chip carrier and forming connections between the first chips and the chip carrier and the second chips and the chip carrier.

公开(公告)号：US09666499B2

公开(公告)日：2017-05-30

申请号：US13664418

申请日：2012-10-31

Applicant: Infineon Technologies AG

Inventor： Joachim Mahler ,  Edward Fuergut ,  Khalil Hosseini ,  Georg Meyer-Berg

IPC: H01L23/29 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/291 ,  H01L21/561 ,  H01L21/568 ,  H01L23/296 ,  H01L23/562 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Described are techniques related to semiconductor devices that make use of encapsulant. In one implementation, a semiconductor device may be manufactured to include at least an encapsulant that includes at least glass particles.

公开(公告)号：US09567211B2

公开(公告)日：2017-02-14

申请号：US14687835

申请日：2015-04-15

Applicant: Infineon Technologies AG

Inventor： Franz-Peter Kalz ,  Horst Theuss ,  Bernhard Winkler ,  Khalil Hosseini ,  Joachim Mahler ,  Manfred Mengel

IPC: G01B7/16 ,  B81B7/02 ,  G01L9/00 ,  G01L19/02 ,  G01L19/00 ,  B81B3/00 ,  G01L1/18

CPC classification number: B81B7/02 ,  B81B3/0021 ,  B81B3/0072 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81C2203/0154 ,  G01L1/18 ,  G01L9/0072 ,  G01L19/0092 ,  G01L19/02

Abstract: Micromechanical semiconductor sensing device comprises a micromechanical sensing structure being configured to yield an electrical sensing signal, and a piezoresistive sensing device provided in the micromechanical sensing structure, said piezoresistive sensing device being arranged to sense a mechanical stress disturbing the electrical sensing signal and being configured to yield an electrical disturbance signal based on the sensed mechanical stress disturbing the electrical sensing signal.

Abstract translation: 微机械半导体感测装置包括被配置为产生电感测信号的微机械感测结构和设置在微机械感测结构中的压阻感测装置，所述压阻感测装置被布置成感测扰动电感测信号的机械应力，并被配置为 基于感测到的电感测信号的机械应力产生电干扰信号。

公开(公告)号：US20170004979A1

公开(公告)日：2017-01-05

申请号：US15268674

申请日：2016-09-19

Applicant: Infineon Technologies AG

Inventor： Manfred Mengel ,  Joachim Mahler ,  Khalil Hosseini ,  Franz-Peter Kalz

IPC: H01L21/48 ,  H01L25/00 ,  H01L21/56

CPC classification number: H01L21/4807 ,  H01L21/4825 ,  H01L21/56 ,  H01L21/77 ,  H01L23/3731 ,  H01L23/3735 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49586 ,  H01L24/27 ,  H01L24/743 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2924/07802 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A chip arrangement is provided, the chip arrangement, including a carrier; a first chip electrically connected to the carrier; a ceramic layer disposed over the carrier; and a second chip disposed over the ceramic layer; wherein the ceramic layer has a porosity in the range from about 3% to about 70%.

Abstract translation: 提供了芯片布置，芯片布置包括载体; 电连接到所述载体的第一芯片; 布置在所述载体上的陶瓷层; 以及设置在所述陶瓷层上的第二芯片; 其中所述陶瓷层的孔隙率在约3％至约70％的范围内。

公开(公告)号：US20170003180A1

公开(公告)日：2017-01-05

申请号：US15268244

申请日：2016-09-16

Applicant: Infineon Technologies AG

Inventor： Franz-Peter Kalz ,  Horst Theuss ,  Bernhard Winkler ,  Khalil Hosseini ,  Joachim Mahler ,  Manfred Mengel

IPC: G01L1/18 ,  G01L19/02 ,  B81B3/00

CPC classification number: B81B7/02 ,  B81B3/0021 ,  B81B3/0072 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81C2203/0154 ,  G01L1/18 ,  G01L9/0072 ,  G01L19/0092 ,  G01L19/02

Abstract: A micromechanical semiconductor sensing device is disclosed. In an embodiment the sensing device includes a micromechanical sensing structure being configured to yield an electrical sensing signal, and a piezoresistive sensing device provided in the micromechanical sensing structure, the piezoresistive sensing device being arranged to sense a mechanical stress disturbing the electrical sensing signal and being configured to yield an electrical disturbance signal based on the sensed mechanical stress disturbing the electrical sensing signal.

Abstract translation: 公开了一种微机械半导体感测装置。 在一个实施例中，感测装置包括微机械感测结构，其被配置为产生电感测信号，以及设置在微机械感测结构中的压阻感测装置，所述压阻感测装置布置成感测扰动电感测信号的机械应力， 被配置为基于感测到的电感测信号的机械应力产生电干扰信号。