公开(公告)号：US09812621B2

公开(公告)日：2017-11-07

申请号：US14236584

申请日：2012-07-31

申请人： Masamichi Ishihara ,  Kenshu Oyama ,  Shoji Murakami ,  Hitonobu Onosaka

发明人： Masamichi Ishihara ,  Kenshu Oyama ,  Shoji Murakami ,  Hitonobu Onosaka

IPC分类号： H01L33/60 ,  H01L25/075 ,  H01L23/00 ,  H05K1/05 ,  H01L33/62

CPC分类号： H01L33/60 ,  H01L24/97 ,  H01L25/0753 ,  H01L33/62 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/07802 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H05K1/056 ,  H05K2201/0209 ,  H05K2201/10106 ,  H05K2201/2054 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device includes an electrical insulating layer with superior heat resistance, heat dissipation, and durability, and which is manufactured through a process with good cost performance and process performance. In a semiconductor device including a first substrate to which a semiconductor chip is mounted directly or indirectly, and a white insulating layer formed on a surface of the first substrate and functioning as a reflecting material, the semiconductor chip is an LED, at least the surface of the first substrate is made of a metal, and a stacked structure of the white insulating layer and a metal layer is formed by coating a liquid material, which contains SiO2 in the form of nanoparticles and a white inorganic pigment, over the surface of the first substrate and baking the coated liquid material.

公开(公告)号：US09252125B2

公开(公告)日：2016-02-02

申请号：US13540233

申请日：2012-07-02

申请人： Yutaka Kagaya ,  Hidehiro Takeshima ,  Masamichi Ishihara

发明人： Yutaka Kagaya ,  Hidehiro Takeshima ,  Masamichi Ishihara

IPC分类号： H01L23/02 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L23/31

CPC分类号： H01L24/97 ,  H01L23/3128 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

摘要： A stacked semiconductor device is constructed by stacking in two levels: a lower semiconductor device having a wiring board, at least one semiconductor chip mounted on a first surface of the wiring board and having electrodes electrically connected to wiring by way of a connection means, an encapsulant composed of insulating plastic that covers the semiconductor chip and the connection means, a plurality of electrodes formed overlying the wiring of a second surface of the wiring board, and a plurality of linking interconnects each having a portion connected to the wiring of the first surface of the wiring board and another portion exposed on the surface of the encapsulant; and an upper semiconductor device in which each electrode overlies and is electrically connected to the exposed portions of each of the linking interconnects of the lower semiconductor device.

摘要翻译： 叠层半导体器件通过两层叠层构成：具有布线板的下半导体器件，安装在布线板的第一表面上的至少一个半导体芯片，并且具有通过连接装置电连接到布线的电极， 由覆盖半导体芯片的绝缘塑料和连接装置构成的密封剂，形成在布线板的第二表面的布线上的多个电极，以及多个连接互连，每个连接互连具有连接到第一表面的布线的部分 的布线板，另一部分露出在密封剂的表面上; 以及上半导体器件，其中每个电极覆盖并电连接到下半导体器件的每个连接互连的暴露部分。

公开(公告)号：US20140091459A1

公开(公告)日：2014-04-03

申请号：US14053481

申请日：2013-10-14

申请人： Masamichi Ishihara

发明人： Masamichi Ishihara

IPC分类号： H01L23/498 ,  H01L21/768 ,  H01L23/522

CPC分类号： H01L23/49811 ,  H01L21/76885 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/5328 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/13 ,  H01L2224/13024 ,  H01L2224/14181

摘要： A low resistance metal is charged into holes formed in a semiconductor substrate to thereby form through electrodes. Post electrodes of a wiring-added post electrode component connected together by a support portion thereof are simultaneously fixed to and electrically connected to connection regions formed on an LSI chip. On the front face side, after resin sealing, the support portion is separated so as to expose front face wiring traces. On the back face side, the semiconductor substrate is grounded so as to expose tip ends of the through electrodes. The front face wiring traces exposed to the front face side and the tip ends of the through electrodes exposed to the back face side are used as wiring for external connection.

摘要翻译： 将低电阻金属充电到形成在半导体衬底中的孔中，从而形成通过电极。 通过其支撑部分连接在一起的配线附加电极元件的后电极同时固定并形成在LSI芯片上形成的连接区域。 在正面侧，在树脂密封之后，将支撑部分分离以露出正面布线迹线。 在背面侧，使半导体基板接地，露出贯通电极的前端。 暴露于正面侧的前面接线轨迹和暴露于背面侧的贯通电极的前端被用作外部连接用布线。

公开(公告)号：US08557700B2

公开(公告)日：2013-10-15

申请号：US12991143

申请日：2009-05-07

申请人： Masamichi Ishihara

发明人： Masamichi Ishihara

IPC分类号： H01L21/44

CPC分类号： H01L23/49811 ,  H01L21/76885 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/5328 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/13 ,  H01L2224/13024 ,  H01L2224/14181

摘要： A low resistance metal is charged into holes formed in a semiconductor substrate to thereby form through electrodes. Post electrodes of a wiring-added post electrode component connected together by a support portion thereof are simultaneously fixed to and electrically connected to connection regions formed on an LSI chip. On the front face side, after resin sealing, the support portion is separated so as to expose front face wiring traces. On the back face side, the semiconductor substrate is grounded so as to expose tip ends of the through electrodes. The front face wiring traces exposed to the front face side and the tip ends of the through electrodes exposed to the back face side are used as wiring for external connection.

摘要翻译： 将低电阻金属充电到形成在半导体衬底中的孔中，从而形成通过电极。 通过其支撑部分连接在一起的配线附加电极元件的后电极同时固定并形成在LSI芯片上形成的连接区域。 在正面侧，在树脂密封之后，将支撑部分分离以露出正面布线迹线。 在背面侧，使半导体基板接地，露出贯通电极的前端。 暴露于正面侧的前面接线轨迹和暴露于背面侧的贯通电极的前端被用作外部连接用布线。

公开(公告)号：US08415789B2

公开(公告)日：2013-04-09

申请号：US12991149

申请日：2009-05-07

申请人： Masamichi Ishihara

发明人： Masamichi Ishihara

IPC分类号： H01L23/34

CPC分类号： H01L25/16 ,  H01L21/486 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68386 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15183 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring substrate has, on each of opposite faces thereof, connection pad portions to which various circuit elements are connected, and wiring traces for connecting the connection pad portions. The wiring substrate also has a through wiring portion for establishing mutual connection between the connection pad portions and the wiring traces on the front face and those on the back face. A post electrode component is formed such that it includes a plurality of post electrodes supported by a support portion. A semiconductor chip is attached to the back face of the wiring substrate, and is connected to the connection pad portions on the back face. After the post electrode component is fixed to and electrically connected to the wiring traces at predetermined positions, and resin sealing is performed, the support portion is separated so as to expose end surfaces of the post electrodes or back face wiring traces connected thereto. Another circuit element is disposed on the front face of the wiring substrate, and is connected to the connection pad portions on the front face.

摘要翻译： 布线基板的每个相对面上具有连接各种电路元件的连接焊盘部分和用于连接连接焊盘部分的布线迹线。 布线基板还具有用于在连接焊盘部分和前表面上的布线迹线与背面之间建立相互连接的贯通布线部分。 后电极部件形成为包括由支撑部支撑的多个柱电极。 半导体芯片安装在布线基板的背面，并与背面的连接焊盘部连接。 在预定位置固定电极部件并与布线迹线电连接并进行树脂密封之后，将支撑部分分离，露出与其连接的柱状电极或背面布线迹线的端面。 另一个电路元件设置在布线基板的正面上，并且连接到前表面上的连接焊盘部分。

公开(公告)号：US08399980B2

公开(公告)日：2013-03-19

申请号：US12935341

申请日：2009-03-27

申请人： Masamichi Ishihara ,  Hirotaka Ueda

发明人： Masamichi Ishihara ,  Hirotaka Ueda

IPC分类号： H01L23/48 ,  H01L23/053 ,  H01L23/52 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring electronic component of the present invention is incorporated into an electronic device package in which a circuit element including a semiconductor chip is disposed and in which the circuit element is connected to a wiring pattern on the back face and also connected, via vertical wiring, to external electrodes located on the front face opposite the wiring pattern. The wiring electronic component is composed of an electrically conductive support portion, which serves as an electroforming mother die, and a plurality of vertical wiring portions formed through electroforming such that they are integrally connected to the support portion.

摘要翻译： 将本发明的布线电子部件并入到其中设置有包括半导体芯片的电路元件的电子器件封装中，并且其中电路元件连接到背面上的布线图案，并且还经由垂直布线连接， 位于与布线图案相对的前表面上的外部电极。 布线电子部件由用作电铸母模的导电支撑部分和通过电铸形成的多个垂直布线部分组成，使得它们一体地连接到支撑部分。

公开(公告)号：US20120127667A1

公开(公告)日：2012-05-24

申请号：US13259563

申请日：2010-03-24

申请人： Kenji Ohsawa ,  Rinkou Fukunaga ,  Katsuya Tsuruta ,  Kei Mizuta ,  Masamichi Ishihara

发明人： Kenji Ohsawa ,  Rinkou Fukunaga ,  Katsuya Tsuruta ,  Kei Mizuta ,  Masamichi Ishihara

IPC分类号： H05K7/20 ,  H05K3/32

CPC分类号： H01L23/49816 ,  H01L21/4867 ,  H01L23/367 ,  H01L23/4334 ,  H01L2224/16225 ,  H01L2924/15321 ,  Y10T29/4913

摘要： A circuit element is arranged on an organic substrate and connected to a wiring pattern arranged on the organic substrate. An internal connection electrode is formed on a conductive support body by electroforming so as to obtain a unitary block of the internal connection electrode and the support body. Each end of each of the internal connection electrodes connected into a unitary block by the support body is connected to the wiring pattern. After the circuit element is sealed by resin, the support body is peeled off, so as to obtain individual internal connection electrodes separately and the other end of each of the internal connection electrodes is used as an external connection electrode on the front surface while the external connection electrode on the rear surface is connected to the wiring pattern.

摘要翻译： 电路元件设置在有机基板上并连接到布置在有机基板上的布线图案。 通过电铸在导电性支撑体上形成内部连接电极，以获得内部连接电极和支撑体的整体块。 通过支撑体连接到整体块的每个内部连接电极的每个端部连接到布线图案。 在电路元件被树脂密封之后，剥离支撑体，以分别获得单独的内部连接电极，并且将每个内部连接电极的另一端用作前表面上的外部连接电极，而外部 后表面上的连接电极连接到布线图案。

公开(公告)号：US08017452B2

公开(公告)日：2011-09-13

申请号：US12259329

申请日：2008-10-28

申请人： Masamichi Ishihara ,  Hirotaka Ueda

发明人： Masamichi Ishihara ,  Hirotaka Ueda

IPC分类号： H01L21/00

CPC分类号： H01L23/49548 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49517 ,  H01L23/49537 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/16 ,  H01L2221/68359 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/06551 ,  H01L2225/1011 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A circuit element is disposed on an organic substrate and is connected to a wiring pattern provided on the organic substrate. Internal connection electrodes are formed on a support of a conductive material through electroforming such that the internal connection electrodes are integrally connected to the support. First ends of the internal connection electrodes integrally connected by the support are connected to the wiring pattern. After the circuit element is resin-sealed, the support is removed so as to separate the internal connection electrodes from one another. Second ends of the internal connection electrodes are used as external connection electrodes on the front face, and external connection electrodes on the back face are connected to the wiring pattern.

摘要翻译： 电路元件设置在有机基板上并连接到设置在有机基板上的布线图案。 内部连接电极通过电铸形成在导电材料的支撑体上，使得内部连接电极与支撑体一体地连接。 由支撑体一体连接的内部连接电极的第一端连接到布线图案。 在电路元件被树脂密封之后，移除支撑件以将内部连接电极彼此分开。 内部连接电极的第二端用作前表面上的外部连接电极，并且背面上的外部连接电极连接到布线图案。

公开(公告)号：US20100295178A1

公开(公告)日：2010-11-25

申请号：US12864125

申请日：2009-01-16

申请人： Masamichi Ishihara ,  Hirotaka Ueda

发明人： Masamichi Ishihara ,  Hirotaka Ueda

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L31/0203 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/162 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14683 ,  H01L27/1469 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/76155 ,  H01L2224/81005 ,  H01L2224/82102 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/15788 ,  H01L2924/181 ,  H05K1/0209 ,  H05K1/187 ,  H05K2201/0108 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45015 ,  H01L2924/207

摘要： A first wiring pattern is formed on a surface of a first support plate; a semiconductor chip is disposed on the first wiring pattern; and electrode terminals of the semiconductor chip are electrically connected to the first wiring pattern at required positions. Post electrodes connected to a second wiring pattern of a wiring-added post electrode component integrally connected by a second support plate are collectively fixed and electrically connected to the first wiring pattern formed on the first support plate at predetermined positions. After sealing with resin, the first and second support plates are separated; a glass substrate is affixed on a front face side; and external electrodes connected to the second wiring pattern are formed on a back face side.

摘要翻译： 在第一支撑板的表面上形成第一布线图案; 半导体芯片设置在第一布线图案上; 并且半导体芯片的电极端子在所需位置电连接到第一布线图案。 与通过第二支撑板一体连接的配线附加柱电极部件的第二布线图形连接的柱电极被共同地固定并且在预定位置电连接到形成在第一支撑板上的第一布线图案。 在用树脂密封之后，分离第一和第二支撑板; 玻璃基板固定在正面侧上; 并且连接到第二布线图案的外部电极形成在背面侧。

公开(公告)号：US07838983B2

公开(公告)日：2010-11-23

申请号：US11911990

申请日：2006-04-04

申请人： Masamichi Ishihara

发明人： Masamichi Ishihara

IPC分类号： H01L23/12

CPC分类号： H01L23/49548 ,  H01L22/32 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49805 ,  H01L23/49811 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012

摘要： The present invention connects a first wiring portion located at one side of a substrate and a second wiring portion located at the other side. A side electrode connected to the first wiring portion is formed, and the second wiring portion is formed on an insulating layer formed on the substrate. An exposed end of the second wiring portion formed when singulated into individual semiconductor package and the side electrode are wired by ink jet system using nano metal particles. Particularly, when copper is used, the wiring by the ink jet system is performed by the reduction of a metal surface oxidation film and/or removal of organic matters by atomic hydrogen.

摘要翻译： 本发明连接位于基板一侧的第一布线部分和位于另一侧的第二布线部分。 形成与第一配线部连接的侧面电极，在形成于基板上的绝缘层上形成第二配线部。 当单个半导体封装中形成的第二布线部分的露出端和侧电极通过使用纳米金属颗粒的喷墨系统布线。 特别是使用铜时，通过金属表面氧化膜的还原和/或原子氢除去有机物来进行喷墨系统的配线。