公开(公告)号：US06806207B2

公开(公告)日：2004-10-19

申请号：US10375852

申请日：2003-02-25

申请人： Tzu-Fang Huang ,  Yung-Cheng Lu ,  Li-Qun Xia ,  Ellie Yieh ,  Wai-Fan Yau ,  David W. Cheung ,  Ralf B. Willecke ,  Kuowei Liu ,  Ju-Hyung Lee ,  Farhad K. Moghadam ,  Yeming Jim Ma

发明人： Tzu-Fang Huang ,  Yung-Cheng Lu ,  Li-Qun Xia ,  Ellie Yieh ,  Wai-Fan Yau ,  David W. Cheung ,  Ralf B. Willecke ,  Kuowei Liu ,  Ju-Hyung Lee ,  Farhad K. Moghadam ,  Yeming Jim Ma

IPC分类号： H01L2131

CPC分类号： H01L21/31612 ,  C23C16/045 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02208 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76829 ,  H01L21/76835 ,  H01L2221/1031

摘要： A silicon oxide layer is produced by plasma enhanced decomposition of an organosilicon compound to deposit films having a carbon content of at least 1% by atomic weight. An optional carrier gas may be introduced to facilitate the deposition process at a flow rate less than or equal to the flow rate of the organosilicon compounds. An oxygen rich surface may be formed adjacent the silicon oxide layer by temporarily increasing oxidation of the organosilicon compound.

摘要翻译： 氧化硅层通过有机硅化合物的等离子体增强分解产生，以沉积碳原子量至少为1％的膜。 可以引入任选的载气，以便以小于或等于有机硅化合物的流速的流速促进沉积过程。 可以通过暂时增加有机硅化合物的氧化而在氧化硅层附近形成富氧表面。

公开(公告)号：US06784119B2

公开(公告)日：2004-08-31

申请号：US10632179

申请日：2003-07-31

申请人： Frederic Gaillard ,  Li-Qun Xia ,  Tian-Hoe Lim ,  Ellie Yieh ,  Wai-Fan Yau ,  Shin-Puu Jeng ,  Kuowei Liu ,  Yung-Cheng Lu

发明人： Frederic Gaillard ,  Li-Qun Xia ,  Tian-Hoe Lim ,  Ellie Yieh ,  Wai-Fan Yau ,  Shin-Puu Jeng ,  Kuowei Liu ,  Yung-Cheng Lu

IPC分类号： H01L2131

CPC分类号： H01L21/76834 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02208 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/314 ,  H01L21/31612 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76828

摘要： A method for processing a substrate comprising depositing a dielectric layer comprising silicon, oxygen, and carbon on the substrate by chemical vapor deposition, wherein the dielectric layer has a carbon content of at least 1% by atomic weight and a dielectric constant of less than about 3, and depositing a silicon and carbon containing layer on the dielectric layer. The dielectric constant of a dielectric layer deposited by reaction of an organosilicon compound having three or more methyl groups is significantly reduced by further depositing an amorphous hydrogenated silicon carbide layer by reaction of an alkylsilane in a plasma of a relatively inert gas.

公开(公告)号：US06632735B2

公开(公告)日：2003-10-14

申请号：US09924240

申请日：2001-08-07

申请人： Wai-Fan Yau ,  Ju-Hyung Lee ,  Nasreen Gazala Chopra ,  Tzu-Fang Huang ,  David Cheung ,  Farhad Moghadam ,  Kuo-Wei Liu ,  Yung-Cheng Lu ,  Ralf B. Willecke ,  Paul Matthews ,  Dian Sugiarto

发明人： Wai-Fan Yau ,  Ju-Hyung Lee ,  Nasreen Gazala Chopra ,  Tzu-Fang Huang ,  David Cheung ,  Farhad Moghadam ,  Kuo-Wei Liu ,  Yung-Cheng Lu ,  Ralf B. Willecke ,  Paul Matthews ,  Dian Sugiarto

IPC分类号： H01L2131

CPC分类号： H01L21/02126 ,  C23C16/401 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/31633

摘要： A method of forming a carbon-doped silicon oxide layer is disclosed. The carbon-doped silicon oxide layer is formed by applying an electric field to a gas mixture comprising an organosilane compound and an oxidizing gas. The carbon-doped silicon oxide layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the carbon-doped silicon oxide layer is used as an intermetal dielectric layer. In another integrated circuit fabrication process, the carbon-doped silicon oxide layer is incorporated into a damascene structure.

摘要翻译： 公开了形成碳掺杂氧化硅层的方法。 碳掺杂氧化硅层通过向包含有机硅烷化合物和氧化气体的气体混合物施加电场而形成。 碳掺杂氧化硅层与集成电路制造工艺兼容。 在一个集成电路制造工艺中，碳掺杂氧化硅层用作金属间介电层。 在另一个集成电路制造工艺中，掺杂碳的氧化硅层被结合到镶嵌结构中

公开(公告)号：US06627532B1

公开(公告)日：2003-09-30

申请号：US09679843

申请日：2000-10-05

申请人： Frederic Gaillard ,  Li-Qun Xia ,  Tian-Hoe Lim ,  Ellie Yieh ,  Wai-Fan Yau ,  Shin-Puu Jeng ,  Kuowei Liu ,  Yung-Cheng Lu

发明人： Frederic Gaillard ,  Li-Qun Xia ,  Tian-Hoe Lim ,  Ellie Yieh ,  Wai-Fan Yau ,  Shin-Puu Jeng ,  Kuowei Liu ,  Yung-Cheng Lu

IPC分类号： H01L214763

CPC分类号： H01L21/76834 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02208 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/314 ,  H01L21/31612 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76828

摘要： A method for processing a substrate comprising depositing a dielectric layer comprising silicon, oxygen, and carbon on the substrate by chemical vapor deposition, wherein the dielectric layer has a carbon content of at least 1% by atomic weight and a dielectric constant of less than about 3, and depositing a silicon and carbon containing layer on the dielectric layer. The dielectric constant of a dielectric layer deposited by reaction of an organosilicon compound having three or more methyl groups is significantly reduced by further depositing an amorphous hydrogenated silicon carbide layer by reaction of an alkylsilane in a plasma of a relatively inert gas.

摘要翻译： 一种用于处理衬底的方法，包括通过化学气相沉积在衬底上沉积包括硅，氧和碳的电介质层，其中介电层具有至少1％原子量的碳含量和小于约 并且在电介质层上沉积含硅和碳的层。 通过使烷基硅烷在相对惰性气体的等离子体中反应而进一步沉积非晶质氢化碳化硅层，沉积了具有三个或更多个甲基的有机硅化合物沉积的电介质层的介电常数显着降低。

公开(公告)号：US06562690B1

公开(公告)日：2003-05-13

申请号：US09594186

申请日：2000-06-13

申请人： David Cheung ,  Wai-Fan Yau ,  Robert P. Mandal ,  Shin-Puu Jeng ,  Kuo-Wei Liu ,  Yung-Cheng Lu ,  Michael Barnes ,  Ralf B. Willecke ,  Farhad Moghadam ,  Tetsuya Ishikawa ,  Tze Wing Poon

发明人： David Cheung ,  Wai-Fan Yau ,  Robert P. Mandal ,  Shin-Puu Jeng ,  Kuo-Wei Liu ,  Yung-Cheng Lu ,  Michael Barnes ,  Ralf B. Willecke ,  Farhad Moghadam ,  Tetsuya Ishikawa ,  Tze Wing Poon

IPC分类号： H01L2176

CPC分类号： H01L21/76835 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02208 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31612 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L2221/1031 ,  Y10T428/24926 ,  Y10T428/31663

摘要： A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10W to about 200W or a pulsed RF power level from about 20W to about 500W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organosilane film is produced by reaction of methylsilane, CH3SiH3, or dimethylsilane, (CH3)2SiH2, and nitrous oxide, N2O, at a constant RF power level from about 10W to about 150W, or a pulsed RF power level from about 20W to about 250W during 10% to 30% of the duty cycle.

摘要翻译： 一种用于通过有机硅化合物和氧化性气体以约10W至约200W的恒定RF功率水平的反应沉积低介电常数膜的方法和装置或约20W至约500W的脉冲RF功率水平。 在与有机硅化合物混合之前，优选在单独的微波室内可以提高氧化气体的离解，以帮助控制沉积膜的碳含量。 氧化的有机硅烷或有机硅氧烷膜具有良好的屏障性能，用作邻近其它介电层的衬垫层或盖层。 氧化的有机硅烷或有机硅氧烷膜也可以用作蚀刻停止层和用于制造双镶嵌结构的金属间介电层。 氧化的有机硅烷或有机硅氧烷膜也在不同的介电层之间提供优异的粘附性。 优选的氧化有机硅烷膜通过甲基硅烷，CH 3 SiH 3或二甲基硅烷，（CH 3）2 SiH 2和一氧化二氮，N 2 O以约10W至约150W的恒定RF功率水平或约20W的脉冲RF功率水平 在占用周期的10％到30％的范围内达到约250W。

公开(公告)号：US09136226B2

公开(公告)日：2015-09-15

申请号：US12774569

申请日：2010-05-05

申请人： Zhen-Cheng Wu ,  Yung-Cheng Lu ,  Chung-Chi Ko

发明人： Zhen-Cheng Wu ,  Yung-Cheng Lu ,  Chung-Chi Ko

IPC分类号： H01L21/31 ,  H01L23/552

CPC分类号： H01L23/552 ,  B01D53/9468 ,  B01D53/9472 ,  B01D2255/1021 ,  B01D2255/9022 ,  B01D2255/9035 ,  B01D2255/9155 ,  B01D2257/404 ,  B01D2257/502 ,  B01D2257/702 ,  B01J23/40 ,  B01J23/42 ,  B01J29/061 ,  B01J29/072 ,  B01J29/763 ,  B01J35/0006 ,  B01J35/04 ,  B01J37/024 ,  B01J37/0244 ,  B01J37/0246 ,  H01L2924/0002 ,  H01L2924/00

摘要： An ultra-violet (UV) protection layer is formed over a semiconductor workpiece before depositing a UV curable dielectric layer. The UV protection layer prevents UV light from reaching and damaging underlying material layers and electrical devices. The UV protection layer comprises a layer of silicon doped with an impurity, wherein the impurity comprises O, C, H, N, or combinations thereof. The UV protection layer may comprise SiOC:H, SiON, SiN, SiCO:H, combinations thereof, or multiple layers thereof, as examples.

摘要翻译： 在沉积紫外线固化介电层之前，在半导体工件上形成紫外（UV）保护层。 紫外线防护层防止紫外线到达并损坏下层材料层和电气设备。 UV保护层包括掺杂有杂质的硅层，其中杂质包括O，C，H，N或其组合。 作为实例，UV保护层可以包括SiOC：H，SiON，SiN，SiCO：H，它们的组合或多层。

公开(公告)号：US08324731B2

公开(公告)日：2012-12-04

申请号：US12591532

申请日：2009-11-23

申请人： Chen-Hua Yu ,  Shwang-Ming Jeng ,  Yung-Cheng Lu ,  Huilin Chang ,  Ting-Yu Shen ,  Yichi Liao

发明人： Chen-Hua Yu ,  Shwang-Ming Jeng ,  Yung-Cheng Lu ,  Huilin Chang ,  Ting-Yu Shen ,  Yichi Liao

IPC分类号： H01L21/31

CPC分类号： B29C43/222 ,  A44B17/0029 ,  A44B17/0058 ,  B29C43/28 ,  B29C2793/009 ,  B29L2031/7282 ,  B29L2031/729 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2224/45099

摘要： An integrated circuit device having at least a bond pad for semiconductor devices and method for fabricating the same are provided. A bond pad has a first passivation layer having a plurality of openings. A conductive layer which overlies the openings and portions of the first passivation layer, having a first portion overlying the first passivation layer and a second portion overlying the openings. A second passivation layer overlies the first passivation layer and covers edges of the conductive layer.

摘要翻译： 提供了至少具有用于半导体器件的接合焊盘的集成电路器件及其制造方法。 接合焊盘具有具有多个开口的第一钝化层。 覆盖在开口和第一钝化层的部分上的导电层，其具有覆盖第一钝化层的第一部分和覆盖开口的第二部分。 第二钝化层覆盖在第一钝化层上并覆盖导电层的边缘。

公开(公告)号：US20110081758A1

公开(公告)日：2011-04-07

申请号：US12923889

申请日：2010-10-13

申请人： Zhen-Cheng Wu ,  Yung-Cheng Lu ,  Pi-Tsung Chen ,  Ying-Tsung Chen

发明人： Zhen-Cheng Wu ,  Yung-Cheng Lu ,  Pi-Tsung Chen ,  Ying-Tsung Chen

IPC分类号： H01L21/8234

CPC分类号： H01L21/823462 ,  H01L27/088 ,  Y10S438/981

摘要： A semiconductor device includes a semiconductor substrate, wherein the semiconductor substrate includes a core area for core circuits and a peripheral area for peripheral circuits. The semiconductor device includes a core oxide on the semiconductor substrate in the core area, a portion of the core oxide being nitrided, a first polysilicon pattern on the core oxide, an I/O oxide including pure oxide on the semiconductor substrate in the peripheral area, and a second polysilicon pattern on the I/O oxide.

摘要翻译： 半导体器件包括半导体衬底，其中半导体衬底包括用于核心电路的核心区域和用于外围电路的外围区域。 半导体器件在核心区域中的半导体衬底上具有核心氧化物，核心氧化物的一部分被氮化，核心氧化物上的第一多晶硅图案，在周边区域中的半导体衬底上的纯氧化物的I / O氧化物 ，以及I / O氧化物上的第二多晶硅图案。

公开(公告)号：US07897505B2

公开(公告)日：2011-03-01

申请号：US11727133

申请日：2007-03-23

申请人： Chung-Chi Ko ,  Lih-Ping Li ,  Yung-Cheng Lu ,  Hui-Lin Chang ,  Chih-Hsien Lin

发明人： Chung-Chi Ko ,  Lih-Ping Li ,  Yung-Cheng Lu ,  Hui-Lin Chang ,  Chih-Hsien Lin

IPC分类号： H01L21/4763 ,  H01L21/00

CPC分类号： H01L21/31633 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76835

摘要： A novel method for enhancing interface adhesion between adjacent dielectric layers, particularly between an etch stop layer and an overlying dielectric layer having a low dielectric constant (k) in the formation of metal interconnects during the fabrication of integrated circuits on semiconductor wafer substrates. The method may include providing a substrate, providing an etch stop layer on the substrate, providing an oxygen-rich dielectric pre-layer on the etch stop layer and providing a major dielectric layer on the oxygen-rich dielectric pre-layer. Metal interconnects are then formed in the dielectric layers. The oxygen-rich dielectric pre-layer between the etch stop layer and the upper dielectric layer prevents or minimizes peeling and cracking of the layers induced by stresses that are caused by chemical mechanical planarization of metal layers and/or chip packaging.

摘要翻译： 一种新颖的方法，用于在半导体晶片衬底上的集成电路制造过程中，在金属互连的形成过程中，增强相邻电介质层之间的界面附着力，特别是在蚀刻停止层和具有低介电常数（k）的上覆电介质层之间。 该方法可以包括提供衬底，在衬底上提供蚀刻停止层，在蚀刻停止层上提供富氧介电预置层，并在富氧电介质预层上提供主要电介质层。 然后在电介质层中形成金属互连。 在蚀刻停止层和上部电介质层之间的富氧介电预层防止或最小化由金属层和/或芯片封装的化学机械平坦化引起的应力引起的层的剥离和破裂。

公开(公告)号：US07834458B2

公开(公告)日：2010-11-16

申请号：US12638022

申请日：2009-12-15

申请人： Hui-Lin Chang ,  Hung Chun Tsai ,  Yung-Cheng Lu ,  Syun-Ming Jang

发明人： Hui-Lin Chang ,  Hung Chun Tsai ,  Yung-Cheng Lu ,  Syun-Ming Jang

IPC分类号： H01L29/40

CPC分类号： H01L23/53238 ,  H01L21/28556 ,  H01L21/32053 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76871 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L21/76889 ,  H01L23/528 ,  H01L23/53233 ,  H01L2924/0002 ,  H01L2924/00

摘要： A cap layer for a copper interconnect structure formed in a first dielectric layer is provided. In an embodiment, the cap layer may be formed by an in-situ deposition process in which a process gas comprising germanium, arsenic, tungsten, or gallium is introduced, thereby forming a copper-metal cap layer. In another embodiment, a copper-metal silicide cap is provided. In this embodiment, silane is introduced before, during, or after a process gas is introduced, the process gas comprising germanium, arsenic, tungsten, or gallium. Thereafter, an optional etch stop layer may be formed, and a second dielectric layer may be formed over the etch stop layer or the first dielectric layer.

摘要翻译： 提供了形成在第一介电层中的铜互连结构的盖层。 在一个实施例中，盖层可以通过原位沉积工艺形成，其中引入包含锗，砷，钨或镓的工艺气体，从而形成铜 - 金属帽层。 在另一个实施例中，提供铜 - 金属硅化物帽。 在该实施方案中，在引入工艺气体之前，期间或之后引入硅烷，该工艺气体包括锗，砷，钨或镓。 此后，可以形成可选的蚀刻停止层，并且可以在蚀刻停止层或第一介电层上方形成第二介电层。