公开(公告)号：US11742409B2

公开(公告)日：2023-08-29

申请号：US17346869

申请日：2021-06-14

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Jingyun Zhang ,  Choonghyun Lee ,  Chun Wing Yeung ,  Robin Hsin Kuo Chao ,  Heng Wu

IPC分类号： H01L29/66 ,  H01L29/786 ,  H01L29/423 ,  H01L21/3065 ,  H01L21/02

CPC分类号： H01L29/66522 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/02609 ,  H01L21/3065 ,  H01L29/42392 ,  H01L29/6653 ,  H01L29/66469 ,  H01L29/78696 ,  H01L29/66545

摘要： Semiconductor devices and methods of forming the same include forming a stack of alternating first and second sacrificial layers. The first sacrificial layers are recessed relative to the second sacrificial layers. Replacement channel layers are grown from sidewalls of the first sacrificial layers. A first source/drain region is grown from the replacement channel layer. The recessed first sacrificial layers are etched away. A second source/drain region is grown from the replacement channel layer. The second sacrificial layers are etched away. A gate stack is formed between and around the replacement channel layers.

公开(公告)号：US11742246B2

公开(公告)日：2023-08-29

申请号：US17502210

申请日：2021-10-15

申请人： International Business Machines Corporation

发明人： Ruilong Xie ,  Hemanth Jagannathan ,  Christopher J. Waskiewicz ,  Alexander Reznicek

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/762

CPC分类号： H01L21/823481 ,  H01L21/76224 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66666 ,  H01L29/7827

摘要： A vertical field effect transistor structure and method for fabricating the same. The structure includes a source/drain layer in contact with at least one semiconductor fin. An edge portion of the source/drain layer includes a notched region filled with a dielectric material. A spacer layer includes a first portion in contact with the source/drain layer and a second portion in contact with the dielectric material. A gate structure contacts the spacer layer and the dielectric material. The method includes forming a source/drain layer in contact with at least one semiconductor fin. A spacer layer is formed in contact with the source/drain layer. A portion of the spacer layer is removed to expose an end portion of the source/drain layer. The exposed end portion of the source/drain layer is recessed to form a notched region within the source/drain layer. A dielectric layer is formed within the notched region.

公开(公告)号：US11742245B2

公开(公告)日：2023-08-29

申请号：US17445328

申请日：2021-08-18

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Poren Tang

IPC分类号： H01L21/8234 ,  H01L29/66 ,  H01L21/033 ,  H01L21/768 ,  H01L29/78

CPC分类号： H01L21/823468 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/76829 ,  H01L21/823431 ,  H01L21/823437 ,  H01L29/6653 ,  H01L29/66795 ,  H01L29/7851

摘要： Semiconductor devices fabrication method is provided. The method for fabricating the semiconductor device includes: providing a semiconductor substrate; forming a gate structure on a surface of the semiconductor substrate; forming protective sidewall spacers on sidewall surfaces of the gate structure and to cover sidewall surfaces of the gate dielectric layer; forming sacrificial sidewall spacers on sidewall surfaces of the protective sidewall spacers and between the protective sidewall spacers and the gate structure; forming a first dielectric layer on the surface of the semiconductor substrate around the gate structure, the protective sidewall spacers and the sacrificial sidewall spacers; forming conductive plugs in the first dielectric layer at opposite sides of the gate structure, the protective sidewall spacers and the sacrificial sidewall spacers; and removing the sacrificial sidewall spacers to form air gap spacers between the protective sidewall spacers and the conductive plugs.

公开(公告)号：US11735671B2

公开(公告)日：2023-08-22

申请号：US17719221

申请日：2022-04-12

申请人： NEXGEN POWER SYSTEMS, INC.

发明人： Clifford Drowley ,  Ray Milano ,  Subhash Srinivas Pidaparthi ,  Andrew P. Edwards ,  Hao Cui ,  Shahin Sharifzadeh

IPC分类号： H01L29/78 ,  H01L29/778 ,  H01L29/66

CPC分类号： H01L29/7856 ,  H01L29/6653 ,  H01L29/66803 ,  H01L29/7783 ,  H01L29/7788

摘要： A method of fabricating a vertical fin-based field effect transistor (FET) includes providing a semiconductor substrate having a first surface and a second surface, the semiconductor substrate having a first conductivity type, epitaxially growing a first semiconductor layer on the first surface of the semiconductor substrate, the first semiconductor layer having the first conductivity type and including a drift layer and a graded doping layer on the drift layer, and epitaxially growing a second semiconductor layer having the first conductivity type on the graded doping layer. The method also includes forming a metal compound layer on the second semiconductor layer, forming a patterned hard mask layer on the metal compound layer, and etching the metal compound layer and the second semiconductor layer using the patterned hard mask layer as a mask exposing a surface of the graded doping layer to form a plurality of fins surrounded by a trench.

公开(公告)号：US20230253474A1

公开(公告)日：2023-08-10

申请号：US18300192

申请日：2023-04-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yen-Ting Chen ,  Wei-Yang Lee ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC分类号： H01L29/49 ,  H01L29/66 ,  H01L21/764 ,  H01L21/02 ,  H01L29/78 ,  H01L21/311 ,  H01L29/08

CPC分类号： H01L29/4991 ,  H01L29/66636 ,  H01L29/66545 ,  H01L21/764 ,  H01L29/6653 ,  H01L29/6656 ,  H01L21/02164 ,  H01L29/7851 ,  H01L21/31116 ,  H01L21/02167 ,  H01L29/0847 ,  H01L21/0217 ,  H01L29/66795

摘要： A semiconductor device including a gaseous spacer and a method for forming the same are disclosed. In an embodiment, a method includes forming a gate stack over a substrate; forming a first gate spacer on sidewalls of the gate stack; forming a second gate spacer over the first gate spacer; removing a portion of the second gate spacer, at least a portion of the second gate spacer remaining; removing the first gate spacer to form a first opening; and after removing the first gate spacer, removing the remaining portion of the second gate spacer through the first opening.

公开(公告)号：US11721594B2

公开(公告)日：2023-08-08

申请号：US17805962

申请日：2022-06-08

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wei-Sheng Yun ,  Chih-Hao Wang ,  Jui-Chien Huang ,  Kuo-Cheng Chiang ,  Chih-Chao Chou ,  Chun-Hsiung Lin ,  Pei-Hsun Wang

IPC分类号： H01L21/8238 ,  H01L29/06 ,  H01L21/02 ,  H01L21/324 ,  H01L29/423 ,  H01L27/092 ,  H01L29/08 ,  H01L29/10 ,  H01L21/306 ,  H01L21/311 ,  H01L21/027 ,  H01L21/762 ,  H01L29/66

CPC分类号： H01L21/823821 ,  H01L21/02532 ,  H01L21/30604 ,  H01L21/324 ,  H01L21/823807 ,  H01L21/823828 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/42392 ,  H01L21/0274 ,  H01L21/31116 ,  H01L21/76224 ,  H01L21/823864 ,  H01L21/823878 ,  H01L29/6653 ,  H01L29/66545

摘要： A semiconductor structure includes a fin disposed on a substrate, the fin including a channel region comprising a plurality of channels vertically stacked over one another, the channels comprising germanium distributed therein. The semiconductor structure further includes a gate stack engaging the channel region of the fin and gate spacers disposed between the gate stack and the source and drain regions of the fin, wherein each channel of the channels includes a middle section wrapped around by the gate stack and two end sections engaged by the gate spacers, wherein a concentration of germanium in the middle section of the channel is higher than a concentration of germanium in the two end sections of the channel, and wherein the middle section of the channel further includes a core portion and an outer portion surrounding the core portion with a germanium concentration profile from the core portion to the outer portion.

公开(公告)号：US11715780B2

公开(公告)日：2023-08-01

申请号：US17074348

申请日：2020-10-19

申请人： Applied Materials, Inc.

发明人： Angada B. Sachid

IPC分类号： H01L29/49 ,  H01L29/78 ,  H01L29/51 ,  H01L29/66 ,  H01L21/28 ,  H01L21/764

CPC分类号： H01L29/4991 ,  H01L21/28088 ,  H01L21/28123 ,  H01L21/764 ,  H01L29/4966 ,  H01L29/516 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6684 ,  H01L29/66545 ,  H01L29/78391

摘要： Processing methods may be performed to form an airgap in a semiconductor structure. The methods may include forming a high-k material on a floor of a trench. The trench may be defined on a semiconductor substrate between sidewalls of a first material and a spacer material. The methods may include forming a gate structure on the high-k material. The gate structure may contact the first material along each sidewall of the trench. The methods may also include etching the first material. The etching may form an airgap adjacent the gate structure.

公开(公告)号：US11705505B2

公开(公告)日：2023-07-18

申请号：US17818400

申请日：2022-08-09

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wei-Ting Chien ,  Liang-Yin Chen ,  Yi-Hsiu Liu ,  Tsung-Lin Lee ,  Huicheng Chang

IPC分类号： H01L29/66 ,  H01L29/423 ,  H01L29/49 ,  H01L29/06 ,  H01L21/8238 ,  H01L21/764 ,  H01L21/8234 ,  H01L29/51 ,  H01L29/78 ,  H01L21/02 ,  H01L21/311

CPC分类号： H01L29/6656 ,  H01L21/764 ,  H01L21/823468 ,  H01L21/823864 ,  H01L29/0649 ,  H01L29/42324 ,  H01L29/4991 ,  H01L29/515 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66537 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/66825 ,  H01L29/785 ,  H01L21/0228 ,  H01L21/02112 ,  H01L21/02115 ,  H01L21/02205 ,  H01L21/02274 ,  H01L21/31111 ,  H01L21/31116

摘要： A semiconductor device and a method of forming the same are provided. The method includes forming a sacrificial gate structure over an active region. A first spacer layer is formed along sidewalls and a top surface of the sacrificial gate structure. A first protection layer is formed over the first spacer layer. A second spacer layer is formed over the first protection layer. A third spacer layer is formed over the second spacer layer. The sacrificial gate structure is replaced with a replacement gate structure. The second spacer layer is removed to form an air gap between the first protection layer and the third spacer layer.

公开(公告)号：US20230207652A1

公开(公告)日：2023-06-29

申请号：US17563714

申请日：2021-12-28

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Shogo Mochizuki ,  Kangguo Cheng ,  Juntao Li

IPC分类号： H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786 ,  H01L29/06

CPC分类号： H01L29/42392 ,  H01L29/6653 ,  H01L29/7848 ,  H01L29/78696 ,  H01L29/0665

摘要： A gate-all-around device is provided. The gate-all-around device includes a source/drain on a substrate, an isolation liner wrapped around the source/drain, where the isolation liner separates the source/drain from the substrate, and a one or more nanosheet channel sections electrically connected to the source/drain.

公开(公告)号：US11688796B2

公开(公告)日：2023-06-27

申请号：US17130960

申请日：2020-12-22

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Effendi Leobandung

IPC分类号： H01L29/16 ,  H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L29/161 ,  H01L29/786 ,  H01L29/423

CPC分类号： H01L29/66795 ,  H01L29/1033 ,  H01L29/161 ,  H01L29/42392 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66545 ,  H01L29/66772 ,  H01L29/785 ,  H01L29/78654 ,  H01L29/78696

摘要： Semiconductor devices include a semiconductor fin on a substrate. The semiconductor fin has channel region and source and drain regions. A gate stack is formed all around the channel region of the semiconductor fin, such that the channel region of the semiconductor fin is separated from the substrate. An interlayer dielectric is formed around the gate stack. At least a portion of the gate stack is formed in an undercut beneath the interlayer dielectric.