公开(公告)号：US20170117858A1

公开(公告)日：2017-04-27

申请号：US15158006

申请日：2016-05-18

Applicant: STMicroelectronics S.r.l.

Inventor： Andrea Pallotta

IPC: H03F3/26 ,  H03F3/195 ,  H03F3/213 ,  H03F1/02

CPC classification number: H03F3/26 ,  H03F1/0205 ,  H03F1/307 ,  H03F1/347 ,  H03F3/19 ,  H03F3/195 ,  H03F3/211 ,  H03F3/213 ,  H03F3/3066 ,  H03F3/3071 ,  H03F3/45085 ,  H03F2200/411 ,  H03F2200/451 ,  H03F2200/537 ,  H03F2203/45172 ,  H03F2203/45228 ,  H03F2203/45481 ,  H03F2203/45621 ,  H03F2203/45731

Abstract: A push-pull amplifier includes a pair of active devices driving the primary side of a double distributed active transformer (DDAT). The primary side of the DDAT includes a cascaded arrangement of primary windings of a first set of transformers with the active devices coupled ends of cascaded arrangement of primary windings. The secondary side of the DDAT includes a cascaded arrangement of secondary windings of a second set of transformers coupled to a load. Secondary windings of the first set of transformers drive inputs of respective active stages. Outputs of the active stages drive respective primary windings of the second set of transformers.

公开(公告)号：US20170117814A1

公开(公告)日：2017-04-27

申请号：US15344288

申请日：2016-11-04

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Claudio Adragna ,  Giovanni Gritti

IPC: H02M3/335 ,  H02M1/36 ,  H02M1/32 ,  H02M1/08

CPC classification number: H02M3/33523 ,  H02M1/08 ,  H02M1/32 ,  H02M1/36 ,  H02M1/42 ,  H02M1/4258 ,  H02M2001/0009 ,  H02M2001/0058

Abstract: The present disclosure is directed to a high power factor quasi resonant converter. The converter converts an AC power line input to a DC output to power a load, generally a string of LEDs. The power input is fed into a transformer being controlled by a power switch. The power switch is driven by a controller having a shaping circuit. The shaping circuit uses a current generator, switched resistor and capacitor to produce a sinusoidal reference voltage signal. The controller drives the power switch based on the voltage reference signal, resulting in a sinusoidal input current in a primary winding of the transformer, resulting in high power factor and low total harmonic distortion for the converter.

公开(公告)号：US20170116447A1

公开(公告)日：2017-04-27

申请号：US15199547

申请日：2016-06-30

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Carlo CIMINO ,  Marco ALFARANO

IPC: G06K7/10 ,  H04L29/06 ,  H04L9/06

CPC classification number: G06K7/10366 ,  G06K7/10297 ,  H04L9/0625 ,  H04L9/0631 ,  H04L9/0643 ,  H04L9/3234 ,  H04L63/0435 ,  H04L63/0442 ,  H04L2209/805

Abstract: A tag adapted to be applied to an object is disclosed. The tag includes a wireless communication interface, a processor and a memory. A univocal code, a cipher key and a count value are store in the memory. The tag generates a dynamic code as a function of the cipher key and the count value. Next, the tag varies the count value according to a determined operation, and stores the varied count value in the memory. The tag transmits the univocal code and the dynamic code to a reader device. The tag may transmit the univocal code and the dynamic code in a URL.

公开(公告)号：US20170115341A1

公开(公告)日：2017-04-27

申请号：US15401435

申请日：2017-01-09

Applicant: STMicroelectronics S.r.l.

Inventor： Fabiano Frigoli ,  Giuseppe Ballotta ,  Massimo Greppi ,  Luca Giuseppe Falorni ,  Paolo Aranzulla

IPC: G01R31/28 ,  G01R1/04

CPC classification number: G01R31/2887 ,  G01R1/0408 ,  G01R1/0483 ,  G01R31/2891 ,  G01R31/2893

Abstract: A for positioning a miniaturized piece includes a positioning structure that forms a first cavity designed to receive with play the miniaturized piece and a second cavity communicating with the first cavity. At least one electrical-contact terminal is provided facing the second cavity and is electrically coupleable to an electronic testing device designed to carry out an electrical test on the miniaturized piece. An actuator device causes a vibration of the positioning structure such that the vibration translates the miniaturized piece towards the second cavity until it penetrates at least in part into the second cavity.

公开(公告)号：US20170110970A1

公开(公告)日：2017-04-20

申请号：US15157711

申请日：2016-05-18

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Tours) SAS

Inventor： Roberto Larosa ,  Giulio Zoppi ,  Laurent Gonthier

IPC: H02M3/335 ,  H02M1/42 ,  H02M1/08

CPC classification number: H02M3/33507 ,  H02M1/08 ,  H02M1/081 ,  H02M1/36 ,  H02M1/42 ,  H02M7/062 ,  H02M7/125 ,  H02M2001/0006

Abstract: A rectifier bridge circuit includes a first SCR/IGBT switch and a second SCR/IGBT switch coupled to a circuit input to receive an ac input voltage. The first and second SCR/IGBT switches are alternatively switchable to generate a rectified voltage at a circuit output. Control currents coupled to control terminals of the first and second SCR/IGBT switches are power supply sourced from an auxiliary dc source generated by rectifying the ac input voltage. The control currents are generated by current sources coupled between the auxiliary dc source and the control terminals of the first and second SCR/IGBT switches. The current sources are selectively activatable to produce gating currents for switching on and off the first and second SCR/IGBT switches. A controller unit is provided to control the current sources via level shifter circuits. The control implements progressive conduction time of the first and second SCR/IGBT switches so as to provide inrush current limitation.

公开(公告)号：US09628098B2

公开(公告)日：2017-04-18

申请号：US14640682

申请日：2015-03-06

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Andrea Lorenzo Vitali

IPC: G06G7/12 ,  G06G7/16 ,  H03M1/12 ,  G01D3/024 ,  H04N5/235 ,  H04R3/00 ,  H04N5/232

CPC classification number: H03M1/12 ,  G01D3/024 ,  H03M1/1205 ,  H04N5/23258 ,  H04N5/2355 ,  H04R3/005 ,  H04S2400/09

Abstract: The present disclosure is directed to multichannel transducer devices and methods of operation thereof. One example device includes at least two acquisition modules that have different sensitives and a signal processing stage that generates a blended signal representative of a lower gain signal mapped onto a higher gain signal. One example method of operation includes receiving a first signal from a first sensor having a first sensitivity, receiving a second signal from a second sensor having a second sensitivity that is different from the first sensitivity, generating a blended signal by mapping the second signal to the first signal, outputting the first signal while the first signal is below a first threshold and above a second threshold, and outputting the blended signal when the first signal is above the first threshold and when the first signal is below the second threshold.

公开(公告)号：US09613692B1

公开(公告)日：2017-04-04

申请号：US14971488

申请日：2015-12-16

Applicant: STMICROELECTRONICS INTERNATIONAL N.V. ,  STMICROELECTRONICS S.R.L.

Inventor： Marco Pasotti ,  Marcella Carissimi ,  Rajat Kulshrestha ,  Chantal Auricchio

IPC: G11C13/00

CPC classification number: G11C13/004 ,  G11C7/065 ,  G11C7/08 ,  G11C13/0004 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/0061 ,  G11C13/0097 ,  G11C2013/0042 ,  G11C2207/002

Abstract: A memory device includes an array of phase-change memory (PCM) cells and complementary PCM cells. A column decoder is coupled to the array of PCM cells and complementary PCM cells, and a sense amplifier is coupled to the column decoder. The sense amplifier includes a current integrator configured to receive first and second currents of a given PCM cell and complementary PCM cell, respectively. A current-to-voltage converter is coupled to the current integrator and is configured to receive the first and second currents, and to provide first and second voltages of the given PCM cell and complementary PCM cell to first and second nodes, respectively. A logic circuit is coupled to the first and second nodes and is configured to disable the column decoder and to discharge the bitline and complementary bitline voltages in response to the first and second voltages.

公开(公告)号：US20170093265A1

公开(公告)日：2017-03-30

申请号：US14871322

申请日：2015-09-30

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Alberto Pagani

IPC: H02K35/02 ,  G01P15/18 ,  B81B3/00 ,  G01C19/5776

CPC classification number: B81B3/0021 ,  G01C19/5776 ,  H02K35/02

Abstract: A magnetic energy harvesting and scavenging circuit includes a first substrate having a first surface and a second surface. An energy harvesting and scavenging coil is formed proximate the first surface. An electromechanical systems device, which may be a MEMS device, includes a moveable mass that extends over the first surface of the first substrate and may be displaced relative to the substrate in three dimensions responsive to an external force applied to the moveable mass. The movable mass includes at least one permanent magnet that is magnetically coupled to the energy harvesting and scavenging coil. Energy harvesting and scavenging circuitry, which may be formed in the first substrate where the first substrate is a semiconductor chip, is electrically coupled to the energy harvesting and scavenging coil and generates electrical energy due to magnetic flux variation through the energy harvesting and scavenging coil responsive to movement of the moveable mass.

公开(公告)号：US09607912B2

公开(公告)日：2017-03-28

申请号：US15208269

申请日：2016-07-12

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani ,  Alessandro Finocchiaro

IPC: H01L21/00 ,  H01L21/66 ,  G01R31/28 ,  G01R31/302 ,  H01L23/528 ,  H01L23/00 ,  H01L23/58 ,  H01L23/66 ,  H01L49/02 ,  H01L29/06 ,  H01L23/544 ,  H01L25/065

CPC classification number: H01L28/10 ,  G01R31/2834 ,  G01R31/2889 ,  G01R31/3025 ,  H01L22/32 ,  H01L22/34 ,  H01L23/528 ,  H01L23/544 ,  H01L23/564 ,  H01L23/585 ,  H01L23/66 ,  H01L24/05 ,  H01L25/0657 ,  H01L29/0642 ,  H01L2223/6677 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An integrated circuit on a substrate includes a peripheral portion that surrounds an active area and is positioned close to a scribe line providing separation with other integrated circuits realized on a same wafer. The integrated circuit includes at least one conductive structure that extends in the peripheral portion on different planes of metallizations starting from the substrate and forms an integrated antenna. Magnetic trench structures are provided adjacent the integrated antenna.

公开(公告)号：US09607859B2

公开(公告)日：2017-03-28

申请号：US14788685

申请日：2015-06-30

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Simona Lorenti ,  Cateno Marco Camalleri ,  Mario Giuseppe Saggio ,  Ferruccio Frisina

IPC: H01L29/76 ,  H01L29/94 ,  H01L21/324 ,  H01L27/088 ,  H01L21/02 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/739 ,  H01L29/78 ,  H01L21/3065 ,  H01L29/73 ,  H01L29/861 ,  H01L29/872

CPC classification number: H01L21/3247 ,  H01L21/02057 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/3065 ,  H01L21/324 ,  H01L27/088 ,  H01L29/045 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/73 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/8611 ,  H01L29/872

Abstract: Process for manufacturing a semiconductor power device, wherein a trench is formed in a semiconductor body having a first conductivity type; the trench is annealed for shaping purpose; and the trench is filled with semiconductor material via epitaxial growth so as to obtain a first column having a second conductivity type. The epitaxial growth is performed by supplying a gas containing silicon and a gas containing dopant ions of the second conductivity type in presence of a halogenide gas and occurs with uniform distribution of the dopant ions. The flow of the gas containing dopant ions is varied according to a linear ramp during the epitaxial growth; in particular, in the case of selective growth of the semiconductor material in the presence of a hard mask, the flow decreases; in the case of non-selective growth, in the absence of hard mask, the flow increases.