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    METHOD OF FABRICATING DAMASCENE STRUCTURES
    83.
    发明申请
    METHOD OF FABRICATING DAMASCENE STRUCTURES 有权
    制备大分子结构的方法

    公开(公告)号：US20120115303A1

    公开(公告)日：2012-05-10

    申请号：US13354371

    申请日：2012-01-20

    申请人： Jeffrey P. Gambino ,  Peter J. Lindgren ,  Anthony K. Stamper

    发明人： Jeffrey P. Gambino ,  Peter J. Lindgren ,  Anthony K. Stamper

    IPC分类号： H01L21/4763 ,  H01L21/02

    CPC分类号： H01L21/76802 ,  H01L21/76807 ,  H01L23/5223 ,  H01L28/40 ,  H01L2221/1021 ,  H01L2221/1063

    摘要： Method of forming wires in integrated circuits. The methods include forming a wire in a first dielectric layer on a substrate; forming a dielectric barrier layer over the wire and the first dielectric layer; forming a second dielectric layer over the barrier layer; forming one or more patterned photoresist layers over the second dielectric layer; performing a reactive ion etch to etch a trench through the second dielectric layer and not through the barrier layer; performing a second reactive ion etch to extend the trench through the barrier layer; and after performing the second reaction ion etch, removing the one or more patterned photoresist layers, a last formed patterned photoresist layer removed using a reducing plasma or a non-oxidizing plasma. The methods include forming wires by similar methods to a metal-insulator-metal capacitor.

    摘要翻译： 在集成电路中形成导线的方法。 所述方法包括在基板上的第一电介质层中形成导线; 在所述导线和所述第一介电层上形成介电阻挡层; 在阻挡层上形成第二电介质层; 在所述第二介电层上形成一个或多个图案化的光致抗蚀剂层; 执行反应离子蚀刻以蚀刻通过第二介电层而不穿过阻挡层的沟槽; 执行第二反应离子蚀刻以将沟槽延伸穿过阻挡层; 并且在执行第二反应离子蚀刻之后，去除一个或多个图案化的光致抗蚀剂层，使用还原等离子体或非氧化等离子体去除最后形成的图案化光致抗蚀剂层。 所述方法包括通过与金属 - 绝缘体 - 金属电容器类似的方法形成导线。

    Method and structure to prevent circuit network charging during fabrication of integrated circuits
    85.
    发明授权
    Method and structure to prevent circuit network charging during fabrication of integrated circuits 失效
    在集成电路制造过程中防止电路网络充电的方法和结构

    公开(公告)号：US08120141B2

    公开(公告)日：2012-02-21

    申请号：US11687711

    申请日：2007-03-19

    申请人： Jeffrey P. Gambino ,  Kirk D. Peterson

    发明人： Jeffrey P. Gambino ,  Kirk D. Peterson

    IPC分类号： H01L21/00 ,  H01L21/82

    CPC分类号： H01L27/1203 ,  H01L23/5256 ,  H01L27/0251 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An integrated circuit and method of fabricating the integrated circuit. The integrated circuit, including: one or more power distribution networks; one or more ground distribution networks; one or more data networks; and fuses temporarily and electrically connecting power, ground or data wires of the same or different networks together, the same or different networks selected from the group consisting of the one or more power distribution networks, the one or more ground distribution networks, the one or more data networks, and combinations thereof.

    摘要翻译： 集成电路及其制造方法。 该集成电路包括：一个或多个配电网络; 一个或多个地面分配网络; 一个或多个数据网络; 并且将相同或不同网络的电力，地线或数据线临时并电连接在一起，从由一个或多个配电网络，一个或多个配电网络，一个或多个配电网络组成的组中选择的相同或不同的网络， 更多数据网络及其组合。

    Variable Focus Point Lens
    89.
    发明申请
    Variable Focus Point Lens 有权
    可变焦点镜头

    公开(公告)号：US20110208482A1

    公开(公告)日：2011-08-25

    申请号：US12708561

    申请日：2010-02-19

    申请人： John J. Ellis-Monaghan ,  Jeffrey P. Gambino ,  Kirk D. Peterson ,  Jed H. Rankin

    发明人： John J. Ellis-Monaghan ,  Jeffrey P. Gambino ,  Kirk D. Peterson ,  Jed H. Rankin

    IPC分类号： G06F17/50 ,  G02B3/12

    CPC分类号： G02B3/14

    摘要： A variable focal point lens includes a transparent tank, which comprises a transparent enclosure containing a transparent flexible membrane separating the inner volume of the transparent tank into an upper tank portion and a lower tank portion. The upper tank portion and the lower tank portion contain liquids having different indices of refraction. The transparent flexible membrane is electrostatically displaced to change the thicknesses of the first tank portion and the second tank portion in the path of the light, thereby shifting the focal point of the lens axially and/or laterally. The electrostatic displacement of the membrane may be effected by a fixed charge in the membrane and an array of enclosure-side conductive structures on the transparent enclosure, or an array of membrane-side conductive structures on the transparent membrane and an array of enclosure-side conductive structures.

    摘要翻译： 可变焦点透镜包括透明容器，透明容器包括透明的外壳，该透明外壳包含将透明容器的内部容积分隔成上部容器部分和下部容器部分的透明柔性膜。 上罐部分和下罐部分含有不同折射率的液体。 透明柔性膜被静电移位以改变光路中的第一罐部分和第二罐部分的厚度，从而轴向和/或横向地移动透镜的焦点。 膜的静电位移可以通过膜中的固定电荷和透明外壳上的封闭侧导电结构阵列，或透明膜上的膜侧导电结构阵列和外壳侧阵列 导电结构。

    METHODS FOR FORMING A BONDED SEMICONDUCTOR SUBSTRATE INCLUDING A COOLING MECHANISM
    90.
    发明申请
    METHODS FOR FORMING A BONDED SEMICONDUCTOR SUBSTRATE INCLUDING A COOLING MECHANISM 有权
    形成包含冷却机构的粘合半导体基板的方法

    公开(公告)号：US20110201151A1

    公开(公告)日：2011-08-18

    申请号：US13038467

    申请日：2011-03-02

    申请人： Jeffrey P. Gambino ,  Anthony K. Stamper

    发明人： Jeffrey P. Gambino ,  Anthony K. Stamper

    IPC分类号： H01L21/60

    CPC分类号： G06F17/5068 ,  H01L23/3672 ,  H01L23/473 ,  H01L23/481 ,  H01L25/0657 ,  H01L27/0688 ,  H01L2224/16 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/12044

    摘要： Bottom sides of two semiconductor substrates are brought together with at least one bonding material layer therebetween and bonded to form a bonded substrate. A cavity with two openings and a contiguous path therebetween is provided within the at least one bonding layer. At least one through substrate via and other metal interconnect structures are formed within the bonded substrate. The cavity is employed as a cooling channel through which a cooling fluid flows to cool the bonded semiconductor substrate during the operation of the semiconductor devices in the bonded substrate. Alternatively, a conductive cooling fin with two end portions and a contiguous path therebetween is formed within the at least one bonding layer. The two end portions of the conductive cooling fin are connected to heat sinks to cool the bonded semiconductor substrate during the operation of the semiconductor devices in the bonded substrate.

    摘要翻译： 将两个半导体衬底的底侧与其间的至少一个接合材料层接合在一起，并结合以形成键合衬底。 在所述至少一个接合层内设置有具有两个开口的腔体和它们之间的连续路径。 在键合衬底内形成至少一个通过衬底通孔和其它金属互连结构。 在该键合衬底中的半导体器件的操作期间，使用该空腔作为冷却通道，通过该冷却通道冷却流体以冷却接合的半导体衬底。 或者，在至少一个接合层内形成具有两个端部的导电冷却翅片和它们之间的连续路径。 导电冷却翅片的两个端部连接到散热器，以在键合衬底中的半导体器件的操作期间冷却接合的半导体衬底。