公开(公告)号：US20090039486A1

公开(公告)日：2009-02-12

申请号：US11912163

申请日：2006-04-26

申请人： Yo Shimazaki ,  Hiroyuki Saito ,  Masachika Masuda ,  Kenji Matsumura ,  Masaru Fukuchi ,  Takao Ikezawa

发明人： Yo Shimazaki ,  Hiroyuki Saito ,  Masachika Masuda ,  Kenji Matsumura ,  Masaru Fukuchi ,  Takao Ikezawa

IPC分类号： H01L23/495 ,  H05K3/10 ,  H05K3/30

CPC分类号： H01L23/3107 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3142 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05647 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/85385 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85464 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

摘要： A circuit member includes a frame substrate formed, by patterning a rolled copper plate or a rolled copper alloy plate, with a die pad portion for a semiconductor chip to be mounted thereon, and a lead portion for an electrical connection to the semiconductor chip, having rough surfaces formed as roughed surfaces on upsides and lateral wall sides of the die pad portion and the lead portion, and smooth surfaces formed on downsides of the die pad portion and the lead portion, and the die pad portion and the lead portion are buried in a sealing resin, having a downside of the lead portion exposed.

摘要翻译： 电路构件包括通过将轧制的铜板或轧制的铜合金板图案化以安装在其上的用于半导体芯片的芯片焊盘部分形成的框架基板和用于与半导体芯片的电连接的引线部分，具有 在芯片焊盘部分和引线部分的上侧和侧壁侧形成粗糙表面的粗糙表面以及形成在芯片焊盘部分和引线部分的下侧以及芯片焊盘部分和引线部分的平滑表面被埋入 密封树脂，其具有暴露的引线部分的下侧。

公开(公告)号：US20080251902A1

公开(公告)日：2008-10-16

申请号：US12213277

申请日：2008-06-17

申请人： Masachika Masuda ,  Chikao Ikenaga

发明人： Masachika Masuda ,  Chikao Ikenaga

IPC分类号： H01L23/28 ,  H01L21/48

CPC分类号： H01L24/06 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49551 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2224/85 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A plastic package includes a plurality of terminal members each having an outer terminal, an inner terminal, and a connecting part connecting the outer and the inner terminal; a semiconductor device provided with terminal pads connected to the inner terminals with bond wires; and a resin molding sealing the terminal members, the semiconductor device and the bond wires therein. The inner terminals of the terminal members are thinner than the outer terminals and have contact surfaces. The upper, the lower and the outer side surfaces of the outer terminals, and the lower surfaces of the semiconductor device are exposed outside. The inner terminals, the bond wires, the semiconductor device and the resin molding are included in the thickness of the outer terminals.

摘要翻译： 塑料包装件包括多个端子构件，每个端子构件具有外端子，内端子和连接外端子和内端子的连接部件; 半导体器件，其具有用接合线连接到内部端子的端子焊盘; 以及密封端子部件，半导体器件和接合线的树脂成型体。 端子构件的内部端子比外部端子薄，并且具有接触表面。 外部端子的上部，下部和外侧表面以及半导体器件的下表面暴露在外部。 内端子，接合线，半导体器件和树脂模制件包括在外端子的厚度中。

公开(公告)号：US07239011B2

公开(公告)日：2007-07-03

申请号：US11204047

申请日：2005-08-16

申请人： Tamaki Wada ,  Hirotaka Nishizawa ,  Masachika Masuda ,  Kenji Osawa ,  Junichiro Osako ,  Satoshi Hatakeyama ,  Haruji Ishihara ,  Kazuo Yoshizaki ,  Kazunori Furusawa

发明人： Tamaki Wada ,  Hirotaka Nishizawa ,  Masachika Masuda ,  Kenji Osawa ,  Junichiro Osako ,  Satoshi Hatakeyama ,  Haruji Ishihara ,  Kazuo Yoshizaki ,  Kazunori Furusawa

IPC分类号： H01L23/02 ,  H05K1/14

CPC分类号： G06K19/077 ,  G06K19/07732 ,  G06K19/07737 ,  G06K19/07739 ,  G06K19/07743 ,  G11C5/04 ,  H01L23/5388 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/181 ,  H05K5/026 ,  H05K5/0282 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： On an adapter mounting portion 3a having a projecting cross section which is formed on a cap 3 of a small-sized memory card 1, a recessed portion of an adapter 2 side is fitted so that both parts are formed as an integral unit in a replaceable manner. Accordingly, the small-sized memory card 1 can maintain the dimensional compatibility with respect to existing memory cards whereby the small-sized memory card 1 can be used also in equipment which is designed to cope with the existing memory cards.

摘要翻译： 在具有形成在小型存储卡1的盖3上的突出横截面的适配器安装部分3a上，适配器2侧的凹部装配成两个部分作为整体单元形成在 可更换的方式。 因此，小型存储卡1可以保持与现有存储卡的尺寸兼容性，由此小尺寸存储卡1也可以用于被设计为处理现有存储卡的设备中。

公开(公告)号：US07227251B2

公开(公告)日：2007-06-05

申请号：US11114175

申请日：2005-04-26

申请人： Kazuki Sakuma ,  Masayasu Kawamura ,  Yasushi Takahashi ,  Masachika Masuda ,  Tamaki Wada ,  Michiaki Sugiyama ,  Hirotaka Nishizawa ,  Toshio Sugano

发明人： Kazuki Sakuma ,  Masayasu Kawamura ,  Yasushi Takahashi ,  Masachika Masuda ,  Tamaki Wada ,  Michiaki Sugiyama ,  Hirotaka Nishizawa ,  Toshio Sugano

IPC分类号： H01L23/02 ,  H01L23/48 ,  G11C8/00

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L23/49537 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01055 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device is formed by laminating two semiconductor chips with the rear surfaces thereof provided face to face. Each semiconductor chip is provided with an outer lead for clock enable to which the clock enable signal and chip select signal are individually input. On the occasion of making access to one semiconductor chip, the other semiconductor chip is set to the low power consumption mode by setting the clock enable signal and chip select signal to the non-active condition.

摘要翻译： 半导体器件通过层叠两个半导体芯片与其背面面对面设置而形成。 每个半导体芯片设置有用于时钟使能的外部引线，时钟使能信号和芯片选择信号被单独地输入。 在访问一个半导体芯片的情况下，通过将时钟使能信号和芯片选择信号设置为非活动状态，将另一个半导体芯片设置为低功耗模式。

公开(公告)号：US20060220204A1

公开(公告)日：2006-10-05

申请号：US11431074

申请日：2006-05-10

申请人： Tamaki Wada ,  Hirotaka Nishizawa ,  Masachika Masuda ,  Kenji Osawa ,  Junichiro Osako ,  Satoshi Hatakeyama ,  Haruji Ishihara ,  Kazuo Yoshizaki ,  Kazunori Furusawa

发明人： Tamaki Wada ,  Hirotaka Nishizawa ,  Masachika Masuda ,  Kenji Osawa ,  Junichiro Osako ,  Satoshi Hatakeyama ,  Haruji Ishihara ,  Kazuo Yoshizaki ,  Kazunori Furusawa

IPC分类号： H01L23/02

CPC分类号： G06K19/077 ,  G06K19/07732 ,  G06K19/07737 ,  G06K19/07739 ,  G06K19/07743 ,  G11C5/04 ,  H01L23/5388 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/181 ,  H05K5/026 ,  H05K5/0282 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： On an adapter mounting portion 3a having a projecting cross section which is formed on a cap 3 of a small-sized memory card 1, a recessed portion of an adapter 2 side is fitted so that both parts are formed as an integral unit in a replaceable manner. Accordingly, the small-sized memory card 1 can maintain the dimensional compatibility with respect to existing memory cards whereby the small-sized memory card 1 can be used also in equipment which is designed to cope with the existing memory cards.

摘要翻译： 在具有形成在小型存储卡1的盖3上的突出横截面的适配器安装部分3a上，适配器2侧的凹部装配成两个部分作为整体单元形成在 可更换的方式。 因此，小型存储卡1可以保持与现有存储卡的尺寸兼容性，由此小尺寸存储卡1也可以用于被设计为处理现有存储卡的设备中。

公开(公告)号：US20060220203A1

公开(公告)日：2006-10-05

申请号：US11431072

申请日：2006-05-10

申请人： Tamaki Wada ,  Hirotaka Nishizawa ,  Masachika Masuda ,  Kenji Osawa ,  Junichiro Osako ,  Satoshi Hatakeyama ,  Haruji Ishihara ,  Kazuo Yoshizaki ,  Kazunori Furusawa

发明人： Tamaki Wada ,  Hirotaka Nishizawa ,  Masachika Masuda ,  Kenji Osawa ,  Junichiro Osako ,  Satoshi Hatakeyama ,  Haruji Ishihara ,  Kazuo Yoshizaki ,  Kazunori Furusawa

IPC分类号： H01L23/02

CPC分类号： G06K19/077 ,  G06K19/07732 ,  G06K19/07737 ,  G06K19/07739 ,  G06K19/07743 ,  G11C5/04 ,  H01L23/5388 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/181 ,  H05K5/026 ,  H05K5/0282 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： On an adapter mounting portion 3a having a projecting cross section which is formed on a cap 3 of a small-sized memory card 1, a recessed portion of an adapter 2 side is fitted so that both parts are formed as an integral unit in a replaceable manner. Accordingly, the small-sized memory card 1 can maintain the dimensional compatibility with respect to existing memory cards whereby the small-sized memory card 1 can be used also in equipment which is designed to cope with the existing memory cards.

公开(公告)号：US20060170084A1

公开(公告)日：2006-08-03

申请号：US11392689

申请日：2006-03-30

申请人： Masachika Masuda ,  Toshihiko Usami

发明人： Masachika Masuda ,  Toshihiko Usami

IPC分类号： H01L23/495

CPC分类号： H01L25/0657 ,  B82Y10/00 ,  G06K19/077 ,  G06K19/07732 ,  G11C5/02 ,  H01L22/32 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/5388 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/074 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H05K1/0268 ,  H05K1/117 ,  H05K3/284 ,  H05K2201/10159 ,  H05K2203/1572 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A memory card containing a resin sealed stacking of plural semiconductor chips which are rear surface mounted over a main surface of a base substrate, the rear surface of the substrate being provided with external connection terminals. The relatively lower ones of the stacked semiconductor chips include a memory circuit and may be larger in size than the uppermost chip which contains a control circuit. Resin sealed wiring connections between bonding pads on the main surface of the respective chips and corresponding ones of electrodes on the main surface of the substrate are arranged so as to avoid crossovers between them, with respect to a plan view thereof. A resin cap may be used to cover the main surface side of the base substrate, which has the resin sealed semiconductor chips mounted thereon.

摘要翻译： 一种存储卡，其包含后表面安装在基底基板的主表面上的多个半导体芯片的树脂密封堆叠，所述基板的后表面设置有外部连接端子。 层叠的半导体芯片中相对较低的半导体芯片包括存储器电路，并且其尺寸可以大于包含控制电路的最上面的芯片。 布置相应芯片主表面上的焊盘与基板主表面上的相应电极之间的树脂密封接线，以避免它们之间的交叉。 可以使用树脂盖来覆盖安装在其上的树脂密封半导体芯片的基底基板的主表面侧。

公开(公告)号：US06858925B2

公开(公告)日：2005-02-22

申请号：US10240187

申请日：2001-12-28

申请人： Tamaki Wada ,  Hirotaka Nishizawa ,  Masachika Masuda ,  Kenji Osawa ,  Junichiro Osako ,  Satoshi Hatakeyama ,  Haruji Ishihara ,  Kazuo Yoshizaki ,  Kazunori Furusawa

发明人： Tamaki Wada ,  Hirotaka Nishizawa ,  Masachika Masuda ,  Kenji Osawa ,  Junichiro Osako ,  Satoshi Hatakeyama ,  Haruji Ishihara ,  Kazuo Yoshizaki ,  Kazunori Furusawa

IPC分类号： G06K19/077 ,  G11C5/00 ,  H01L23/02 ,  H05K5/02 ,  H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10 ,  H05K7/12

CPC分类号： G06K19/077 ,  G06K19/07732 ,  G06K19/07737 ,  G06K19/07739 ,  G06K19/07743 ,  G11C5/04 ,  H01L23/5388 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/181 ,  H05K5/026 ,  H05K5/0282 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： On an adapter mounting portion 3a having a projecting cross section which is formed on a cap 3 of a small-sized memory card 1, a recessed portion of an adapter 2 side is fitted so that both parts are formed as an integral unit in a replaceable manner. Accordingly, the small-sized memory card 1 can maintain the dimensional compatibility with respect to existing memory cards whereby the small-sized memory card 1 can be used also in equipment which is designed to cope with the existing memory cards.

摘要翻译： 在具有形成在小型存储卡1的盖3上的具有突出横截面的适配器安装部分3a上，适配器2侧的凹部装配成两个部分作为整体单元形成为可更换的 方式。 因此，小型存储卡1可以保持与现有存储卡的尺寸兼容性，由此小尺寸存储卡1也可以用于被设计为处理现有存储卡的设备中。

公开(公告)号：US06797539B2

公开(公告)日：2004-09-28

申请号：US10439110

申请日：2003-05-16

申请人： Tsutomu Wada ,  Masachika Masuda

发明人： Tsutomu Wada ,  Masachika Masuda

IPC分类号： H01L2144

CPC分类号： H01L21/44 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2223/54406 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/92247 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45147 ,  H01L2924/00015 ,  H01L2224/05599

摘要： For the manufacturing of semiconductor devices, in which multiple semiconductor chips which are mounted on a wiring substrate are processed for block molding and thereafter the wiring substrate is diced into individual resin-molded semiconductor devices, here is disclosed a technique for finding out easily, even after the dicing process, the position of each resin-molded semiconductor device in its former state on the wiring substrate. It includes processing steps of implementing the block molding with resin for multiple semiconductor chips mounted on a wiring substrate and thereafter dicing the wiring substrate into individual resin-molded semiconductor devices, with the substrate dicing step being preceded by a step of appending an address information pattern to each of the resin-molded semiconductor devices.

摘要翻译： 对于其中安装在布线基板上的多个半导体芯片被加工用于块模制的半导体器件的制造，然后将布线基板切割成单独的树脂模制半导体器件，这里公开了一种容易发现的技术，甚至 在切割处理之后，将各树脂模制半导体器件的状态处于布线基板的状态。 其包括对安装在布线基板上的多个半导体芯片实施具有树脂的嵌段成型的处理步骤，之后将布线基板切割成单独的树脂模制半导体器件，其中基板切割步骤之前是附加地址信息图案 到每个树脂模制半导体器件。

公开(公告)号：US06617196B2

公开(公告)日：2003-09-09

申请号：US10024364

申请日：2001-12-21

申请人： Akihiko Iwaya ,  Toshio Sugano ,  Susumu Hatano ,  Yutaka Kagaya ,  Masachika Masuda

发明人： Akihiko Iwaya ,  Toshio Sugano ,  Susumu Hatano ,  Yutaka Kagaya ,  Masachika Masuda

IPC分类号： H01L2144

CPC分类号： H01L21/563 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48479 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85986 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01055 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/15151 ,  H01L2924/15162 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85186 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554

摘要： A semiconductor device capable of improving the flexibility of designing electrical lead patterns for connection from chips via a substrate to external terminals by appropriately arranging the substrate structure and layout of more than one address signal as commonly shared by four separate chips is disclosed. In a surface mount type package of ball grid array (BGA), four chips 1 are mounted on a substrate 2 in such a manner such these are laid out in the form of an array of two rows and two columns. These four chips 1 are such that regarding the upper side and lower side, these are in linear symmetry with respect to a center line extending in a direction along long side edges of the substrate 2. Each chip 1 has a plurality of pads 9 which are disposed thereon into an almost linear array substantially along the center line in the direction of short side edges, which pads include addressing pads 9a that are located on the side of central part on a specified plane of the substrate 2, and control-use pads 9b of control signals that are also placed on the center side of the substrate 2. The pad array also includes input/output pads 9c that are disposed so that these are on the peripheral side on the surface of substrate 2.