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公开(公告)号：US6136047A
公开(公告)日：2000-10-24
申请号：US222316
申请日：1998-12-29
CPC分类号： H01L24/12 , H01L24/11 , H01L24/17 , H05K3/3457 , H01L2224/11003 , H01L2224/11334 , H01L2224/1143 , H01L2224/11849 , H01L2224/13027 , H01L2224/13099 , H01L2224/1701 , H01L2924/00013 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01051 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/351 , H05K2201/0317 , H05K2203/0338 , H05K3/048 , Y10T29/41
摘要： A solder bump transfer plate having a plurality of solder deposits on the surface non-wettable to molten solder both diameter and spacing of which are both smaller than diameter and spacing of the terminal pads on a semiconductor substrate.
摘要翻译： 一种焊料凸块传递板，其具有在不能润湿熔融焊料的表面上的多个焊料沉积物，其两个直径和间距均小于半导体衬底上的端子焊盘的直径和间距。
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2.发明授权Process of fabricating semiconductor unit employing bumps to bond two components 失效制造半导体单元的方法，该半导体单元采用凸块来结合两个部件
公开(公告)号：US6121062A
公开(公告)日：2000-09-19
申请号：US606503
申请日：1996-02-23
CPC分类号： H01L24/13 , H01L24/11 , H01L24/81 , H01L22/12 , H01L2224/13099 , H01L2224/13109 , H01L2224/13111 , H01L2224/81136 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/12043 , H05K3/3431
摘要： A bump forming step forms a predetermined number of bumps on at least a first one of two components. A height measuring step measures the heights of the predetermined number of bumps. A fixing step fixes the two components together by means of the bumps with the distance between the two components determined, using the result of the height measurement, so that all of the predetermined number of bumps should come in contact with the second one of the two components. An oxide-film removing step removes the oxide film formed on the predetermined number of bumps after the height measuring step and before the fixing step. The fixing step comprises a press fixing step for press fixing the two components at the above distance by means of a press fixing method, and a melting step for causing the bumps to melt in a predetermined atmosphere so that the bumps firmly join the two components together. The distance is established by at least one of the press fixing step and the melting step.
摘要翻译： 凸起形成步骤在两个部件中的至少第一个部件上形成预定数量的凸块。 高度测量步骤测量预定数量的凸块的高度。 固定步骤通过使用高度测量的结果确定的两个部件之间的距离通过凸块将两个部件固定在一起，使得所有预定数量的凸块应该与两个部件中的第二个部件接触 组件。 氧化膜去除步骤在高度测量步骤之后和定影步骤之前去除在预定数量的凸块上形成的氧化膜。 定影步骤包括用于通过压力定影方法将两个部件压在上述距离处的压力固定步骤，以及用于使凸起在预定的气氛中熔化的熔化步骤，使得凸块牢固地将两个部件连接在一起 。 通过压力固定步骤和熔融步骤中的至少一个来建立距离。
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3.发明申请Capacitor and semiconductor device and method for fabricating the semiconductor device 有权用于制造半导体器件的电容器和半导体器件及方法公开(公告)号：US20050156279A1
公开(公告)日：2005-07-21
申请号：US11059469
申请日：2005-02-16
IPC分类号： H01L21/02 , H01L21/768 , H01L23/498 , H01L23/50 , H01L23/522 , H01L23/64 , H01L27/08 , H01L29/00 , H01L21/338
CPC分类号： H01L27/0805 , H01L21/76885 , H01L21/76898 , H01L23/3114 , H01L23/49822 , H01L23/50 , H01L23/5223 , H01L23/642 , H01L24/05 , H01L24/06 , H01L24/94 , H01L24/97 , H01L25/16 , H01L28/55 , H01L2224/05568 , H01L2224/05573 , H01L2224/06051 , H01L2224/14051 , H01L2224/14181 , H01L2224/16 , H01L2224/16235 , H01L2224/16265 , H01L2224/32265 , H01L2224/73204 , H01L2224/94 , H01L2224/97 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19103 , H01L2924/19104 , H01L2924/3011 , H01L2224/83 , H01L2224/81 , H01L2924/00 , H01L2224/05599 , H01L2224/1403
摘要： A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.
摘要翻译： 电容器包括形成在基板10上的第一导电膜12，形成在第一导电膜上的第一电介质膜14，形成在第一电介质膜上的第二导电膜18，形成在第二导电膜上方的第二电介质膜22， 覆盖第二导电膜的边缘，形成在第二电介质膜上方的第三导电膜34，覆盖覆盖第二导电膜边缘的第二电介质膜的一部分。 电容器还包括覆盖第二导电膜的边缘或第二电介质膜的一部分的绝缘膜28。 在第二导电膜的边缘附近的区域内的第二导电膜和第三导电膜之间的绝缘膜的有效厚度可以增加，由此在第二导电膜的边缘附近的区域中的电场浓度。 因此，电容器可以具有大的电容而不降低电阻。
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4.发明授权Integrated electronic device having flip-chip connection with circuit board and fabrication method thereof 失效具有与电路板倒装芯片连接的集成电子装置及其制造方法
公开(公告)号：US5611481A
公开(公告)日：1997-03-18
申请号：US504080
申请日：1995-07-19
IPC分类号： B23K35/26 , H01L21/60 , H01L23/485 , H05K3/34 , H01L21/58
CPC分类号： H01L24/16 , B23K35/26 , H01L24/13 , H01L24/81 , H05K3/3436 , H01L2224/1147 , H01L2224/13109 , H01L2224/13111 , H01L2224/13201 , H01L2224/13211 , H01L2224/133 , H01L2224/16506 , H01L2224/81097 , H01L2224/81191 , H01L2224/81192 , H01L2224/81201 , H01L2224/81805 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/351 , Y02P70/613
摘要： An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.
摘要翻译： 一种在半导体芯片的第一电极和电路板的第二电极之间具有电连接的集成电子设备。 根据本发明的一个实施例是一种用于制造在半导体芯片的第一电极和电路板的第二电极之间具有电连接的集成电子器件的方法，所述第一和第二电极的两个表面具有粘合倾向 所述方法包括以下步骤：在所述第一电极上形成金属凸块，所述金属凸块由在工作温度下由固相组分和液相组分组成的焊接金属合金制成; 以及通过加热所述焊接金属合金以在所述第一电极和所述第二电极的表面之间形成电连接。
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公开(公告)号：US5284796A
公开(公告)日：1994-02-08
申请号：US939695
申请日：1992-09-02
IPC分类号： H01L21/60 , H05K3/30 , H05K3/34 , H01L21/283 , H01L21/58
CPC分类号： H01L24/81 , H01L2224/10135 , H01L2224/1134 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/45124 , H01L2224/45144 , H01L2224/81001 , H01L2224/81136 , H01L2224/81191 , H01L2224/81193 , H01L2224/81801 , H01L2924/00013 , H01L2924/00014 , H01L2924/01013 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/12033 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H05K3/303 , H05K3/3431
摘要： A process for a flip chip connection of a semiconductor chip includes the steps of forming a plurality of stud bumps on the semiconductor chip, on which a plurality of solder bumps are formed, in the vicinity of the outer periphery thereof and on the outside of the solder bumps, providing a cut groove between a plurality of the solder bumps and the stud bumps, mating the solder bumps on the semiconductor chip and the corresponding solder bumps on the circuit board and heating for subsequent integration of the mating solder bumps, and breaking way the outer peripheral portion of the semiconductor chip along the cutting groove after a flip chip connection in order to remove the stud bumps.
摘要翻译： 一种用于半导体芯片的倒装芯片连接的方法包括以下步骤：在半导体芯片的外周附近形成有多个焊料凸块的半导体芯片上形成多个凸块凸块， 焊料凸起，在多个焊料凸块和凸块凸块之间提供切割槽，将半导体芯片上的焊料凸块与电路板上的相应焊料凸块配合，并加热用于随后的配合焊料凸块的集成，以及断开方式 在倒装芯片连接之后沿着切割凹槽的半导体芯片的外周部分，以便去除凸块凸块。
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6.发明授权Semiconductor device having passive component and support substrate with electrodes and through electrodes passing through support substrate 有权具有无源元件和支撑衬底的半导体器件具有电极和穿过支撑衬底的电极公开(公告)号：US07339277B2
公开(公告)日：2008-03-04
申请号：US11059469
申请日：2005-02-16
IPC分类号： H05K1/16
CPC分类号： H01L27/0805 , H01L21/76885 , H01L21/76898 , H01L23/3114 , H01L23/49822 , H01L23/50 , H01L23/5223 , H01L23/642 , H01L24/05 , H01L24/06 , H01L24/94 , H01L24/97 , H01L25/16 , H01L28/55 , H01L2224/05568 , H01L2224/05573 , H01L2224/06051 , H01L2224/14051 , H01L2224/14181 , H01L2224/16 , H01L2224/16235 , H01L2224/16265 , H01L2224/32265 , H01L2224/73204 , H01L2224/94 , H01L2224/97 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19103 , H01L2924/19104 , H01L2924/3011 , H01L2224/83 , H01L2224/81 , H01L2924/00 , H01L2224/05599 , H01L2224/1403
摘要： A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.
摘要翻译： 电容器包括形成在基板10上的第一导电膜12，形成在第一导电膜上的第一电介质膜14，形成在第一电介质膜上的第二导电膜18，形成在第二导电膜上方的第二电介质膜22， 覆盖第二导电膜的边缘，形成在第二电介质膜上方的第三导电膜34，覆盖覆盖第二导电膜边缘的第二电介质膜的一部分。 电容器还包括覆盖第二导电膜的边缘或第二电介质膜的一部分的绝缘膜28。 在第二导电膜的边缘附近的区域中，第二导电膜和第三导电膜之间的绝缘膜的有效厚度可以增加，由此在第二导电膜的边缘附近的区域中的电场浓度。 因此，电容器可以具有大的电容而不降低电阻。
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7.发明授权Capacitor and semiconductor device and method for fabricating the semiconductor device 有权用于制造半导体器件的电容器和半导体器件及方法公开(公告)号：US06873038B2
公开(公告)日：2005-03-29
申请号：US10629761
申请日：2003-07-30
IPC分类号： H01L21/02 , H01L21/768 , H01L23/498 , H01L23/50 , H01L23/522 , H01L23/64 , H01L27/08 , H01L21/44
CPC分类号： H01L27/0805 , H01L21/76885 , H01L21/76898 , H01L23/3114 , H01L23/49822 , H01L23/50 , H01L23/5223 , H01L23/642 , H01L24/05 , H01L24/06 , H01L24/94 , H01L24/97 , H01L25/16 , H01L28/55 , H01L2224/05568 , H01L2224/05573 , H01L2224/06051 , H01L2224/14051 , H01L2224/14181 , H01L2224/16 , H01L2224/16235 , H01L2224/16265 , H01L2224/32265 , H01L2224/73204 , H01L2224/94 , H01L2224/97 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19103 , H01L2924/19104 , H01L2924/3011 , H01L2224/83 , H01L2224/81 , H01L2924/00 , H01L2224/05599 , H01L2224/1403
摘要： A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.
摘要翻译： 电容器包括形成在基板10上的第一导电膜12，形成在第一导电膜上的第一电介质膜14，形成在第一电介质膜上的第二导电膜18，形成在第二导电膜上方的第二电介质膜22， 覆盖第二导电膜的边缘，形成在第二电介质膜上方的第三导电膜34，覆盖覆盖第二导电膜边缘的第二电介质膜的一部分。 电容器还包括覆盖第二导电膜的边缘或第二电介质膜的一部分的绝缘膜28。 在第二导电膜的边缘附近的区域中，第二导电膜和第三导电膜之间的绝缘膜的有效厚度可以增加，由此在第二导电膜的边缘附近的区域中的电场浓度。 因此，电容器可以具有大的电容而不降低电阻。
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8.发明申请Substrate with terminal pads having respective single solder bumps formed thereon 审中-公开具有终端焊盘的衬底，其上形成有各自的单个焊料凸块公开(公告)号：US20050062157A1
公开(公告)日：2005-03-24
申请号：US10980788
申请日：2004-11-04
CPC分类号： H01L24/12 , H01L24/11 , H01L24/17 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05644 , H01L2224/11003 , H01L2224/11334 , H01L2224/1143 , H01L2224/11849 , H01L2224/13027 , H01L2224/13099 , H01L2224/1701 , H01L2924/00013 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01051 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/351 , H05K3/048 , H05K3/3457 , H05K2201/0317 , H05K2203/0338 , H01L2224/29099 , H01L2924/00 , H01L2924/00012 , H01L2924/00014 , H01L2924/013
摘要： Methods and apparatus for forming solder bumps on terminal pads of a semiconductor substrate for an integrated circuit device employ a solder bump transfer plate and a mask to form solder deposits on the plate. One embodiment of the invention employs a metal mask having a plurality of through holes for forming solder deposits on the solder bump transfer plate by vapor phase deposition through the through holes each area of which increases in step wise from the first surface of the mask to the second surface opposite to the first surface, thereby preventing solder deposits in the through holes from being removed when the mask is separated from the plate. Another embodiment of the invention is a solder bump transfer plate having a plurality of solder deposits on the surface non-wettable to molten solder both diameter and spacing of which are both smaller than diameter and spacing of the terminal pads on the semiconductor substrate, whereby a single solder bump is accurately formed on each of the terminal pads without a fine alignment technique.
摘要翻译： 用于在集成电路器件的半导体衬底的端子焊盘上形成焊料凸块的方法和装置采用焊料凸块转移板和掩模，以在板上形成焊料沉积物。 本发明的一个实施例采用金属掩模，其具有多个通孔，用于通过气相沉积在焊料凸块转移板上形成焊料沉积，该通孔的每个区域从掩模的第一表面逐步增加到通孔 与第一表面相对的第二表面，从而防止当掩模与板分离时在通孔中的焊料沉积物被去除。 本发明的另一实施例是一种焊料凸块传递板，其具有在不能熔化的焊料的表面上的多个焊料沉积物，其两个直径和间距均小于半导体衬底上的端子焊盘的直径和间距， 在每个端子焊盘上精确地形成单个焊料凸块，而没有精细对准技术。
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9.发明授权Integrated electronic device having flip-chip connection with circuit board and fabrication method thereof 失效具有与电路板倒装芯片连接的集成电子装置及其制造方法公开(公告)号：US06764938B2
公开(公告)日：2004-07-20
申请号：US09392722
申请日：1999-09-09
IPC分类号： H01L2144
CPC分类号： H01L24/16 , B23K35/26 , H01L24/13 , H01L24/81 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05655 , H01L2224/1147 , H01L2224/13109 , H01L2224/13111 , H01L2224/13201 , H01L2224/13211 , H01L2224/133 , H01L2224/16506 , H01L2224/81097 , H01L2224/81191 , H01L2224/81192 , H01L2224/81201 , H01L2224/81805 , H01L2224/81825 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/351 , H05K3/3436 , Y02P70/613 , H01L2924/01083 , H01L2924/01031 , H01L2224/13099 , H01L2224/29099 , H01L2924/00 , H01L2924/00014
摘要： An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.
摘要翻译： 一种在半导体芯片的第一电极和电路板的第二电极之间具有电连接的集成电子设备。 根据本发明的一个实施例是一种用于制造在半导体芯片的第一电极和电路板的第二电极之间具有电连接的集成电子器件的方法，所述第一和第二电极的两个表面具有粘合倾向 所述方法包括以下步骤：在所述第一电极上形成金属凸块，所述金属凸块由在固定相组分和液相组分组成的焊接金属合金在工作温度下制成; 以及通过加热所述焊接金属合金以在所述第一电极和所述第二电极的表面之间形成电连接。
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公开(公告)号：US06624501B2
公开(公告)日：2003-09-23
申请号：US09956944
申请日：2001-09-21
IPC分类号： H01L2900
CPC分类号： H01L27/0805 , H01L21/76885 , H01L21/76898 , H01L23/3114 , H01L23/49822 , H01L23/50 , H01L23/5223 , H01L23/642 , H01L24/05 , H01L24/06 , H01L24/94 , H01L24/97 , H01L25/16 , H01L28/55 , H01L2224/05568 , H01L2224/05573 , H01L2224/06051 , H01L2224/14051 , H01L2224/14181 , H01L2224/16 , H01L2224/16235 , H01L2224/16265 , H01L2224/32265 , H01L2224/73204 , H01L2224/94 , H01L2224/97 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19103 , H01L2924/19104 , H01L2924/3011 , H01L2224/83 , H01L2224/81 , H01L2924/00 , H01L2224/05599 , H01L2224/1403
摘要： A capacitor comprises a first conducting film 12 formed on a substrate 10, a first dielectric film 14 formed on the first conducting film, a second conducting film 18 formed on the first dielectric film, a second dielectric film 22 formed above the second conducting film, covering the edge of the second conducting film, a third conducting film 34 formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film. The capacitor further comprises an insulation film 28 covering the edge of the second conducing film or the part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.
摘要翻译： 电容器包括形成在基板10上的第一导电膜12，形成在第一导电膜上的第一电介质膜14，形成在第一电介质膜上的第二导电膜18，形成在第二导电膜上方的第二电介质膜22， 覆盖第二导电膜的边缘，形成在第二电介质膜上方的第三导电膜34，覆盖覆盖第二导电膜边缘的第二电介质膜的一部分。 电容器还包括覆盖第二导电膜的边缘或第二电介质膜的一部分的绝缘膜28。 在第二导电膜的边缘附近的区域内的第二导电膜和第三导电膜之间的绝缘膜的有效厚度可以增加，由此在第二导电膜的边缘附近的区域中的电场浓度。 因此，电容器可以具有大的电容而不降低电阻。
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