公开(公告)号：US06917143B2

公开(公告)日：2005-07-12

申请号：US10243483

申请日：2002-09-13

申请人： Nobuyuki Matsui ,  Hideo Nagai ,  Tetsushi Tamura ,  Kenzo Hatada

发明人： Nobuyuki Matsui ,  Hideo Nagai ,  Tetsushi Tamura ,  Kenzo Hatada

IPC分类号： F21V29/00 ,  F21S2/00 ,  F21S8/00 ,  F21S8/04 ,  F21V29/02 ,  F21Y101/02 ,  H01L25/075 ,  H01L33/48 ,  H01L33/62 ,  H01L33/64 ,  H05K7/20 ,  H01J33/00

CPC分类号： F21V29/51 ,  F21K9/00 ,  F21S8/033 ,  F21S8/04 ,  F21V29/30 ,  F21V29/56 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L33/648 ,  H01L2924/0002 ,  H01L2924/00

摘要： A lighting apparatus comprises an LED-mounted substrate and an exhauster. The substrate has a flat area as well as one or more raised areas of trapezoidal cross section which each form a passage thereunder. LEDs are mounted on the raised areas. When the LED-mounted substrate is installed on a wall, the passages are enclosed by the wall. The exhauster removes the heat from the LEDs by drawing out the air going through inside the passages.

摘要翻译： 照明装置包括LED安装基板和排气器。 衬底具有平坦区域以及梯形横截面的一个或多个凸起区域，每个形成其下面的通道。 LED安装在凸起区域上。 当LED安装的基板安装在墙壁上时，通道被墙壁包围。 排气管通过抽出通道内的空气来消除LED的热量。

公开(公告)号：US5336547A

公开(公告)日：1994-08-09

申请号：US23106

申请日：1993-02-26

申请人： Tetsuo Kawakita ,  Takayuki Yoshida ,  Kenzo Hatada

发明人： Tetsuo Kawakita ,  Takayuki Yoshida ,  Kenzo Hatada

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L23/485 ,  B32B9/00

CPC分类号： H01L24/29 ,  H01L21/563 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81121 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  Y10T428/12014 ,  Y10T428/24917 ,  Y10T428/24926 ,  Y10T428/249968 ,  Y10T428/24997 ,  Y10T428/249986

摘要： The present invention relates to an electronic components mounting/connecting package characterized by using bump electrodes to connect electronic components such as semiconductors and the like with patterning electrodes of a circuit board.In order to prevent deterioration in connecting reliability due to deformation and the like of semiconductors and circuit boards, it is necessary to have some elasticity incorporated with bump electrodes. The composition of bump electrodes disclosed by the present invention is to have resin particles dispersed to high density in the metallic bump electrodes.According to this composition, even when there are some variations of distribution in circuit board warp and bump electrode height, it has become possible to absorb the variations through elasticity presented by the bump electrodes and to perform a low strain connection with a resultant enhancement in connecting reliability at high temperature.

摘要翻译： 电子元件安装/连接封装技术领域本发明涉及一种电子元件安装/连接封装，其特征在于使用凸块电极将电子元件如半导体等与电路板的图形电极连接。 为了防止由于半导体和电路板的变形等引起的连接可靠性的劣化，需要具有凸起电极的一些弹性。 本发明公开的凸块电极的组成是在金属凸块电极中具有高密度分散的树脂颗粒。 根据该构成，即使在电路板翘曲和凸起电极高度的分布存在一些变化的情况下，也可以通过由凸块电极呈现的弹性吸收变化，并且进行低应变连接，从而提高连接 高温可靠性。

公开(公告)号：US5316204A

公开(公告)日：1994-05-31

申请号：US973636

申请日：1992-11-09

申请人： Shinitsu Takehashi ,  Kenzo Hatada ,  Hiroaki Fujimoto

发明人： Shinitsu Takehashi ,  Kenzo Hatada ,  Hiroaki Fujimoto

IPC分类号： H01L21/60 ,  B23K20/00 ,  B23K20/10 ,  H01L21/603 ,  H01L21/607 ,  B23K31/02

CPC分类号： H01L24/85 ,  B23K20/005 ,  B23K20/10 ,  H01L24/50 ,  H01L24/78 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4847 ,  H01L2224/49175 ,  H01L2224/7825 ,  H01L2224/78301 ,  H01L2224/78313 ,  H01L2224/78318 ,  H01L2224/7865 ,  H01L2224/851 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L24/45 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01206 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/351

摘要： A method for bonding leads of a film carrier to electrodes of electronic devices includes a step for positioning the leads and the electrodes with a predetermined clearance aligned to define corresponding pairs of the leads and electrodes, and a step for placing a bonding tool having a conductive bonding material served such that the conductive bonding material is located between the lead and electrode of one of the corresponding pairs. The method further includes a step for pressing the lead of one corresponding pair such that the conductive bonding material is pressed between the lead and the electrode, thereby bonding the lead and electrode. After bonding, the conductive bonding material is pulled to cut and leave the bonded conductive bonding material. Then, while the bonding tool is released from the bonded pair, the conductive bonding material is served to the bonding tool for the next bonding operation.

摘要翻译： 用于将薄膜载体的引线键合到电子器件的电极的方法包括用于将引线和电极以预定的间隙对准的方式定位以限定相应的引线和电极对的步骤，以及用于放置具有导电 使得导电接合材料位于相应对之一的引线和电极之间的接合材料。 该方法还包括用于按压一个相应对的引线的步骤，使得导电接合材料在引线和电极之间被按压，从而接合引线和电极。 接合后，拉动导电性接合材料以切断并离开接合的导电接合材料。 然后，当接合工具从结合对释放时，导电接合材料被用于接合工具以进行下一次接合操作。

公开(公告)号：US4996583A

公开(公告)日：1991-02-26

申请号：US477542

申请日：1990-02-09

申请人： Kenzo Hatada

发明人： Kenzo Hatada

IPC分类号： H01L23/495 ,  H01L25/065 ,  H05K1/18

CPC分类号： H01L25/0657 ,  H01L23/49572 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06579 ,  H01L2924/0002 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/10681

摘要： In a semiconductor device, an outer lead is divided into plural leads at an outer lead region connected to an inner lead which is connected to an electrode terminal of a semiconductor chip, a plurality of TAB packages on which the semiconductor chip has been packaged are stacked in plural layers, at least one of the plural divided leads every stacked layers is left and a predetermined number of the divided leads are cut out, and these stacked TAB packages are mounted on a circuit board.

公开(公告)号：US4766426A

公开(公告)日：1988-08-23

申请号：US829819

申请日：1986-02-14

申请人： Kenzo Hatada ,  Koji Matsunaga

发明人： Kenzo Hatada ,  Koji Matsunaga

IPC分类号： G02F1/13 ,  H01L21/00 ,  H01L23/495 ,  H05K3/36 ,  G09G3/00

CPC分类号： H01L21/67144 ,  G02F1/13452 ,  H01L23/49572 ,  H01L24/50 ,  H05K3/365 ,  H05K2201/10469 ,  H05K2201/10681

摘要： A display panel assembly has a display panel, a printed circuit board, a plurality of semiconductor devices, and a plurality of film carrier tapes. The display panel has a plurality of electrodes. The printed circuit board is mounted on the display panel. The semiconductor devices are disposed between the electrodes of the display panel and the printed circuit board. Each film carrier tape has an opening and first and second lead group which extend from the tape in two opposite directions. Each lead group has a plurality of leads. One end of each lead group projects from the tape, and other end of each lead group projects into the opening. Each semiconductor device is mounted on a tape and is pressed to contact the electrodes. The one end of the second lead group is connected to the printed circuit board.

摘要翻译： 显示面板组件具有显示面板，印刷电路板，多个半导体器件和多个薄膜载带。 显示面板具有多个电极。 印刷电路板安装在显示面板上。 半导体器件设置在显示面板的电极和印刷电路板之间。 每个胶片载带具有开口和第一和第二引线组，其从磁带沿两个相反的方向延伸。 每个引线组具有多个引线。 每个领导小组的一端从录像带投影，每个线索组的另一端投入开幕。 每个半导体器件安装在带上并被压接以接触电极。 第二引线组的一端连接到印刷电路板。

公开(公告)号：US4494688A

公开(公告)日：1985-01-22

申请号：US357319

申请日：1982-03-11

申请人： Kenzo Hatada ,  Isamu Kitahiro

发明人： Kenzo Hatada ,  Isamu Kitahiro

IPC分类号： H01L21/48 ,  H01L21/60 ,  H01L23/498

CPC分类号： H01L24/50 ,  H01L21/4825 ,  H01L23/49861 ,  H01L24/86 ,  H01L2224/11003 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/09701

摘要： A method suitable for connecting a plurality of metal leads at the same time with electrodes of a semiconductor device. Metal leads are provided each of which has a metal bump bonded thereto. The metal of the metal bump is softer than that of the lead. Those metal leads are located above the semiconductor device so that the bumps are contacted with the electrodes and then the bumps are bonded to the electrodes by heating, whereby the metal leads are connected with the electrodes.

摘要翻译： 一种适于将多个金属引线同时与半导体器件的电极连接的方法。 提供金属引线，每个金属引线具有与其结合的金属凸块。 金属凸块的金属比铅的金属软。 这些金属引线位于半导体器件的上方，使得凸块与电极接触，然后通过加热将凸块接合到电极，由此金属引线与电极连接。

公开(公告)号：US06953991B2

公开(公告)日：2005-10-11

申请号：US10332809

申请日：2001-06-01

申请人： Kenzo Hatada ,  Kozo Sato

发明人： Kenzo Hatada ,  Kozo Sato

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L23/02 ,  H01L23/48

CPC分类号： H01L25/0657 ,  H01L21/4842 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/4985 ,  H01L25/105 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/00

摘要： A semiconductor device comprising a laminate of plural insulating substrates 101 to 104 on which are mounted semiconductor chips (electronic parts) 12, wherein, when the lower-most insulating substrate is regarded to be a first insulating substrate 101 and other insulating substrates to be second insulating substrates 102 to 104 among the insulating substrates that are laminated;second electrically conducting wirings 112 to 114 are so provided as to protrude beyond the peripheral edges of the second insulating substrates and are folded toward the side of other surfaces of the second insulating substrates, and the thus folded second electrically conducting wirings are electrically connected to the electrically conducting wirings on the lower insulating substrates.

摘要翻译： 一种半导体器件，包括其上安装有半导体芯片（电子部件）12的多个绝缘基板10 1至10 4层叠体，其中当最下层绝缘基板 被认为是绝缘基板中的第一绝缘基板10 1和作为第二绝缘基板10 2〜10 4的绝缘基板，其中 层压; 第二导电布线11 2〜11 4被设置成突出超过第二绝缘基板的周缘，并且朝向第二绝缘基板的其他表面的侧面折叠 绝缘基板，并且由此折叠的第二导电布线电连接到下绝缘基板上的导电布线。

公开(公告)号：US5998866A

公开(公告)日：1999-12-07

申请号：US85893

申请日：1998-01-16

申请人： Takao Ochi ,  Hisashi Funakoshi ,  Kenzo Hatada ,  Takashi Wakabayashi

发明人： Takao Ochi ,  Hisashi Funakoshi ,  Kenzo Hatada ,  Takashi Wakabayashi

IPC分类号： H01L23/495 ,  H01L23/34

CPC分类号： H01L24/01 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49513 ,  H01L23/49551 ,  H01L24/32 ,  H01L24/72 ,  H01L24/90 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/92 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181

摘要： A plurality of connecting leads, each consisting of an internal lead and an external lead, are provided so as to extend inward from a lead frame main body, and are then cut off the lead frame main body. The connecting leads are electrically connected with an aluminum electrode of the semiconductor chip. A plurality of fixing leads, each having a distal end bent toward the semiconductor, are provided so as to extend inward from the lead frame main body and thereafter are cut off the lead frame main body. The semiconductor chip is clamped by the distal ends of the fixing leads. The semiconductor chip, the plural connecting leads and the plural fixing leads are sealed together into a resin package.

摘要翻译： 多个连接引线，分别由内部引线和外部引线构成，从引线框架主体向内侧延伸，然后从引线框架主体切断。 连接引线与半导体芯片的铝电极电连接。 设置有多个朝向半导体弯曲的远端的固定引线，从引线框架主体向内延伸，然后从引线框架主体切断。 半导体芯片由固定引线的远端夹紧。 半导体芯片，多个连接引线和多个固定引线被密封在一起成为树脂封装。

公开(公告)号：US5739053A

公开(公告)日：1998-04-14

申请号：US440991

申请日：1995-05-15

申请人： Tetuo Kawakita ,  Kenzo Hatada

发明人： Tetuo Kawakita ,  Kenzo Hatada

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L21/68 ,  H01L21/283 ,  H01L21/58 ,  H01L21/603

CPC分类号： H01L21/6835 ,  H01L21/563 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/11003 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75301 ,  H01L2224/75745 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/351

摘要： A process wherein substrate preliminary formed with bumps by electrolytic plating or other technique is prepared. The semiconductor device is opposed to the substrate with the bumps so that the Al electrodes of the semiconductor device are aligned with respect to the bumps and brought into contact with each other. Then, the Al electrodes of the semiconductor device and the bumps are bonded together by the application of pressure and heat with an Au--Al alloy layer formed therebetween. Subsequently, the bumps are peeled off the substrate so as to be transferred to the respective Al electrodes. Thereafter, the semiconductor device is opposed to a circuit board so that the bumps are aligned with respect to the electrodes of wiring and brought into contact with them. Then, the bumps and the electrodes of wiring are bonded together more securely by the application of a larger pressure at a higher temperature or by the application of pressure and heat for a longer period of time than in the preceding process with another Au--Al alloy layer newly formed therebetween to cover a wider range. Thereafter, the bumps and electrodes of wiring are fixed and connected by means of a photo-curing insulating resin. Thus, the bonds between the Al electrodes and the bumps are strengthened while preventing the considerable deformation of the bumps before they are connected to the electrodes of wiring. According to the connecting method, connecting reliability is greatly improved when the transfer method whereby the bumps are easily formed on the electrodes of the semiconductor device at low cost is applied to the flip flop method or to the MBB method.

摘要翻译： 制备通过电解电镀或其它技术形成具有凸块的基板的工艺。 半导体器件与具有凸起的衬底相对，使得半导体器件的Al电极相对于凸块对准并且彼此接触。 然后，半导体器件的Al电极和凸块通过施加压力和热量而在其间形成有Au-Al合金层而结合在一起。 随后，将凸起从衬底上剥离，以便转移到各个Al电极。 此后，半导体器件与电路板相对，使得凸块相对于布线的电极对齐并与它们接触。 然后，通过在较高温度下施加较大的压力或通过与另一种Au-Al合金相比施加压力和热量比前述工艺更长的时间段，将凸块和电极更牢固地结合在一起 层之间新形成，以覆盖更宽的范围。 此后，通过光固化绝缘树脂将布线的凸起和电极固定并连接。 因此，Al电极和凸块之间的结合被加强，同时防止凸块在与布线的电极连接之前相当大的变形。 根据连接方法，当以低成本容易地在半导体器件的电极上形成凸块的转移方法应用于触发器方法或MBB方法时，连接可靠性大大提高。

公开(公告)号：US5640044A

公开(公告)日：1997-06-17

申请号：US421183

申请日：1995-04-13

申请人： Shinitsu Takehashi ,  Kenzo Hatada

发明人： Shinitsu Takehashi ,  Kenzo Hatada

IPC分类号： H01L21/56 ,  H01L21/603 ,  H01L23/495 ,  H01L23/34

CPC分类号： H01L24/85 ,  H01L21/565 ,  H01L23/49503 ,  H01L23/49558 ,  H01L23/49575 ,  H01L24/49 ,  H01L24/78 ,  H01L24/97 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/06562 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181

摘要： The present invention is premised on a semiconductor device in which one semiconductor chip is mounted on each of both faces of a die pad of a lead frame. The semiconductor chips are disposed such that the projected lines, on the die pad, of the corresponding sides of the semiconductor chips, intersect with each other at an angle of 45.degree.. The tips of inner leads are located in the sides of a virtual octagon formed by outwardly enlarging an octagon formed by connecting, to one another, the apexes of the semiconductor chips. The sides of the virtual octagon are respectively opposite to the sides of the semiconductor chips. The number of the inner leads of which tips are located in each of the sides of the virtual octagon, is the same as the number of bonding pads disposed at each of the sides of the semiconductor chips. The inner leads of which tips are located in each of the sides of the virtual octagon, are connected to the bonding pads at each of the sides of one of the first and second semiconductor chips.

摘要翻译： 本发明的前提是半导体器件，其中一个半导体芯片安装在引线框的管芯焊盘的两个面中的每一个上。 半导体芯片被布置成使得半导体芯片的相应侧的芯片上的投影线以45°的角度彼此相交。 内部引线的尖端位于通过向外扩大通过将半导体芯片的顶点彼此连接形成的八边形形成的虚拟八边形的侧面。 虚拟八边形的侧面分别与半导体芯片的侧面相对。 顶端位于虚拟八边形的每一侧的内引线的数量与设置在半导体芯片的每一侧的接合焊盘的数量相同。 位于虚拟八边形的每一侧的尖端的内部引线在第一和第二半导体芯片中的一个的每个侧面处连接到接合焊盘。