公开(公告)号：US20100013008A1

公开(公告)日：2010-01-21

申请号：US12570209

申请日：2009-09-30

申请人： Takahiro OIKAWA

发明人： Takahiro OIKAWA

IPC分类号： H01L29/78 ,  H01L21/283

CPC分类号： H01L29/7813 ,  H01L24/06 ,  H01L24/13 ,  H01L29/41741 ,  H01L29/456 ,  H01L29/7809 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05567 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/06181 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/94 ,  H01L2924/0002 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12032 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15788 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

摘要： The invention prevents a semiconductor device from warping due to heat when it is used. The invention also prevents a formation defect such as peeling of a resist layer used as a plating mask and a formation defect of a front surface electrode. A source pad electrode connected to a source region is formed on a front surface of a semiconductor substrate forming a vertical MOS transistor. A front surface electrode is formed on the source pad -electrode by a plating method using a resist layer having openings as a mask. The semiconductor substrate formed with the front surface electrode is thinned by back-grinding. A back surface electrode connected to a drain region is formed on the back surface of the semiconductor substrate. The front surface electrode and the back surface electrode are made of metals having the same coefficients of linear expansion, preferably copper. The front surface electrode and the back surface electrode preferably have the same thicknesses or almost the same thicknesses.

摘要翻译： 本发明防止半导体器件在使用时由于热而翘曲。 本发明还可防止诸如用作电镀掩模的抗蚀剂层的剥离和前表面电极的形成缺陷的形成缺陷。 连接到源极区的源极焊盘电极形成在形成垂直MOS晶体管的半导体衬底的前表面上。 通过使用具有开口作为掩模的抗蚀剂层的电镀方法在源极电极上形成前表面电极。 形成有前表面电极的半导体基板通过后研磨而变薄。 连接到漏区的背面电极形成在半导体衬底的背面上。 前表面电极和背面电极由具有相同线性膨胀系数的金属制成，优选铜。 前表面电极和背面电极优选具有相同的厚度或几乎相同的厚度。

公开(公告)号：US20080023846A1

公开(公告)日：2008-01-31

申请号：US11878796

申请日：2007-07-26

申请人： Katsuyuki Seki ,  Akira Suzuki ,  Koujiro Kameyama ,  Takahiro Oikawa

发明人： Katsuyuki Seki ,  Akira Suzuki ,  Koujiro Kameyama ,  Takahiro Oikawa

IPC分类号： H01L21/311 ,  H01L21/302 ,  H01L23/48

CPC分类号： H01L21/3065 ,  H01L21/30655 ,  H01L21/31138 ,  H01L21/76898 ,  H01L2224/02372 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05025 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2924/0494

摘要： The invention provides a method of manufacturing a semiconductor device which achieves high reliability and high yield as well as high production efficiency. Back surface grinding (back grinding) is performed to a semiconductor substrate to thin the semiconductor substrate. A damaged layer formed by the back surface grinding is not removed at this time, and a photoresist layer is selectively formed on the back surface of the semiconductor substrate. The semiconductor substrate is then etched using the photoresist layer as a mask to form a via hole. The photoresist layer is then removed with the semiconductor substrate still placed in an etcher used in the etching process subsequently after the formation of the via hole. In this manner, the etching process and the next ashing process are performed sequentially in one apparatus. Then a process of removing the damaged layer on the back surface of the semiconductor substrate and a process of smoothing the sidewall of the via hole are simultaneously performed subsequently after the ashing process in the same apparatus.

摘要翻译： 本发明提供一种制造半导体器件的方法，该方法实现了高可靠性和高产率以及高生产效率。 对半导体基板进行背面研磨（背面研磨）以使半导体基板变薄。 此时不会去除由背面磨削形成的损伤层，并且在半导体衬底的背面上选择性地形成光致抗蚀剂层。 然后使用光致抗蚀剂层作为掩模蚀刻半导体衬底以形成通孔。 然后在形成通孔之后，半导体衬底仍然放置在蚀刻工艺中使用的蚀刻器中，去除光致抗蚀剂层。 以这种方式，在一个装置中顺序地执行蚀刻处理和下一个灰化处理。 然后，在同一装置的灰化处理之后，随后进行去除半导体基板背面的损伤层的工序和平滑通路孔的侧面的工序。

公开(公告)号：US20070166957A1

公开(公告)日：2007-07-19

申请号：US11645811

申请日：2006-12-27

申请人： Koujiro Kameyama ,  Akira Suzuki ,  Takahiro Oikawa

发明人： Koujiro Kameyama ,  Akira Suzuki ,  Takahiro Oikawa

IPC分类号： H01L21/30

CPC分类号： H01L21/76898 ,  H01L21/78 ,  H01L23/481 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05548 ,  H01L2224/06181 ,  H01L2224/11002 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2924/09701

摘要： The invention is directed to enhancement of reliability and a yield of a semiconductor device by a method of manufacturing the semiconductor device with a supporting body without making the process complex. A second insulation film, a semiconductor substrate, a first insulation film, and a passivation film are etched and removed in this order using a resist layer or a protection layer as a mask. By this etching, an adhesive layer is partially exposed in an opening. At this time, a number of semiconductor devices are separated in individual semiconductor dies. Then, as shown in FIG. 10, a solvent (e.g. alcohol or acetone) is supplied to the exposed adhesive layer through the opening to gradually reduce its adhesion and thereby a supporting body is removed from the semiconductor substrate.

摘要翻译： 本发明旨在通过一种制造具有支撑体的半导体器件的方法来提高半导体器件的可靠性和成品率，而不会使工艺复杂化。 使用抗蚀剂层或保护层作为掩模，依次蚀刻除去第二绝缘膜，半导体基板，第一绝缘膜和钝化膜。 通过该蚀刻，粘合剂层部分地暴露在开口中。 此时，在各个半导体管芯中分离出多个半导体器件。 然后，如图1所示。 如图10所示，通过开口将溶剂（例如醇或丙酮）供给到暴露的粘合剂层，以逐渐降低其粘附性，从而从半导体衬底去除支撑体。

公开(公告)号：US20070132017A1

公开(公告)日：2007-06-14

申请号：US11634376

申请日：2006-12-06

申请人： Takahiro Oikawa

发明人： Takahiro Oikawa

IPC分类号： H01L29/94

CPC分类号： H01L29/7809 ,  H01L21/76841 ,  H01L21/76871 ,  H01L21/76898 ,  H01L29/0653 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66734 ,  H01L29/7813 ,  H01L2224/05

摘要： The characteristic of the semiconductor device of this invention is that the device has a piercing hole 10 formed in the semiconductor layer to touch a first metal film 18, a insulating film 12 formed on the side wall of the piercing hole 10, a second metal film 13 disposed on the first metal film 18 at the bottom of the piercing hole 10 where the insulating film 12 has not been formed and on the semiconductor layer, a barrier metal film 14 formed on the insulating film 12 in the piercing hole 10 and on the first metal film 18, and a wiring layer 15 formed inside the piercing hole 10 through the barrier metal film 14.

摘要翻译： 本发明的半导体器件的特征在于，该器件具有形成在半导体层中的穿孔10，用于接触第一金属膜18，形成在穿孔10的侧壁上的绝缘膜12，第二金属膜 设置在穿孔10的未形成绝缘膜12的底部的第一金属膜18上，半导体层上形成有在穿孔10中的绝缘膜12上形成的阻挡金属膜14， 第一金属膜18和通过阻挡金属膜14形成在穿孔10内的布线层15。

公开(公告)号：US06855896B2

公开(公告)日：2005-02-15

申请号：US10464454

申请日：2003-06-19

申请人： Takahiro Oikawa

发明人： Takahiro Oikawa

IPC分类号： H01H19/00 ,  B60Q1/14 ,  B60R16/00 ,  H01H19/58 ,  H01H25/04 ,  H01H89/00 ,  H01H15/00

CPC分类号： B60Q1/1476

摘要： In a vehicular lever switch having a resistor at a fixed contact plate to be combined with a pivoting knob, when a passenger charged with static electricity touches the lever, the resistor is to be prevented from being damaged. A fixed contact plate is arranged with a resistor and conductors and extended from both ends thereof in a ring-like shape to constitute a fixed contact. Further, an extended portion extended in a circular arc shape is formed on an outer side of the resistor with a gap from the conductor. Even when the hand of a passenger charged with static electricity touches a vicinity of a pivoting knob and the static electricity is applied to the fixed contact plate, the static electricity flows to the extended portion and is discharged via the conductor and a terminal. Thereby, the resistor is not damaged by static electricity. Further, it is not necessary to ensure a distance from an end edge of the pivoting knob to the fixed contact plate to be long in order to avoid propagation of static electricity and therefore, a degree of freedom of a shape of the lever can be enhanced.

摘要翻译： 在具有固定接触板上的电阻器以与旋转旋钮组合的车辆杠杆开关中，当带静电的乘客接触到杠杆时，可以防止电阻器被损坏。 固定接触板设置有电阻器和导体，并且从其两端以环状形状延伸以构成固定触头。 此外，在电阻器的外侧形成有与导体间隔开的圆弧形延伸部。 即使被充电静电的乘客的手接触到旋转旋钮的附近，并且静电被施加到固定接触板，静电流向延伸部分并经由导体和端子排出。 因此，电阻器不会被静电损坏。 此外，为了避免静电的传播，不需要确保从旋转旋钮的端缘到固定接触板的距离较长，因此可以提高杠杆的形状的自由度 。

公开(公告)号：US5197331A

公开(公告)日：1993-03-30

申请号：US850159

申请日：1992-03-13

申请人： Takahiro Oikawa

发明人： Takahiro Oikawa

IPC分类号： G01C19/5649

CPC分类号： G01C19/5649

摘要： An oscillatory angular speed detecting apparatus is disclosed which includes a pillar-shaped oscillator body and drive and readout piezoelectric transducers attached to first, second, and third surfaces of the oscillator body, the first side surface being perpendicular to the second side surface and the third side surface being parallel to the first side surface, in which vibration of the oscillator body is transduced into a readout signal by the readout transducer. A phase detecting device detects variations of phases of the readout signals, and an amplitude detecting device detects variations of amplitudes of the readout signals, and the angular speed is detected from the phases detected by the phase detecting device and/or the amplitude detected by the amplitude detecting device.

摘要翻译： 公开了一种振荡角速度检测装置，其包括柱形振荡器体和附接到振荡器体的第一，第二和第三表面的驱动和读出的压电换能器，第一侧表面垂直于第二侧表面，第三侧表面垂直于第二侧表面 侧表面平行于第一侧表面，其中振荡器体的振动被读出的换能器转换成读出信号。 相位检测装置检测读出信号的相位变化，并且振幅检测装置检测读出信号的振幅的变化，并且从由相位检测装置检测的相位和/或由相位检测装置检测到的振幅检测角速度 振幅检测装置。

公开(公告)号：US4916650A

公开(公告)日：1990-04-10

申请号：US157949

申请日：1988-02-19

申请人： Takahiro Oikawa

发明人： Takahiro Oikawa

IPC分类号： G01C21/26

CPC分类号： G01C21/26

摘要： To eliminate the harmful influence of drift when integrating a sensor signal, the sensor signal is integrated from a time point a first predetermined time period before the sensor signal level becomes higher than the perdetermined signal level to a time point a second predetermined time period after the sensor signal level becomes lower than the predetermined signal level.

摘要翻译： 为了在整合传感器信号时消除漂移的有害影响，传感器信号从传感器信号电平变得高于定时信号电平之前的第一预定时间段的时间点集成到第二预定时间段之后的时间点 传感器信号电平变得低于预定信号电平。

公开(公告)号：US08169054B2

公开(公告)日：2012-05-01

申请号：US11785909

申请日：2007-04-20

申请人： Takahiro Oikawa

发明人： Takahiro Oikawa

IPC分类号： H01L29/40

CPC分类号： H01L21/76898 ,  H01L21/76841 ,  H01L23/481 ,  H01L29/0657 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66734 ,  H01L29/7809 ,  H01L29/7813 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/014 ,  H01L2924/00

摘要： The invention is directed to a semiconductor device having a via hole and a method of manufacturing the same that achieve both the prevention of a barrier layer insufficiently covering the via hole and the control of via resistance at the same time. A semiconductor substrate having a pad electrode on its front surface is prepared. The semiconductor substrate is etched from its back surface to its front surface to form a via hole exposing the pad electrode. A first barrier layer is then formed in the via hole by a sputtering method or a PVD method and reverse-sputtering (etching). By this reverse-sputtering, the barrier layer on the bottom of the via hole is removed to expose the pad electrode. A second barrier layer is then formed on the pad electrode exposed in the via hole. The via resistance is controlled by adjusting only the thickness of the second barrier layer.

摘要翻译： 本发明涉及一种具有通孔的半导体器件及其制造方法，该半导体器件同时实现了防止不充分覆盖通孔的阻挡层和通孔电阻的控制。 制备其表面上具有焊盘电极的半导体衬底。 半导体衬底从其背表面被蚀刻到其前表面以形成露出焊盘电极的通孔。 然后通过溅射法或PVD法和反溅射（蚀刻）在通孔中形成第一阻挡层。 通过该反溅射，去除通孔底部的阻挡层以露出焊盘电极。 然后在暴露在通孔中的焊盘电极上形成第二阻挡层。 通过电阻仅通过调节第二阻挡层的厚度来控制。

公开(公告)号：US07781894B2

公开(公告)日：2010-08-24

申请号：US11634376

申请日：2006-12-06

申请人： Takahiro Oikawa

发明人： Takahiro Oikawa

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L29/7809 ,  H01L21/76841 ,  H01L21/76871 ,  H01L21/76898 ,  H01L29/0653 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66734 ,  H01L29/7813 ,  H01L2224/05

摘要： The characteristic of the semiconductor device of this invention is that the device has a piercing hole 10 formed in the semiconductor layer to touch a first metal film 18, a insulating film 12 formed on the side wall of the piercing hole 10, a second metal film 13 disposed on the first metal film 18 at the bottom of the piercing hole 10 where the insulating film 12 has not been formed and on the semiconductor layer, a barrier metal film 14 formed on the insulating film 12 in the piercing hole 10 and on the first metal film 18, and a wiring layer 15 formed inside the piercing hole 10 through the barrier metal film 14.

摘要翻译： 本发明的半导体器件的特征在于，该器件具有形成在半导体层中的穿孔10，用于接触第一金属膜18，形成在穿孔10的侧壁上的绝缘膜12，第二金属膜 设置在穿孔10的未形成绝缘膜12的底部的第一金属膜18上，半导体层上形成有在穿孔10中的绝缘膜12上形成的阻挡金属膜14， 第一金属膜18和通过阻挡金属膜14形成在穿孔10内的布线层15。

公开(公告)号：US20090315175A1

公开(公告)日：2009-12-24

申请号：US12307228

申请日：2008-04-04

申请人： Kikuo Okada ,  Kojiro Kameyama ,  Takahiro Oikawa

发明人： Kikuo Okada ,  Kojiro Kameyama ,  Takahiro Oikawa

IPC分类号： H01L23/498 ,  H01B5/00

CPC分类号： H01L23/49562 ,  H01L23/4952 ,  H01L23/49524 ,  H01L24/05 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/91 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/7809 ,  H01L29/7813 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/1147 ,  H01L2224/16 ,  H01L2224/371 ,  H01L2224/40225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10158 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45099

摘要： In a power MOS transistor, for example, a source electrode is formed so as to be commonly connected to a plurality of source regions formed on the front surface. Thus, a current density varies based on in-plane resistance of the source electrode, thereby providing the necessity of increasing the number of wires connecting the sources and a lead. In the invention, an electrode structure includes a copper plating layer 10e formed on a pad electrode 10a by an electrolytic plating method, and a nickel plating layer 10f and a gold plating layer formed so as to cover the upper and side surfaces of the copper plating layer 10e by an electroless plating method.

摘要翻译： 在功率MOS晶体管中，例如，源极电极形成为与形成在前表面上的多个源极区域共同连接。 因此，电流密度基于源电极的面内电阻而变化，由此提供增加连接源极和引线的导线数量的必要性。 在本发明中，电极结构包括通过电解电镀法形成在焊盘电极10a上的镀铜层10e，以及形成为覆盖铜镀层的上表面和侧表面的镀镍层10f和镀金层 层10e通过化学镀方法。