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公开(公告)号:US08154129B2
公开(公告)日:2012-04-10
申请号:US12307228
申请日:2008-04-04
申请人: Kikuo Okada , Kojiro Kameyama , Takahiro Oikawa
发明人: Kikuo Okada , Kojiro Kameyama , Takahiro Oikawa
IPC分类号: H01L23/492
CPC分类号: H01L23/49562 , H01L23/4952 , H01L23/49524 , H01L24/05 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/91 , H01L29/41741 , H01L29/41766 , H01L29/456 , H01L29/7809 , H01L29/7813 , H01L2224/0401 , H01L2224/04042 , H01L2224/05552 , H01L2224/05554 , H01L2224/05644 , H01L2224/0603 , H01L2224/06051 , H01L2224/1147 , H01L2224/16 , H01L2224/371 , H01L2224/40225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48465 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49175 , H01L2224/73219 , H01L2224/73221 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10158 , H01L2924/12041 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00 , H01L2224/45099
摘要: In a power MOS transistor, for example, a source electrode is formed so as to be commonly connected to a plurality of source regions formed on the front surface. Thus, a current density varies based on in-plane resistance of the source electrode, thereby providing the necessity of increasing the number of wires connecting the sources and a lead. In the invention, an electrode structure includes a copper plating layer 10e formed on a pad electrode 10a by an electrolytic plating method, and a nickel plating layer 10f and a gold plating layer formed so as to cover the upper and side surfaces of the copper plating layer 10e by an electroless plating method.
摘要翻译: 在功率MOS晶体管中,例如,源极电极形成为与形成在前表面上的多个源极区域共同连接。 因此,电流密度基于源电极的面内电阻而变化,由此提供增加连接源极和引线的导线数量的必要性。 在本发明中,电极结构包括通过电解电镀法形成在焊盘电极10a上的镀铜层10e,以及形成为覆盖铜镀层的上表面和侧表面的镀镍层10f和镀金层 层10e通过化学镀方法。
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公开(公告)号:US20090315175A1
公开(公告)日:2009-12-24
申请号:US12307228
申请日:2008-04-04
申请人: Kikuo Okada , Kojiro Kameyama , Takahiro Oikawa
发明人: Kikuo Okada , Kojiro Kameyama , Takahiro Oikawa
IPC分类号: H01L23/498 , H01B5/00
CPC分类号: H01L23/49562 , H01L23/4952 , H01L23/49524 , H01L24/05 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/91 , H01L29/41741 , H01L29/41766 , H01L29/456 , H01L29/7809 , H01L29/7813 , H01L2224/0401 , H01L2224/04042 , H01L2224/05552 , H01L2224/05554 , H01L2224/05644 , H01L2224/0603 , H01L2224/06051 , H01L2224/1147 , H01L2224/16 , H01L2224/371 , H01L2224/40225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48465 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49175 , H01L2224/73219 , H01L2224/73221 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10158 , H01L2924/12041 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00 , H01L2224/45099
摘要: In a power MOS transistor, for example, a source electrode is formed so as to be commonly connected to a plurality of source regions formed on the front surface. Thus, a current density varies based on in-plane resistance of the source electrode, thereby providing the necessity of increasing the number of wires connecting the sources and a lead. In the invention, an electrode structure includes a copper plating layer 10e formed on a pad electrode 10a by an electrolytic plating method, and a nickel plating layer 10f and a gold plating layer formed so as to cover the upper and side surfaces of the copper plating layer 10e by an electroless plating method.
摘要翻译: 在功率MOS晶体管中,例如,源极电极形成为与形成在前表面上的多个源极区域共同连接。 因此,电流密度基于源电极的面内电阻而变化,由此提供增加连接源极和引线的导线数量的必要性。 在本发明中,电极结构包括通过电解电镀法形成在焊盘电极10a上的镀铜层10e,以及形成为覆盖铜镀层的上表面和侧表面的镀镍层10f和镀金层 层10e通过化学镀方法。
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公开(公告)号:US07795115B2
公开(公告)日:2010-09-14
申请号:US11645811
申请日:2006-12-27
申请人: Koujiro Kameyama , Akira Suzuki , Takahiro Oikawa
发明人: Koujiro Kameyama , Akira Suzuki , Takahiro Oikawa
IPC分类号: H01L21/00
CPC分类号: H01L21/76898 , H01L21/78 , H01L23/481 , H01L25/0657 , H01L2224/02372 , H01L2224/03002 , H01L2224/0401 , H01L2224/05009 , H01L2224/05548 , H01L2224/06181 , H01L2224/11002 , H01L2224/13022 , H01L2224/13024 , H01L2224/16145 , H01L2225/06513 , H01L2924/09701
摘要: The invention is directed to enhancement of reliability and a yield of a semiconductor device by a method of manufacturing the semiconductor device with a supporting body without making the process complex. A second insulation film, a semiconductor substrate, a first insulation film, and a passivation film are etched and removed in this order using a resist layer or a protection layer as a mask. By this etching, an adhesive layer is partially exposed in an opening. At this time, a number of semiconductor devices are separated in individual semiconductor dies. Then, as shown in FIG. 10, a solvent (e.g. alcohol or acetone) is supplied to the exposed adhesive layer through the opening to gradually reduce its adhesion and thereby a supporting body is removed from the semiconductor substrate.
摘要翻译: 本发明旨在通过一种制造具有支撑体的半导体器件的方法来提高半导体器件的可靠性和成品率,而不会使工艺复杂化。 使用抗蚀剂层或保护层作为掩模,依次蚀刻除去第二绝缘膜,半导体基板,第一绝缘膜和钝化膜。 通过该蚀刻,粘合剂层部分地暴露在开口中。 此时,在各个半导体管芯中分离出多个半导体器件。 然后,如图1所示。 如图10所示,通过开口将溶剂(例如醇或丙酮)供给到暴露的粘合剂层,以逐渐降低其粘附性,从而从半导体衬底去除支撑体。
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公开(公告)号:US20070281474A1
公开(公告)日:2007-12-06
申请号:US11802107
申请日:2007-05-18
IPC分类号: H01L21/3065
CPC分类号: H01L21/30655 , H01L21/76898 , H01L2224/02372 , H01L2224/05548 , H01L2924/0002 , H01L2924/00
摘要: This invention is directed to form a homogeneous film in a via hole formed in a semiconductor device using Bosch process. The via hole that penetrates through a predetermined region in a semiconductor substrate is formed by etching the semiconductor substrate from one of its surface to the other by the Bosch process using a mask layer as a mask. Next, the mask layer is removed. Then, scallops are removed by dry etching to flatten a sidewall of the via hole. Following the above, an insulation film, a barrier layer and the like are formed homogeneously in the via hole.
摘要翻译: 本发明涉及在使用博世工艺的半导体器件中形成的通孔中形成均匀的膜。 穿过半导体衬底中的预定区域的通孔是通过使用掩模层作为掩模的博世工艺将半导体衬底从其表面之一蚀刻到另一表面而形成的。 接下来,去除掩模层。 然后,通过干法蚀刻除去扇贝,使通孔的侧壁变平。 接下来,在通孔中均匀地形成绝缘膜,阻挡层等。
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公开(公告)号:USD548837S1
公开(公告)日:2007-08-14
申请号:US29239342
申请日:2005-09-29
申请人: Takahiro Oikawa
设计人: Takahiro Oikawa
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公开(公告)号:USD532420S1
公开(公告)日:2006-11-21
申请号:US29253728
申请日:2006-02-13
申请人: Takahiro Oikawa
设计人: Takahiro Oikawa
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公开(公告)号:US5665948A
公开(公告)日:1997-09-09
申请号:US628300
申请日:1996-04-05
申请人: Takahiro Oikawa
发明人: Takahiro Oikawa
CPC分类号: B60Q1/1476
摘要: An automobile knob switch assembly comprising an operating lever 1 that has a shaft rod 1a. A terminal plate 2 is inserted into an opening part if of the operating lever 1. A movable plate 3 has a movable contact plate 13 that contacts the stationary contact plates 8 placed in the terminal plate 2, a through hole 3a through which a cylinder part 4a of a moderator 4 is inserted, and latching pieces 3b that are latched onto the moderator 4. The moderator 4 has an elastic claw 4c that is latched onto the shaft rod 1a. A knob 5 has a latching part 5b that is engaged to a latching piece 3e formed in the periphery of the movable plate 3. A second embodiment is disclosed that has two knobs for the rotary switch installed at the tip of the operating lever 15. The construction of the knob switch assembly permits the parts of the switch assembly to be automatically assembled with machines for mass production and reduced costs.
摘要翻译: 一种汽车旋钮开关组件,包括具有轴杆1a的操作杆1。 如果是操作杆1,则端子板2插入到开口部分中。可移动板3具有与放置在端子板2中的固定接触板8接触的可动接触板13,通孔3a, 插入调节器4的4a和锁定在调节器4上的闩锁片3b。调节器4具有锁定在轴杆1a上的弹性爪4c。 旋钮5具有与形成在可动板3的周边的卡定片3e接合的卡定部5b。公开了具有安装在操作杆15的前端的用于旋转开关的两个旋钮的第二实施例。 旋钮开关组件的构造允许开关组件的部件自动地与机器组装以进行批量生产并降低成本。
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公开(公告)号:US08173543B2
公开(公告)日:2012-05-08
申请号:US11878796
申请日:2007-07-26
IPC分类号: H01L21/44 , H01L21/311
CPC分类号: H01L21/3065 , H01L21/30655 , H01L21/31138 , H01L21/76898 , H01L2224/02372 , H01L2224/05008 , H01L2224/05009 , H01L2224/05025 , H01L2224/05147 , H01L2224/05164 , H01L2224/05166 , H01L2224/05181 , H01L2224/05184 , H01L2224/05186 , H01L2224/05548 , H01L2224/05568 , H01L2224/05569 , H01L2224/05644 , H01L2224/05655 , H01L2224/16 , H01L2924/01004 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/09701 , H01L2924/00014 , H01L2924/04953 , H01L2924/0496 , H01L2924/01074 , H01L2924/0494
摘要: The invention provides a method of manufacturing a semiconductor device which achieves high reliability and high yield as well as high production efficiency. Back surface grinding (back grinding) is performed to a semiconductor substrate to thin the semiconductor substrate. A damaged layer formed by the back surface grinding is not removed at this time, and a photoresist layer is selectively formed on the back surface of the semiconductor substrate. The semiconductor substrate is then etched using the photoresist layer as a mask to form a via hole. The photoresist layer is then removed with the semiconductor substrate still placed in an etcher used in the etching process subsequently after the formation of the via hole. In this manner, the etching process and the next ashing process are performed sequentially in one apparatus. Then a process of removing the damaged layer on the back surface of the semiconductor substrate and a process of smoothing the sidewall of the via hole are simultaneously performed subsequently after the ashing process in the same apparatus.
摘要翻译: 本发明提供一种制造半导体器件的方法,该方法实现了高可靠性和高产率以及高生产效率。 对半导体基板进行背面研磨(背面研磨)以使半导体基板变薄。 此时不会去除由背面磨削形成的损伤层,并且在半导体衬底的背面上选择性地形成光致抗蚀剂层。 然后使用光致抗蚀剂层作为掩模蚀刻半导体衬底以形成通孔。 然后在形成通孔之后,半导体衬底仍然放置在蚀刻工艺中使用的蚀刻器中,去除光致抗蚀剂层。 以这种方式,在一个装置中顺序地执行蚀刻处理和下一个灰化处理。 然后,在同一装置的灰化处理之后,随后进行去除半导体基板背面的损伤层的工序和平滑通路孔的侧面的工序。
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公开(公告)号:US20070249163A1
公开(公告)日:2007-10-25
申请号:US11785909
申请日:2007-04-20
申请人: Takahiro Oikawa
发明人: Takahiro Oikawa
IPC分类号: H01L21/4763 , H01L23/48
CPC分类号: H01L21/76898 , H01L21/76841 , H01L23/481 , H01L29/0657 , H01L29/41741 , H01L29/41766 , H01L29/456 , H01L29/66734 , H01L29/7809 , H01L29/7813 , H01L2224/02372 , H01L2224/0401 , H01L2224/05548 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2924/09701 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/014 , H01L2924/00
摘要: The invention is directed to a semiconductor device having a via hole and a method of manufacturing the same that achieve both the prevention of a barrier layer insufficiently covering the via hole and the control of via resistance at the same time. A semiconductor substrate having a pad electrode on its front surface is prepared. The semiconductor substrate is etched from its back surface to its front surface to form a via hole exposing the pad electrode. A first barrier layer is then formed in the via hole by a sputtering method or a PVD method and reverse-sputtering (etching). By this reverse-sputtering, the barrier layer on the bottom of the via hole is removed to expose the pad electrode. A second barrier layer is then formed on the pad electrode exposed in the via hole. The via resistance is controlled by adjusting only the thickness of the second barrier layer.
摘要翻译: 本发明涉及一种具有通孔的半导体器件及其制造方法,其既实现了阻挡层不足以覆盖通孔,同时也实现了通孔电阻的控制。 制备其表面上具有焊盘电极的半导体衬底。 半导体衬底从其背表面被蚀刻到其前表面以形成露出焊盘电极的通孔。 然后通过溅射法或PVD法和反溅射(蚀刻)在通孔中形成第一阻挡层。 通过该反溅射,去除通孔底部的阻挡层以露出焊盘电极。 然后在暴露在通孔中的焊盘电极上形成第二阻挡层。 通过电阻仅通过调节第二阻挡层的厚度来控制。
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10.
公开(公告)号:US06982410B2
公开(公告)日:2006-01-03
申请号:US10633595
申请日:2003-08-05
申请人: Takahiro Oikawa , Tadashi Senga
发明人: Takahiro Oikawa , Tadashi Senga
CPC分类号: G01V8/12
摘要: A photoelectric sensor includes: a light projecting section projecting detection medium light to a detection object region; and a light receiving section receiving reflecting light or transmitted light from the detection object region, the sections being in a single piece or in separate pieces. The light projecting section includes: a light source generating the detection medium light; and a light projecting lens for collimating or collecting the detection medium light from the light source to form a beam spot or a light collecting point in the detection object region. The light projecting section further includes: a deflection angle adjusting unit capable of finely adjusting an optical axis deflection angle of the detection medium light projected to the detection object region from the light projecting section.
摘要翻译: 光电传感器包括:将检测介质光投射到检测对象区域的光投射部; 以及光接收部,其从所述检测对象区域接收反射光或透射光,所述部分为单片或分开片。 光投射部包括:产生检测介质光的光源; 以及投光透镜,用于对来自光源的检测介质光进行准直或收集,以在检测对象区域中形成光斑或聚光点。 光投射部还包括:偏转角调节单元,其能够从光投射部微调调整到检测对象区域的检测介质光的光轴偏转角。
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