公开(公告)号：US5234153A

公开(公告)日：1993-08-10

申请号：US938195

申请日：1992-08-28

申请人： Donlad D. Bacon ,  Avishay Katz ,  Chien-Hsun Lee ,  King L. Tai ,  Yiu-Man Wong

发明人： Donlad D. Bacon ,  Avishay Katz ,  Chien-Hsun Lee ,  King L. Tai ,  Yiu-Man Wong

IPC分类号： H01L21/52 ,  B23K20/02 ,  B23K20/233 ,  B23K35/00 ,  H01L21/58 ,  H01L21/60 ,  H01L23/373 ,  H01L33/40 ,  H01L33/62 ,  H01S5/00 ,  H01S5/02 ,  H01S5/022

CPC分类号： H01L24/83 ,  B23K20/023 ,  B23K20/233 ,  B23K35/001 ,  H01L23/3732 ,  H01L24/29 ,  H01S5/022 ,  B23K2035/008 ,  H01L2224/04026 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/32014 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L33/40 ,  H01L33/62 ,  H01S5/02272 ,  H01S5/02484

摘要： A laser device is bonded to a diamond submount by means of a procedure including (1) codepositing an auxiliary layer, on a layer of barrier metal that has been deposited overlying the submount, followed by (2) depositing a wetting layer on the auxiliary layer, and (3) by depositing a solder layer comprising alternating metallic layers, preferably of gold and tin sufficient to form an overall tin-rich gold-tin eutectic composition. The barrier metal is typically W, Mo, Cr, or Ru. Prior to bonding, a conventional metallization such as Ti-Pt-Au (three layers) is deposited on the laser device's bottom ohmic contact, typically comprising Ge. Then, during bonding, the solder layer is brought into physical contact with the laser device's metallization under enough heat and pressure, followed by cooling, to form a permanent joint between them. The thickness of the solder layer is advantageously less than approximately 5 .mu.m. The wetting layer is preferably the intermetallic compound Ni.sub.3 Sn.sub.4, and the auxiliary layer is formed by codepositing the metallic components of this intermetallic together with the barrier metal.

公开(公告)号：US5234149A

公开(公告)日：1993-08-10

申请号：US938194

申请日：1992-08-28

申请人： Avishay Katz ,  Chien-Hsun Lee ,  King L. Tai

发明人： Avishay Katz ,  Chien-Hsun Lee ,  King L. Tai

IPC分类号： H01L21/60 ,  G01R1/04 ,  H05K3/34

CPC分类号： G01R1/04 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13166 ,  H01L2224/13171 ,  H01L2924/00013 ,  H01L2924/01322 ,  Y10T29/49149

摘要： One or more metallized chip terminals of an electronic device, such as an integrated circuit chip or a laser chip, in one embodiment are temporarily bonded to one or more metallized substrate pads of a wiring substrate, as for the purpose of electrically testing the electronic device. The composition of the metallized chip terminals is suitably different from that of the metallized substrate pads. The pads and terminals are aligned and electrically connected together with a solder located between them under pressure and a temperature above the melting point of the solder. The solder is cooled, and electrical tests of the electronic device are performed by means of electrical access from testing circuitry to the chip terminals through the substrate pads. Then the solder is heated again above its melting point while being immersed in a liquid flux, whereby the liquid solder wets the metallized chip terminals but not the metallized substrate pads, and the device is gently mechanically pulled away from the wiring substrate and is cooled thereafter. This substrate can thereafter be reused for testing other electronic devices that have similarly suitably metallized terminals. In another embodiment, testing can be performed or not as may be desired; and, as for the purpose of chip operation as an integrated circuit or laser, the chip can be allowed to remain permanently bonded to the substrate in the form of a heat-sinking or heat-spreading submount, or it can be allowed to remain only temporarily bonded to the submount and subsequently pulled away from the submount for the purpose of reuse of the submount for another chip.

摘要翻译： 在一个实施例中，诸如集成电路芯片或激光芯片的电子器件（10）的一个或多个金属化布线或芯片端子（8,9）暂时地接合到布线基板的一个或多个金属化的基板焊盘 10），用于电子设备的电气测试。 金属化芯片端子的组成与金属化衬底焊盘的组成适当地不同。 焊盘和端子在压力和高于焊料熔点的温度下对齐并电连接在一起，焊料位于它们之间。 焊料被冷却，并且通过从测试电路通过衬底焊盘到芯片端子的电接入来执行电子器件的电气测试。 然后将焊料再次加热到其熔点以上，同时浸入液体焊剂中，由此液体焊料润湿金属化的芯片端子而不是金属化的衬底焊盘，并且通过机械力（F）从布线轻轻地将器件拉出 然后冷却。 该衬底此后可重新用于测试具有类似适当金属化端子的其它电子器件。 在另一个实施例中，可以根据需要进行或不执行测试; 并且，对于作为集成电路或激光器的芯片操作的目的，可以允许芯片以散热或散热底座的形式保持永久地结合到基板，或者可以仅允许该芯片保持 临时绑定到基座并随后从基座上拉出，以便重新使用另一个芯片的基座。

公开(公告)号：US5197654A

公开(公告)日：1993-03-30

申请号：US792559

申请日：1991-11-15

申请人： Avishay Katz ,  Chien-Hsun Lee ,  King L. Tai ,  Yiu-Man Wong

发明人： Avishay Katz ,  Chien-Hsun Lee ,  King L. Tai ,  Yiu-Man Wong

IPC分类号： H01L21/52 ,  B23K35/00 ,  B23K35/14 ,  H01L21/60 ,  H01L21/603 ,  H01S5/00 ,  H01S5/02 ,  H01S5/042

CPC分类号： H01L24/80 ,  B23K35/001 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2908 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01S5/02272 ,  H01S5/02484 ,  H01S5/0425 ,  Y10T428/12715

摘要： A device such as a laser is bonded to a submount such as diamond by a process in which the submount is successively coated with an adhesion layer such as titanium, a barrier layer such as nickel, and a gold-tin solder-metallization composite layer formed by sequential deposition on the barrier layer a number (preferably greater than seven) of multiple alternating layers of gold and tin, the last layer being gold having a thickness that is equal to approximately one-half or less than the thickness of the (next-to-last) tin layer that it contacts immediately beneath it. The bonding is performed under applied heat that is sufficient to melt the solder-metallization composite layer. Prior to the bonding, (in addition to the submount) the device advantageously is coated with gold and optionally with a similar gold-tin solder-metallization composite layer, at least at locations where it comes in contact with the gold-tin solder-metallization composite layer.

摘要翻译： 诸如激光器的装置通过其中副安装座连续地涂覆有诸如钛的粘合层，诸如镍的阻挡层和形成的金 - 锡焊料 - 金属化复合层的工艺而被结合到诸如金刚石的基座 通过在阻挡层上顺次沉积多个（优选大于7个）金和锡的多个交替层，最后一层是金，其厚度等于（下一层）的厚度的大约一半或更小， 最后）锡层，它紧挨着它。 在足以熔化焊料金属化复合层的施加的热下进行接合。 在接合之前（除了基座之外），装置有利地被镀金，并且可选地具有类似的金 - 锡焊料 - 金属化复合层，至少在与金 - 锡焊料金属化接触的位置处 复合层。

公开(公告)号：US5622305A

公开(公告)日：1997-04-22

申请号：US438296

申请日：1995-05-10

申请人： Donald D. Bacon ,  Cheng-Hsuan Chen ,  Ho S. Chen ,  Avishay Katz ,  King L. Tai

发明人： Donald D. Bacon ,  Cheng-Hsuan Chen ,  Ho S. Chen ,  Avishay Katz ,  King L. Tai

IPC分类号： B23K35/00 ,  H01L21/58 ,  H01L23/14 ,  H01L23/373 ,  B23K31/02 ,  B23K1/20

CPC分类号： H01L24/83 ,  B23K35/001 ,  H01L23/147 ,  H01L23/3732 ,  H01L24/29 ,  B23K2035/008 ,  B23K35/007 ,  H01L2224/04026 ,  H01L2224/2908 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/83193 ,  H01L2224/8385 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/07802 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  Y10T428/12819

摘要： A method for bonding one body to another, such as a laser device to a submount, uses a metallic layer composed of a Group VB metal, such as niobium, sandwiched between a non-metallic layer and solder layer formed by an approximate Au-Sn eutectic layer. Advantageously the Group VB layer is formed at a submount temperature of less than approximately 201.degree. C., advantageously less than approximately 125.degree. C., and preferably less than approximately 101.degree. C.--advantageously to a thickness in the approximate range 0.05 .mu.m to 0.2 .mu.m, or even thinner if pinholes do not develop. The non-metallic layer is located on one of the bodies, and the other body has a metallic coating advantageously capped with an Au layer.

摘要翻译： 将一体与另一体接合的方法，例如激光装置到基台，使用由诸如铌的VB族金属组成的金属层，夹在非金属层和由近似Au-Sn形成的焊料层之间 共晶层。 有利地，VB族VB层形成在小于约201℃，有利地小于约125℃，优选小于约101℃的底层温度下，有利地为约0.05μm的厚度 至0.2μm，如果针孔不发展，甚至更薄。 非金属层位于其中一个主体上，另一个主体具有有利于用Au层覆盖的金属涂层。

公开(公告)号：US4703288A

公开(公告)日：1987-10-27

申请号：US719533

申请日：1985-04-03

申请人： Robert C. Frye ,  King L. Tai

发明人： Robert C. Frye ,  King L. Tai

IPC分类号： H01L21/822 ,  H01L21/3205 ,  H01L23/52 ,  H01L23/538 ,  H01L23/66 ,  H01L27/04 ,  H01P3/08

CPC分类号： H01L23/538 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011

摘要： In wafer-scale-integrated assemblies, microminiature transmission lines are utilized as interconnects on the wafer. The extremely small cross-sectional area of a typical such line results in its total line resistance being relatively large. Such a line exhibits signal reflections and resonances. In practice, it is not feasible to eliminate these effects by conventional load termination techniques. As a result, the frequency at which digital signals can be transmitted over such a line is typically limited to well below its so-called resonance limit. In accordance with a feature of the invention, the structural parameters of each line are selected to meet specified design criteria that ensure optimal high-frequency performance of the line.

摘要翻译： 在晶片级集成组件中，微型传输线被用作晶片上的互连。 典型的这种线的极小的横截面积导致其总线路电阻相对较大。 这样一条线表现出信号反射和谐振。 在实践中，通过传统的负载终止技术消除这些影响是不可行的。 结果，数字信号可以通过这种线传输的频率通常被限制在远远低于其所谓的共振极限。 根据本发明的特征，选择每条线的结构参数以满足确保线路的最佳高频性能的规定设计标准。

公开(公告)号：US5043794A

公开(公告)日：1991-08-27

申请号：US587308

申请日：1990-09-24

申请人： King L. Tai ,  John Thomson, Jr.

发明人： King L. Tai ,  John Thomson, Jr.

IPC分类号： H01L23/34 ,  H01L23/12 ,  H01L23/13 ,  H01L23/36 ,  H01L23/367 ,  H01L23/52 ,  H01L25/00 ,  H01L25/04 ,  H01L25/065 ,  H01L25/07 ,  H01L25/10 ,  H01L25/18 ,  H05K7/20

CPC分类号： H01L23/3672 ,  H01L23/13 ,  H01L25/105 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49109 ,  H01L2225/1005 ,  H01L2225/1035 ,  H01L2225/1064 ,  H01L2225/1094 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01066 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12033 ,  H01L2924/14 ,  H01L2924/15156 ,  H01L2924/1532 ,  H01L2924/1627

摘要： In accordance with the present invention, an integrated circuit package comprises a thermally conductive plate for receiving an integrated circuit and an open rectangular structure of conductor and insulator for surrounding the sides of the circuit and presenting one or more linear arrays of conductive connectors extending laterally through the rectangular structure. Preferably the rectangular structure also includes transverse contacts. Advantageously the plate includes extensions beyond the rectangular structure for acting as cooling fins on opposing sides of the rectangular structure. The linear arrays and cooling fins are preferably on different pairs of parallel sides.

摘要翻译： 根据本发明，集成电路封装包括用于接收集成电路的导热板和用于围绕电路的侧面的导体和绝缘体的开放的矩形结构，并且呈现一个或多个横向延伸的导电连接器线性阵列 矩形结构。 优选地，矩形结构还包括横向接触。 有利地，板包括超过矩形结构的延伸部，用作在矩形结构的相对侧上的冷却片。 线性阵列和冷却片优选地在不同的平行侧对上。

公开(公告)号：US5000532A

公开(公告)日：1991-03-19

申请号：US431941

申请日：1989-11-06

申请人： Richard T. Kraetsch ,  Richard J. Pimpinella ,  Leonard W. Schaper ,  King L. Tai

发明人： Richard T. Kraetsch ,  Richard J. Pimpinella ,  Leonard W. Schaper ,  King L. Tai

IPC分类号： G02B6/35 ,  G02B6/36

CPC分类号： G02B6/3508 ,  G02B6/355 ,  G02B6/3572 ,  G02B6/3582 ,  G02B6/3652 ,  G02B6/3692

摘要： A precisely aligned optical fiber switch assembly. A base member has a vee groove for supporting a fixed optical fiber and a second optical fiber in optical alignment with the fixed fiber. The groove contains sections of different dimensions that receive and align sheathed portions of the fibers and groove sections that receive and align unsheathed portions of the fibers. First aligning means on the base member longitudinally position the fixed and second fibers in the groove. Covering means mate with the base member for covering at least part of the sheathed portions of the fibers. Aligning means position the covering means precisely with respect to the base member.

摘要翻译： 精密对准的光纤开关组件。 基座构件具有用于支撑固定光纤的vee槽和与固定光纤对准的第二光纤。 凹槽包含不同尺寸的部分，其接收和对准纤维的护套部分和容纳和对准纤维未固化部分的凹槽部分。 基体上的第一对准装置将固定和第二纤维纵向定位在槽中。 覆盖装置与基部构件配合以覆盖纤维的至少一部分护套部分。 对准装置将覆盖装置相对于基座构件精确地定位。

公开(公告)号：US4946236A

公开(公告)日：1990-08-07

申请号：US358912

申请日：1989-05-30

申请人： Mindaugas F. Dautartas ,  Yinon Degani ,  Richard T. Kraetsch ,  Richard J. Pimpinella ,  King L. Tai

发明人： Mindaugas F. Dautartas ,  Yinon Degani ,  Richard T. Kraetsch ,  Richard J. Pimpinella ,  King L. Tai

IPC分类号： G02B6/38 ,  G02B6/35 ,  G02B26/08

CPC分类号： G02B6/3508 ,  G02B6/3558 ,  G02B6/3562 ,  G02B6/3572

摘要： An m-input/n-output (e.g., 2.times.2) optical fiber switch is disclosed which alters the location of the fibers by the application of an external force. Illustratively, the switch uses a housing with a diamond-shaped opening extending therethrough, with pairs of optical fibers positioned in orthogonally located V-grooves. Upon the application of an external force, the fibers are moved into the remaining, vacant V-grooves formed by the diamond-shaped opening. In a preferred embodiment, a (2.times.2) switch is magnetically activated.

公开(公告)号：US5481205A

公开(公告)日：1996-01-02

申请号：US344393

申请日：1994-11-23

申请人： Robert C. Frye ,  Maureen Y. Lau ,  King L. Tai

发明人： Robert C. Frye ,  Maureen Y. Lau ,  King L. Tai

IPC分类号： H01L21/66 ,  G01R1/067 ,  G01R1/073 ,  G01R31/26 ,  H01L27/10 ,  H05K3/32 ,  G01R1/06 ,  H01L23/48

CPC分类号： H05K3/325 ,  G01R1/07307 ,  G01R1/06738 ,  H01L2924/0002

摘要： A given testing substrate for fast-testing many integrated-circuit electronic devices, one after the other, has a set of mutually insulated collated wiring areas that can be aligned with solder-bump I/O pads of the electronic devices. At the surface of each of the corrugated areas is located a layer that is an electrically conductive durable oxide, or that is itself durable, electrically conductive, and non-oxidizable. During testing, the solder-bump I/O pads of the electronic device being tested are aligned with and pressed against the corrugated wiring areas of the given substrate. Alternatively, the electronic devices being of the electrically programmable variety, such as EPROMs, programming voltages can be delivered to each of the devices, one after the other, through the corrugated wiring areas of a single substrate.

摘要翻译： 给定的用于快速测试许多集成电路电子器件的测试基板，一个接一个地具有一组可以与电子器件的焊料凸块I / O焊盘对准的相互绝缘的整理布线区域。 在每个波纹区域的表面上设置有导电耐用氧化物的层，或者其本身是耐用的，导电的和不可氧化的。 在测试期间，正在测试的电子器件的焊料凸块I / O焊盘与给定衬底的波纹布线区域对准并压紧。 或者，可以通过单个基板的波纹布线区域，一个接一个地将诸如EPROM的编程电压的电可编程品种的电子装置传送到每个装置。

公开(公告)号：US4670770A

公开(公告)日：1987-06-02

申请号：US582079

申请日：1984-02-17

申请人： King L. Tai

发明人： King L. Tai

IPC分类号： H01L23/14 ,  H01L23/485 ,  H01L23/538 ,  H01L23/64 ,  H01L29/06 ,  H01L29/04

CPC分类号： H01L24/02 ,  H01L23/147 ,  H01L23/538 ,  H01L23/5384 ,  H01L23/642 ,  H01L29/0657 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/01067 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15156 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107

摘要： In the interest of enhanced yield in the manufacture of "wafer-scale" integrated circuits an assembly of integrated circuit chips is made by placing chips on a substrate. Chips have beveled edges as produced by crystallographically anisotropic chemical etching, and the substrate has wells, grooves, or openings having sloping walls. Chips are positioned on the substrate by bringing sloping walls and beveled edges in juxtaposition, and circuitry on chips is connected to circuitry on the substrate.

摘要翻译： 为了在“晶片级”集成电路的制造中提高产量的优点，通过将芯片放置在衬底上来制成集成电路芯片的组件。 芯片具有通过晶体学各向异性化学蚀刻产生的斜边，并且基板具有具有倾斜壁的孔，凹槽或开口。 通过使倾斜的壁和倾斜的边缘并置来将芯片定位在基板上，并且芯片上的电路连接到基板上的电路。