公开(公告)号：US08008131B2

公开(公告)日：2011-08-30

申请号：US12055735

申请日：2008-03-26

申请人： Chien-Te Feng ,  Kevin Jin

发明人： Chien-Te Feng ,  Kevin Jin

IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44 ,  H01L23/495 ,  H01L23/10 ,  H01L23/367

CPC分类号： H01L23/4952 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/4334 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/78743 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： The invention provides semiconductor chip packages, tools, and methods for preventing and for correcting leadfinger deformation caused during wirebonding in semiconductor chip package manufacturing. Disclosed are improved heat blocks and methods for their use in ensuring adequate clearance between leadfingers and adjacent heat spreaders, as well as semiconductor chip package assemblies wherein a selected clearance between leadfingers and parallel surfaces may be assured. Methods of the invention include steps for supporting the proximal ends of the leadfingers using the wirebonding cavity of a heat block. Thus supported, a plurality of bondwires are attached to couple bond pads of the semiconductor chip to the proximal ends of leadfingers. Thereafter, the clearance between the wirebonded proximal ends of the leadfingers and the adjacent parallel surface of the heat spreader is adjusted using a spacing cavity of the heat block. In preferred embodiments of the invention, a plurality of bondwires couple a plurality of bond pads of the semiconductor chip to the proximal end of a single leadfinger, with assured clearance between the proximal end of the leadfinger and an underlying surface.

摘要翻译： 本发明提供半导体芯片封装，半导体芯片封装制造中用于防止和校正在引线键合期间引起的引线变形的半导体芯片封装，工具和方法。 公开了改进的热块和方法，用于确保引线管和相邻散热器之间的足够的间隙，以及半导体芯片封装组件，其中可以确保引线管和平行表面之间的选定的间隙。 本发明的方法包括使用加热块的引线接合腔来支撑引线针的近端的步骤。 如此支撑，多个接合线被连接以将半导体芯片的接合焊盘耦合到引线管的近端。 此后，使用加热块的间隔腔调节引线键合的引线键合近端与散热器的相邻平行表面之间的间隙。 在本发明的优选实施例中，多个键合线将半导体芯片的多个接合焊盘耦合到单个引线手柄的近端，并且在引导件的近端和下面的表面之间具有确保的间隙。

公开(公告)号：US20090243057A1

公开(公告)日：2009-10-01

申请号：US12055735

申请日：2008-03-26

申请人： Chien-Te Feng ,  Kevin Jin

发明人： Chien-Te Feng ,  Kevin Jin

IPC分类号： H01L23/495 ,  H01L21/02

CPC分类号： H01L23/4952 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/4334 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/78743 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： The invention provides semiconductor chip packages, tools, and methods for preventing and for correcting leadfinger deformation caused during wirebonding in semiconductor chip package manufacturing. Disclosed are improved heat blocks and methods for their use in ensuring adequate clearance between leadfingers and adjacent heat spreaders, as well as semiconductor chip package assemblies wherein a selected clearance between leadfingers and parallel surfaces may be assured. Methods of the invention include steps for supporting the proximal ends of the leadfingers using the wirebonding cavity of a heat block. Thus supported, a plurality of bondwires are attached to couple bond pads of the semiconductor chip to the proximal ends of leadfingers. Thereafter, the clearance between the wirebonded proximal ends of the leadfingers and the adjacent parallel surface of the heat spreader is adjusted using a spacing cavity of the heat block. In preferred embodiments of the invention, a plurality of bondwires couple a plurality of bond pads of the semiconductor chip to the proximal end of a single leadfinger, with assured clearance between the proximal end of the leadfinger and an underlying surface.

摘要翻译： 本发明提供半导体芯片封装，半导体芯片封装制造中用于防止和校正在引线键合期间引起的引线变形的半导体芯片封装，工具和方法。 公开了改进的热块和方法，用于确保引线管和相邻散热器之间的足够的间隙，以及半导体芯片封装组件，其中可以确保引线管和平行表面之间的选定的间隙。 本发明的方法包括使用加热块的引线接合腔支撑引导针的近端的步骤。 如此支撑，多个接合线被连接以将半导体芯片的接合焊盘耦合到引线管的近端。 此后，使用加热块的间隔腔调节引线键合的引线键合近端与散热器的相邻平行表面之间的间隙。 在本发明的优选实施例中，多个键合线将半导体芯片的多个接合焊盘耦合到单个引线手柄的近端，并且在引导件的近端和下面的表面之间具有确保的间隙。

公开(公告)号：US08304871B2

公开(公告)日：2012-11-06

申请号：US13080320

申请日：2011-04-05

申请人： Frank Yu ,  Lance Wright ,  Chien-Te Feng ,  Sandra Horton

发明人： Frank Yu ,  Lance Wright ,  Chien-Te Feng ,  Sandra Horton

IPC分类号： H01L23/495

CPC分类号： H01L23/4951 ,  H01L23/3107 ,  H01L23/49541 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/2919 ,  H01L2224/30181 ,  H01L2224/30505 ,  H01L2224/30519 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/1305 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A packaged semiconductor device includes a semiconductor die including a substrate having a topside including active circuitry and a bottomside with at least one backside metal layer directly attached. A package including a molding material having a die pad and a plurality of leads is encapsulated within the molding material, wherein the leads include an exposed portion that includes a bonding portion. The topside of the semiconductor die is attached to the die pad, and the package includes a gap that exposes the backside metal layer along a bottom surface of the package. Bond wires couple pads on the topside of the semiconductor die to the leads. The bonding portions, the molding material along the bottom surface of the package, and the backside metal layer are all substantially planar to one another.

摘要翻译： 封装的半导体器件包括半导体管芯，该半导体管芯包括具有包括有源电路的顶面的基板和具有直接附接的至少一个背侧金属层的底部底部。 包括具有管芯焊盘和多个引线的成型材料的封装被封装在模制材料内，其中引线包括包括结合部分的暴露部分。 半导体管芯的顶侧附接到管芯焊盘，并且封装件包括沿着封装的底表面暴露背面金属层的间隙。 键合线将半导体芯片顶端的引线耦合到引线。 接合部分，沿着封装的底表面的成型材料和背面金属层彼此基本上是平面的。

公开(公告)号：US08456021B2

公开(公告)日：2013-06-04

申请号：US12954397

申请日：2010-11-24

申请人： Chien-Te Feng ,  Shih-Chin Lin

发明人： Chien-Te Feng ,  Shih-Chin Lin

IPC分类号： H01L21/31

CPC分类号： H01L24/32 ,  H01L21/563 ,  H01L23/481 ,  H01L23/4985 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32237 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81409 ,  H01L2224/81411 ,  H01L2224/81413 ,  H01L2224/81416 ,  H01L2224/81418 ,  H01L2224/8142 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81457 ,  H01L2224/8146 ,  H01L2224/81463 ,  H01L2224/81464 ,  H01L2224/81469 ,  H01L2224/81473 ,  H01L2224/81476 ,  H01L2224/81478 ,  H01L2224/83385 ,  H01L2224/85409 ,  H01L2224/85411 ,  H01L2224/85413 ,  H01L2224/85416 ,  H01L2224/85418 ,  H01L2224/8542 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/85457 ,  H01L2224/8546 ,  H01L2224/85463 ,  H01L2224/85464 ,  H01L2224/85469 ,  H01L2224/85473 ,  H01L2224/85476 ,  H01L2224/85478 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit (IC) device includes a polymer substrate having a topside surface and a bottomside surface opposite the topside surface, a plurality of through-holes that extend from the topside surface to the bottomside surface, and a plurality of bottom metal pads on the bottomside surface positioned over the plurality of through-holes. At least one IC die having an active topside including a plurality of bond pads and a second side is affixed to the topside surface. Bonding features are coupled to the plurality of bond pads for coupling respective ones of the plurality of bond pads to the plurality bottom metal pads. The bonding features extend into the through-holes to contact the bottom metal pads.

摘要翻译： 集成电路（IC）装置包括具有顶侧表面和与顶侧表面相对的底部表面的聚合物基板，从顶侧表面延伸到底部表面的多个通孔，以及多个底部金属焊盘 底部表面定位在多个通孔上。 具有包括多个接合焊盘的活动顶面和第二侧的至少一个IC管芯固定到顶侧表面。 接合特征耦合到多个接合焊盘，用于将多个接合焊盘中的相应接合焊盘连接到多个底部金属焊盘。 接合特征延伸到通孔中以接触底部金属焊盘。

公开(公告)号：US20120276692A1

公开(公告)日：2012-11-01

申请号：US13530960

申请日：2012-06-22

申请人： Chien-Te Feng ,  Yuan-Pao Cheng ,  Li-Chaio Chou

发明人： Chien-Te Feng ,  Yuan-Pao Cheng ,  Li-Chaio Chou

IPC分类号： H01L21/50

CPC分类号： H01L23/4334 ,  H01L23/49551 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： Embodiments of the invention relate to methods for semiconductor chip package assembly. An embodiment of the invention includes providing a metallic leadframe with a chip mounting surface and a plurality of leadfingers. The leadfingers have a proximal end for receiving one or more wirebonds and a distal end for providing an electrical path from the proximal end. One or more of the leadfingers also has an offset portion and underlying heat spreader, increasing the stiffness of the leadfinger, and increasing leadfinger deflection-resistance and spring-back. The offset is in the direction opposite the plane of a heat spreader thermally coupled to the mounting surface. A semiconductor chip is affixed to the mounting surface and a plurality of bond pads of the chip are wirebonded to the offset portions of the proximal ends of individual leadfingers. The chip, the bondwires, portions of the heat spreader and leadfingers are encapsulated.

摘要翻译： 本发明的实施例涉及用于半导体芯片封装组装的方法。 本发明的实施例包括提供具有芯片安装表面的金属引线框架和多个引线引脚。 引导器具有用于接收一个或多个引线键的近端和用于从近端提供电路径的远端。 一个或多个引导装置还具有偏移部分和底部的散热器，增加了引线框的刚度，并且增加了引线夹的抗挠曲和回弹。 偏移方向与热耦合到安装表面的散热器的平面相反。 将半导体芯片固定到安装表面上，并且芯片的多个接合焊盘引线接合到单个引线管的近端的偏移部分。 芯片，焊丝，​​散热器和引线管的部分被封装。

公开(公告)号：US08039955B2

公开(公告)日：2011-10-18

申请号：US12463729

申请日：2009-05-11

申请人： Chien-Te Feng ,  Frank Yu

发明人： Chien-Te Feng ,  Frank Yu

IPC分类号： H01L23/48

CPC分类号： H01L23/3107 ,  H01L21/4878 ,  H01L23/3142 ,  H01L23/4334 ,  H01L23/562 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A mold lock and a method of forming the mold lock are provided. The mold lock is used in an encapsulated semiconductor device and includes a neck and a shaped head integral with the neck. The mold lock can be formed to project above a support component, such as a heat spreader, of the semiconductor device and the neck is formed from the support component. The shaped head is of a greater dimension than the neck and can present a “T” shape in side view or a “Y” shape in side view. A base portion of the neck is seated within the support component. A method is provided for forming the described mold lock.

摘要翻译： 提供了模具锁和形成模具锁的方法。 模具锁用于封装的半导体器件中，并且包括与颈部成一体的颈部和形状的头部。 模具锁可以形成为突出在半导体器件的支撑部件（例如散热器）上方，并且颈部由支撑部件形成。 成形头部的尺寸比颈部大，并且可以在侧视图中呈现“T”形或侧视图中呈“Y”形。 颈部的基部位于支撑部件内。 提供了一种用于形成所述模具锁的方法。

公开(公告)号：US08274140B2

公开(公告)日：2012-09-25

申请号：US13048355

申请日：2011-03-15

申请人： Chien-Te Feng ,  Yuan-Pao Cheng ,  Li-Chaio Chou

发明人： Chien-Te Feng ,  Yuan-Pao Cheng ,  Li-Chaio Chou

IPC分类号： H01L23/495

CPC分类号： H01L23/4334 ,  H01L23/49551 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： The invention relates to leadframes and semiconductor chip package assemblies using leadframes, and to methods for their assembly. A disclosed embodiment of the invention includes a semiconductor package leadframe with a chip mounting surface for receiving a semiconductor chip and a plurality of leadfingers. The leadfingers have a proximal end for receiving one or more wirebond, and a distal end for providing an electrical path from the proximal end. One or more of the leadfingers also has an offset portion at its proximal end for increasing the clearance between the leadfinger and underlying heat spreader, increasing the stiffness of the leadfinger, and increasing leadfinger deflection-resistance and spring-back. The offset is in the direction opposite the plane of a heat spreader thermally coupled to the mounting surface. Preferred embodiments of the invention further include a semiconductor chip affixed to the mounting surface and a plurality of bondwires operably coupling bond pads of the chip to the offset portions of the proximal ends of individual leadfingers.

摘要翻译： 本发明涉及引线框和使用引线框的半导体芯片封装组件及其组装方法。 本发明公开的实施例包括具有用于接收半导体芯片和多个引线引脚的芯片安装表面的半导体封装引线框架。 引导器具有用于接收一个或多个引线键的近端和用于从近端提供电路径的远端。 一个或多个引导装置在其近端还具有偏移部分，用于增加引导件和下面的散热器之间的间隙，增加引导件的刚度，以及增加引线夹的抗挠曲和回弹。 偏移方向与热耦合到安装表面的散热器的平面相反。 本发明的优选实施例还包括固定到安装表面的半导体芯片和可操作地将芯片的接合焊盘耦合到单个引线管的近端的偏移部分的多个焊丝。

公开(公告)号：US08058706B2

公开(公告)日：2011-11-15

申请号：US12555646

申请日：2009-09-08

申请人： Chien-Te Feng ,  Kazuaki Ano ,  Frank Yu ,  Trevor Liu

发明人： Chien-Te Feng ,  Kazuaki Ano ,  Frank Yu ,  Trevor Liu

IPC分类号： H01L29/06

CPC分类号： H01L29/0657 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/29035 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32105 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48475 ,  H01L2224/4848 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/85051 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10156 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/35121 ,  Y10T29/49128 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A packaged electronic device includes a thickness shaped IC die including a top portion, top surface, active circuitry, bottom portion and bottom surface. A cross sectional area of the bottom surface is ≧5% less than a cross sectional area of the top surface to provide a protruding lip having a bottom lip surface. A package substrate includes a top substrate surface including substrate bonding sites, a bottom substrate surface, and a die support structure on the top substrate surface having a gap region. The bottom lip surface of the IC die is secured to the die support structure and the bottom surface of the IC die extends below the die support structure into the gap region. Coupling connectors couple the bonding features on the IC die to the substrate bonding sites.

摘要翻译： 封装的电子器件包括厚度形状的IC管芯，其包括顶部，顶面，有源电路，底部和底面。 底面的横截面积比顶面的截面积小5％以提供具有底唇表面的突出唇缘。 封装衬底包括顶部衬底表面，其包括衬底结合部位，底部衬底表面以及具有间隙区域的顶部衬底表面上的管芯支撑结构。 IC芯片的底部唇表面固定到模具支撑结构，并且IC芯片的底表面在模具支撑结构的下方延伸到间隙区域中。 耦合连接器将IC芯片上的结合特征耦合到基板结合位置。

公开(公告)号：US07928544B2

公开(公告)日：2011-04-19

申请号：US12120515

申请日：2008-05-14

申请人： Chien-Te Feng ,  Yuan-Pao Cheng ,  Li-Chaio Chou

发明人： Chien-Te Feng ,  Yuan-Pao Cheng ,  Li-Chaio Chou

IPC分类号： H01L23/495

CPC分类号： H01L23/4334 ,  H01L23/49551 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： The invention relates to leadframes and semiconductor chip package assemblies using leadframes, and to methods for their assembly. A disclosed embodiment of the invention includes a semiconductor package leadframe with a chip mounting surface for receiving a semiconductor chip and a plurality of leadfingers. The leadfingers have a proximal end for receiving one or more wirebond, and a distal end for providing an electrical path from the proximal end. One or more of the leadfingers also has an offset portion at its proximal end for increasing the clearance between the leadfinger and underlying heat spreader, increasing the stiffness of the leadfinger, and increasing leadfinger deflection-resistance and spring-back. The offset is in the direction opposite the plane of a heat spreader thermally coupled to the mounting surface. Preferred embodiments of the invention further include a semiconductor chip affixed to the mounting surface and a plurality of bondwires operably coupling bond pads of the chip to the offset portions of the proximal ends of individual leadfingers.

摘要翻译： 本发明涉及引线框和使用引线框的半导体芯片封装组件及其组装方法。 本发明公开的实施例包括具有用于接收半导体芯片和多个引线引脚的芯片安装表面的半导体封装引线框架。 引导器具有用于接收一个或多个引线键的近端和用于从近端提供电路径的远端。 一个或多个引导装置在其近端还具有偏移部分，用于增加引导器和下面的散热器之间的间隙，增加引导件的刚度，以及增加引线架的抗偏转和弹回。 偏移方向与热耦合到安装表面的散热器的平面相反。 本发明的优选实施例还包括固定到安装表面的半导体芯片和可操作地将芯片的接合焊盘耦合到单个引线管的近端的偏移部分的多个焊丝。

公开(公告)号：US20120126418A1

公开(公告)日：2012-05-24

申请号：US12954397

申请日：2010-11-24

申请人： Chien-Te Feng ,  Shih-Chin Lin

发明人： Chien-Te Feng ,  Shih-Chin Lin

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L24/32 ,  H01L21/563 ,  H01L23/481 ,  H01L23/4985 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32237 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81409 ,  H01L2224/81411 ,  H01L2224/81413 ,  H01L2224/81416 ,  H01L2224/81418 ,  H01L2224/8142 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81457 ,  H01L2224/8146 ,  H01L2224/81463 ,  H01L2224/81464 ,  H01L2224/81469 ,  H01L2224/81473 ,  H01L2224/81476 ,  H01L2224/81478 ,  H01L2224/83385 ,  H01L2224/85409 ,  H01L2224/85411 ,  H01L2224/85413 ,  H01L2224/85416 ,  H01L2224/85418 ,  H01L2224/8542 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/85457 ,  H01L2224/8546 ,  H01L2224/85463 ,  H01L2224/85464 ,  H01L2224/85469 ,  H01L2224/85473 ,  H01L2224/85476 ,  H01L2224/85478 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit (IC) device includes a polymer substrate having a topside surface and a bottomside surface opposite the topside surface, a plurality of through-holes that extend from the topside surface to the bottomside surface, and a plurality of bottom metal pads on the bottomside surface positioned over the plurality of through-holes. At least one IC die having an active topside including a plurality of bond pads and a second side is affixed to the topside surface. Bonding features are coupled to the plurality of bond pads for coupling respective ones of the plurality of bond pads to the plurality bottom metal pads. The bonding features extend into the through-holes to contact the bottom metal pads.

摘要翻译： 集成电路（IC）装置包括具有顶侧表面和与顶侧表面相对的底部表面的聚合物基板，从顶侧表面延伸到底部表面的多个通孔，以及多个底部金属焊盘 底部表面定位在多个通孔上。 具有包括多个接合焊盘的活动顶面和第二侧的至少一个IC管芯固定到顶侧表面。 接合特征耦合到多个接合焊盘，用于将多个接合焊盘中的相应接合焊盘连接到多个底部金属焊盘。 接合特征延伸到通孔中以接触底部金属焊盘。