专利检索 ap:("Infineon Technologies AG") AND inv:"Ulrike Fastner" 第 1 页

1.

发明申请
Semiconductor Devices and Methods of Forming Thereof 审中-公开
标题翻译：半导体器件及其形成方法

公开(公告)号：US20170033066A1

公开(公告)日：2017-02-02

申请号：US15295631

申请日：2016-10-17

申请人： Infineon Technologies AG

发明人： Evelyn Napetschnig , Ulrike Fastner , Alexander Heinrich , Thomas Fischer

IPC分类号： H01L23/00 , H01L21/304 , H01L21/268 , H01L23/31 , H01L21/78

CPC分类号： H01L24/05 , H01L21/268 , H01L21/304 , H01L21/3086 , H01L21/6835 , H01L21/6836 , H01L21/78 , H01L23/3107 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/27 , H01L24/29 , H01L24/94 , H01L24/96 , H01L2221/68327 , H01L2221/6834 , H01L2224/02205 , H01L2224/03009 , H01L2224/0345 , H01L2224/03452 , H01L2224/0361 , H01L2224/03622 , H01L2224/03912 , H01L2224/0401 , H01L2224/04026 , H01L2224/05005 , H01L2224/05082 , H01L2224/05083 , H01L2224/05084 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05172 , H01L2224/05554 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/0566 , H01L2224/05664 , H01L2224/05669 , H01L2224/10126 , H01L2224/11009 , H01L2224/11011 , H01L2224/11019 , H01L2224/1134 , H01L2224/1146 , H01L2224/1147 , H01L2224/11845 , H01L2224/13007 , H01L2224/13013 , H01L2224/13082 , H01L2224/13083 , H01L2224/131 , H01L2224/13105 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/26125 , H01L2224/27009 , H01L2224/27019 , H01L2224/2746 , H01L2224/2747 , H01L2224/27845 , H01L2224/29007 , H01L2224/29013 , H01L2224/291 , H01L2224/29105 , H01L2224/29109 , H01L2224/29111 , H01L2224/29116 , H01L2224/29118 , H01L2224/29139 , H01L2224/29144 , H01L2224/94 , H01L2924/01013 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/181 , H01L2924/206 , H01L2924/2064 , H01L2924/00 , H01L2924/00014 , H01L2924/01023 , H01L2924/01032 , H01L2224/11 , H01L2224/03 , H01L2224/27

摘要： In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a contact layer over a first major surface of a substrate. The substrate includes device regions separated by kerf regions. The contact layer is disposed in the kerf region and the device regions. A structured solder layer is formed over the device regions. The contact layer is exposed at the kerf region after forming the structured solder layer. The contact layer and the substrate in the kerf regions are diced.

摘要翻译： 根据本发明的实施例，形成半导体器件的方法包括在衬底的第一主表面上形成接触层。衬底包括由切口区域分隔开的器件区域。接触层设置在切口区域和器件区域中。在器件区域上形成结构化的焊料层。在形成结构化的焊料层之后，在切割区域处露出接触层。切割区域中的接触层和基底。

2.

发明授权
Semiconductor device with plated lead frame, and method for manufacturing thereof 有权

公开(公告)号：US09847235B2

公开(公告)日：2017-12-19

申请号：US14190952

申请日：2014-02-26

申请人： Infineon Technologies AG

发明人： Carsten von Koblinski , Ulrike Fastner , Andre Brockmeier , Peter Zorn

IPC分类号： H01L21/52 , H01L21/78 , H01L21/683 , H01L23/00 , H01L23/051 , H01L23/492 , H01L23/498 , H01L21/48 , H01L23/367

CPC分类号： H01L21/52 , H01L21/4803 , H01L21/683 , H01L21/78 , H01L23/051 , H01L23/3677 , H01L23/492 , H01L23/49861 , H01L24/19 , H01L24/20 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L24/92 , H01L24/97 , H01L2224/0346 , H01L2224/2101 , H01L2224/214 , H01L2224/215 , H01L2224/221 , H01L2224/2732 , H01L2224/29011 , H01L2224/29188 , H01L2224/2919 , H01L2224/32105 , H01L2224/32111 , H01L2224/32155 , H01L2224/32225 , H01L2224/73267 , H01L2224/82101 , H01L2224/82105 , H01L2224/82947 , H01L2224/83192 , H01L2224/83201 , H01L2224/9202 , H01L2224/92244 , H01L2224/97 , H01L2924/13055 , H01L2924/15156 , H01L2924/3511 , H01L2924/00 , H01L2924/00014 , H01L2224/03 , H01L2924/0665 , H01L2924/014 , H01L2924/00012 , H01L2924/01029 , H01L2924/01028 , H01L2224/19 , H01L2224/83

摘要： A carrier substrate having a plurality of receptacles each for receiving and carrying a semiconductor chip is provided. Semiconductor chips are arranged in the receptacles, and metal is plated in the receptacles to form a metal structure on and in contact with the semiconductor chips. The carrier substrate is cut to form separate semiconductor devices.

3.

发明申请
Semiconductor Devices and Methods of Forming Thereof 有权
标题翻译：半导体器件及其形成方法

公开(公告)号：US20150123264A1

公开(公告)日：2015-05-07

申请号：US14070334

申请日：2013-11-01

申请人： INFINEON TECHNOLOGIES AG

发明人： Evelyn Napetschnig , Ulrike Fastner , Alexander Heinrich , Thomas Fischer

IPC分类号： H01L23/00 , H01L21/78

CPC分类号： H01L24/05 , H01L21/268 , H01L21/304 , H01L21/3086 , H01L21/6835 , H01L21/6836 , H01L21/78 , H01L23/3107 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/27 , H01L24/29 , H01L24/94 , H01L24/96 , H01L2221/68327 , H01L2221/6834 , H01L2224/02205 , H01L2224/03009 , H01L2224/0345 , H01L2224/03452 , H01L2224/0361 , H01L2224/03622 , H01L2224/03912 , H01L2224/0401 , H01L2224/04026 , H01L2224/05005 , H01L2224/05082 , H01L2224/05083 , H01L2224/05084 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05172 , H01L2224/05554 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/0566 , H01L2224/05664 , H01L2224/05669 , H01L2224/10126 , H01L2224/11009 , H01L2224/11011 , H01L2224/11019 , H01L2224/1134 , H01L2224/1146 , H01L2224/1147 , H01L2224/11845 , H01L2224/13007 , H01L2224/13013 , H01L2224/13082 , H01L2224/13083 , H01L2224/131 , H01L2224/13105 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/26125 , H01L2224/27009 , H01L2224/27019 , H01L2224/2746 , H01L2224/2747 , H01L2224/27845 , H01L2224/29007 , H01L2224/29013 , H01L2224/291 , H01L2224/29105 , H01L2224/29109 , H01L2224/29111 , H01L2224/29116 , H01L2224/29118 , H01L2224/29139 , H01L2224/29144 , H01L2224/94 , H01L2924/01013 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/181 , H01L2924/206 , H01L2924/2064 , H01L2924/00 , H01L2924/00014 , H01L2924/01023 , H01L2924/01032 , H01L2224/11 , H01L2224/03 , H01L2224/27

摘要： In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a contact layer over a first major surface of a substrate. The substrate includes device regions separated by kerf regions. The contact layer is disposed in the kerf region and the device regions. A structured solder layer is formed over the device regions. The contact layer is exposed at the kerf region after forming the structured solder layer. The contact layer and the substrate in the kerf regions are diced.

摘要翻译： 根据本发明的实施例，形成半导体器件的方法包括在衬底的第一主表面上形成接触层。衬底包括由切口区域分隔开的器件区域。接触层设置在切口区域和器件区域中。在器件区域上形成结构化的焊料层。在形成结构化的焊料层之后，在切割区域处露出接触层。切割区域中的接触层和基底。

4.

发明授权
Semiconductor device with plated lead frame 有权

公开(公告)号：US10748787B2

公开(公告)日：2020-08-18

申请号：US15794155

申请日：2017-10-26

申请人： Infineon Technologies AG

发明人： Carsten von Koblinski , Ulrike Fastner , Andre Brockmeier , Peter Zorn

IPC分类号： H01L23/495 , H01L21/52 , H01L21/78 , H01L21/683 , H01L23/051 , H01L23/492 , H01L23/498 , H01L21/48 , H01L23/00 , H01L23/367

摘要： A semiconductor device includes an insulating carrier structure comprised of an insulating inorganic material. The carrier structure has a receptacle in which a semiconductor chip is disposed. The semiconductor chip has a first side, a second side and a lateral rim. The carrier structure laterally surrounds the semiconductor chip and the lateral rim. The semiconductor device also includes a metal structure on and in contact with the second side of the semiconductor chip and embedded in the carrier structure.

5.

发明申请
SEMICONDUCTOR DEVICE HAVING A STRESS-COMPENSATED CHIP ELECTRODE 审中-公开
标题翻译：具有应力补偿芯片电极的半导体器件

公开(公告)号：US20160126197A1

公开(公告)日：2016-05-05

申请号：US14932548

申请日：2015-11-04

申请人： Infineon Technologies AG

发明人： Kurt Matoy , Dirk Ahlers , Ulrike Fastner , Petra Fischer , Karl-Heinz Gasser , Stephan Henneck , Stefan Krivec , Florian Weilnboeck

IPC分类号： H01L23/00 , H01L23/495 , H01L29/45 , H01L23/31

CPC分类号： H01L23/562 , H01L23/49524 , H01L23/49562 , H01L24/32 , H01L24/83 , H01L29/45 , H01L2224/0603 , H01L2224/32245 , H01L2224/40245 , H01L2224/8321 , H01L2224/83815 , H01L2924/014 , H01L2924/3511 , H01L2924/37001

摘要： A semiconductor device includes a semiconductor chip having a first main surface and a second main surface. A chip electrode is disposed on the first main surface. The chip electrode includes a first metal layer and wherein the first metal layer is arranged between the semiconductor chip and the second metal layer.

摘要翻译： 半导体器件包括具有第一主表面和第二主表面的半导体芯片。芯片电极设置在第一主表面上。芯片电极包括第一金属层，并且其中第一金属层布置在半导体芯片和第二金属层之间。

6.

发明授权
Semiconductor devices and methods of forming thereof 有权

公开(公告)号：US10262959B2

公开(公告)日：2019-04-16

申请号：US15295631

申请日：2016-10-17

申请人： Infineon Technologies AG

发明人： Evelyn Napetschnig , Ulrike Fastner , Alexander Heinrich , Thomas Fischer

IPC分类号： H01L23/00 , H01L21/78 , H01L21/308 , H01L21/683 , H01L21/268 , H01L21/304 , H01L23/31

摘要： In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a contact layer over a first major surface of a substrate. The substrate includes device regions separated by kerf regions. The contact layer is disposed in the kerf region and the device regions. A structured solder layer is formed over the device regions. The contact layer is exposed at the kerf region after forming the structured solder layer. The contact layer and the substrate in the kerf regions are diced.

7.

发明申请
Semiconductor Device with Plated Lead Frame 审中-公开

公开(公告)号：US20180061671A1

公开(公告)日：2018-03-01

申请号：US15794155

申请日：2017-10-26

申请人： Infineon Technologies AG

发明人： Carsten von Koblinski , Ulrike Fastner , Andre Brockmeier , Peter Zorn

IPC分类号： H01L21/52 , H01L21/78 , H01L21/48 , H01L23/498 , H01L23/492 , H01L23/051 , H01L23/00 , H01L21/683

摘要： A semiconductor device includes an insulating carrier structure comprised of an insulating inorganic material. The carrier structure has a receptacle in which a semiconductor chip is disposed. The semiconductor chip has a first side, a second side and a lateral rim. The carrier structure laterally surrounds the semiconductor chip and the lateral rim. The semiconductor device also includes a metal structure on and in contact with the second side of the semiconductor chip and embedded in the carrier structure.

8.

发明授权
Semiconductor devices having a glass substrate, and method for manufacturing thereof 有权
标题翻译：具有玻璃基板的半导体装置及其制造方法

公开(公告)号：US09117801B2

公开(公告)日：2015-08-25

申请号：US13894682

申请日：2013-05-15

申请人： Infineon Technologies AG

发明人： Carsten von Koblinski , Ulrike Fastner , Peter Zorn , Markus Ottowitz

IPC分类号： H01L21/48 , H01L23/498 , H01L21/78 , H01L23/31 , H01L23/00

CPC分类号： H01L21/481 , H01L21/2007 , H01L21/4846 , H01L21/78 , H01L23/3171 , H01L23/498 , H01L24/00 , H01L2924/12032 , H01L2924/12042 , H01L2924/13055 , H01L2924/15788 , H01L2924/00

摘要： A method for manufacturing semiconductor devices includes providing a stack having a semiconductor wafer and a glass substrate with openings and at least one trench attached to the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor devices. The openings of the glass substrate leave respective areas of the semiconductor devices uncovered by the glass substrate and the trench connects the openings. A metal layer is formed at least on exposed walls of the trench and the openings and on the uncovered areas of the semiconductor devices of the semiconductor wafer. A metal region is formed by electroplating metal in the openings and the trench and by subsequently grinding the glass substrate to remove the trenches. The stack of the semiconductor wafer and the attached glass substrate is cut to separate the semiconductor devices.

摘要翻译： 一种制造半导体器件的方法包括：提供具有半导体晶片的叠层和具有开口的玻璃基板和至少一个连接到半导体晶片的沟槽。半导体晶片包括多个半导体器件。玻璃基板的开口离开由玻璃基板未覆盖的半导体器件的各个区域，沟槽连接开口。至少在沟槽和开口的暴露的壁和半导体晶片的半导体器件的未覆盖区域上形成金属层。通过在开口和沟槽中电镀金属并随后研磨玻璃基底以去除沟槽而形成金属区域。切割半导体晶片和附着的玻璃基板的叠层以分离半导体器件。