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    Power amplification of a multi-tone test signal
    8.
    发明授权
    Power amplification of a multi-tone test signal 有权
    功率放大的多音测试信号

    公开(公告)号：US08829920B2

    公开(公告)日：2014-09-09

    申请号：US13485872

    申请日：2012-05-31

    申请人： Randy L. Wolf

    发明人： Randy L. Wolf

    IPC分类号： G01R27/02 ,  G01R27/28 ,  H01H31/02

    CPC分类号： G01R27/28 ,  G01R31/2841

    摘要： Disclosed are a circuit and method for amplifying the power of a multi-tone input signal. The multi-tone input signal is filtered separating out one signal having a tone at a fundamental frequency from another signal having additional tones at additional frequencies. The signal having the tone at the fundamental frequency is amplified and then filtered removing any harmonics added during amplification. The signals are then recombined generating a multi-tone output signal, wherein the tone at the fundamental frequency is boosted (i.e., has a higher power in the multi-tone output signal than in the multi-tone input signal), but the additional tones at the additional frequencies are not (i.e., the additional tones at the additional frequencies have essentially the same power in the multi-tone output and input signals). Also disclosed herein are embodiments of a testing system and method incorporating the above-described circuit to allow for testing of high power devices.

    摘要翻译： 公开了用于放大多音调输入信号的功率的电路和方法。 对多音调输入信号进行滤波，从具有附加频率的附加音调的另一信号中分离出具有基频的音调的一个信号。 在基频处具有音调的信号被放大，然后滤除去放大期间加入的任何谐波。 然后，重新组合信号以产生多音调输出信号，其中基频处的音调被提升（​​即，在多音调输出信号中具有比在多音调输入信号中更高的功率），但附加音调 在附加频率处不是（即，附加频率处的附加音调在多音调输出和输入信号中具有基本上相同的功率）。 本文还公开了包含上述电路以允许测试高功率器件的测试系统和方法的实施例。

    Silicon-on-insulator (SOI) structure configured for reduced harmonics, design structure and method
    9.
    发明授权
    Silicon-on-insulator (SOI) structure configured for reduced harmonics, design structure and method 有权
    绝缘体上硅（SOI）结构配置为减少谐波，设计结构和方法

    公开(公告)号：US08698244B2

    公开(公告)日：2014-04-15

    申请号：US12634893

    申请日：2009-12-10

    申请人： Alan B. Botula ,  John J. Ellis-Monaghan ,  Alvin J. Joseph ,  Max G. Levy ,  Richard A. Phelps ,  James A. Slinkman ,  Randy L. Wolf

    发明人： Alan B. Botula ,  John J. Ellis-Monaghan ,  Alvin J. Joseph ,  Max G. Levy ,  Richard A. Phelps ,  James A. Slinkman ,  Randy L. Wolf

    IPC分类号： H01L27/12

    CPC分类号： H01L29/78603 ,  H01L21/84 ,  H01L27/1203

    摘要： Disclosed is semiconductor structure with an insulator layer on a semiconductor substrate and a device layer is on the insulator layer. The substrate is doped with a relatively low dose of a dopant having a given conductivity type such that it has a relatively high resistivity. Additionally, a portion of the semiconductor substrate immediately adjacent to the insulator layer can be doped with a slightly higher dose of the same dopant, a different dopant having the same conductivity type or a combination thereof. Optionally, micro-cavities are created within this same portion so as to balance out any increase in conductivity with a corresponding increase in resistivity. Increasing the dopant concentration at the semiconductor substrate-insulator layer interface raises the threshold voltage (Vt) of any resulting parasitic capacitors and, thereby reduces harmonic behavior. Also disclosed herein are embodiments of a method and a design structure for such a semiconductor structure.

    摘要翻译： 公开了在半导体衬底上具有绝缘体层并且器件层位于绝缘体层上的半导体结构。 衬底掺杂有相对低剂量的具有给定导电类型的掺杂剂，使得其具有相对高的电阻率。 此外，与绝缘体层紧密相邻的半导体衬底的一部分可掺杂略高的相同掺杂剂剂量，具有相同导电类型的不同掺杂剂或其组合。 任选地，在该相同部分内形成微腔，以平衡电导率的任何增加和电阻率的相应增加。 增加半导体衬底 - 绝缘体层界面处的掺杂剂浓度会提高任何结果的寄生电容器的阈值电压（Vt），从而降低谐波行为。 本文还公开了用于这种半导体结构的方法和设计结构的实施例。