公开(公告)号：US5506444A

公开(公告)日：1996-04-09

申请号：US212786

申请日：1994-03-15

申请人： Yasunori Chikawa ,  Yoshiaki Honda ,  Katsunobu Mori ,  Naoyuki Tajima ,  Takaaki Tsuda ,  Takamichi Maeda ,  Mitsuaki Osono

发明人： Yasunori Chikawa ,  Yoshiaki Honda ,  Katsunobu Mori ,  Naoyuki Tajima ,  Takaaki Tsuda ,  Takamichi Maeda ,  Mitsuaki Osono

IPC分类号： H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L23/28

CPC分类号： H01L21/56 ,  H01L23/293 ,  H01L23/3121 ,  H01L2924/0002

摘要： In a semiconductor device of a tape carrier package type, the gap width between inner leads connected with a first edge side of a semiconductor chip set within a device mounting hole provided in the tape carrier is larger than the gap width between leads connected with a second edge side opposite to the first edge side of the semiconductor chip, and the gap length of device mounting hole between the first edge of the semiconductor chip and the first edge of the device mounting hole corresponding to the first edge of the semiconductor chip is smaller than the gap length between the second edge of the semiconductor chip and the second edge of the device mounting hole corresponding to the second edge of the semiconductor chip. Such structure enables an encapsulation resin to fill uniformly the device mounting hole, and the encapsulation resin after encapsulation has a shape of a designed dimension.

摘要翻译： 在载带封装型的半导体器件中，与设置在带载体中的器件安装孔内的半导体芯片的与第一边缘侧连接的内部引线之间的间隙宽度大于与第二引线连接的引线之间的间隙宽度 边缘侧与半导体芯片的第一边缘侧相对，并且半导体芯片的第一边缘与对应于半导体芯片的第一边缘的器件安装孔的第一边缘之间的器件安装孔的间隙长度小于 半导体芯片的第二边缘与器件安装孔的与半导体芯片的第二边缘对应的第二边缘之间的间隙长度。 这样的结构能够使封装树脂均匀地填充装置安装孔，并且封装后的封装树脂具有设计尺寸的形状。

公开(公告)号：US06838748B2

公开(公告)日：2005-01-04

申请号：US10434205

申请日：2003-05-09

申请人： Toshiya Ishio ,  Hiroyuki Nakanishi ,  Katsunobu Mori ,  Yoshihide Iwazaki ,  Shinji Suminoe

发明人： Toshiya Ishio ,  Hiroyuki Nakanishi ,  Katsunobu Mori ,  Yoshihide Iwazaki ,  Shinji Suminoe

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/552 ,  H01L29/06

CPC分类号： H01L23/552 ,  H01L23/3114 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L29/0657 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor chip of the present invention is so arranged that a front face on which an element circuit is formed has electrode pads and a side face and a back face are coated with a shielding layer for shielding electromagnetic waves. With this, it is possible to provide a semiconductor element capable of being easily manufactured into a smaller semiconductor device compared with a conventional semiconductor device equipped with a shielding cap; a semiconductor device; and a method for manufacturing a semiconductor element.

摘要翻译： 本发明的半导体芯片被布置成使得其上形成有元件电路的正面具有电极焊盘，并且侧面和背面涂覆有用于屏蔽电磁波的屏蔽层。 由此，与配备有屏蔽盖的现有的半导体装置相比，可以提供能够容易地制造成较小的半导体装置的半导体元件; 半导体器件; 以及半导体元件的制造方法。

公开(公告)号：US06552426B2

公开(公告)日：2003-04-22

申请号：US09847314

申请日：2001-05-03

申请人： Toshiya Ishio ,  Hiroyuki Nakanishi ,  Katsunobu Mori

发明人： Toshiya Ishio ,  Hiroyuki Nakanishi ,  Katsunobu Mori

IPC分类号： H01L2352

CPC分类号： H01L24/97 ,  H01L23/3121 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a quality and reliable high-density package (Chip Size Package) semiconductor device without problems related to the manufacturing process. The semiconductor device includes the first semiconductor substrate piece having electrode pads formed on its principle surface, and a second semiconductor mounting piece mounted thereon via a first insulating film and a die-attaching material. On the surface opposite the first semiconductor substrate piece of the second semiconductor substrate piece, formed are wiring patterns and a second insulating film for protecting the wiring patterns. The wiring patterns include electrode pads, wires, and lands where external connection terminals are provided.

摘要翻译： 本发明提供了质量可靠的高密度封装（芯片尺寸封装）半导体器件，而与制造工艺无关。 半导体器件包括：第一半导体衬底片，其具有形成在其主表面上的电极焊盘;以及第二半导体安装件，其经由第一绝缘膜和管芯附着材料安装在其上。 在与第二半导体衬底片的第一半导体衬底片相对的表面上形成布线图案和用于保护布线图案的第二绝缘膜。 布线图案包括设置有外部连接端子的电极焊盘，电线和焊盘。

公开(公告)号：US5614760A

公开(公告)日：1997-03-25

申请号：US386051

申请日：1995-02-07

申请人： Mitsuaki Osono ,  Naoyuki Tajima ,  Katsunobu Mori

发明人： Mitsuaki Osono ,  Naoyuki Tajima ,  Katsunobu Mori

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/28 ,  H01L23/495 ,  H01L23/34 ,  H01L23/48

CPC分类号： H01L24/50 ,  H01L23/49572 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01033 ,  H01L2924/01082

摘要： In a TCP (tape carrier package) semiconductor device having opposing, inner lead arrays bonded to a semiconductor device, a projection or projections are provided on each of the inner leads disposed at intervals of a greater distance on one side of the semiconductor, within a range for allowing the resin to flow out.

摘要翻译： 在具有接合到半导体器件的相对的内引线阵列的TCP（带载封装）半导体器件中，在半导体的一侧上以更大距离的间隔设置的每个内引线上设置有突起或突起， 允许树脂流出的范围。

公开(公告)号：US20060237848A1

公开(公告)日：2006-10-26

申请号：US11474469

申请日：2006-06-26

申请人： Shinji Suminoe ,  Hiroyuki Nakanishi ,  Toshiya Ishio ,  Yoshihide Iwazaki ,  Katsunobu Mori

发明人： Shinji Suminoe ,  Hiroyuki Nakanishi ,  Toshiya Ishio ,  Yoshihide Iwazaki ,  Katsunobu Mori

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05006 ,  H01L2224/05546 ,  H01L2224/05567 ,  H01L2224/13 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2224/05552 ,  H01L2924/00

摘要： A manufacturing method of a semiconductor device, comprising the steps of forming an insulation layer, which has an opening section in an area including an area on an electrode pad, on a top surface of the semiconductor substrate on which the electrode pad is formed; at least forming a first barrier metal layer, which becomes a part of a leading wiring layer, in an inner peripheral surface of the opening section including the top surface of the electrode pad; at least forming a main conductor layer, which becomes a part of the leading wiring layer, in an area surrounded by the first barrier metal layer in the opening section; eliminating an upper portion of the main conductor layer at least to a position at which the first barrier metal layer is exposed, and forming a second barrier metal layer, which becomes a part of the leading wiring layer, so as to cover the whole top surface of the main conductor layer.

摘要翻译： 一种半导体器件的制造方法，包括以下步骤：在形成有电极焊盘的半导体衬底的顶表面上形成绝缘层，该绝缘层在包括电极焊盘的区域的区域中具有开口部分; 至少在包括所述电极焊盘的顶面的所述开口部的内周面中形成成为前导布线层的一部分的第一阻挡金属层; 至少在由开口部分中的第一阻挡金属层包围的区域中形成成为引导布线层的一部分的主导体层; 消除主导体层的上部至少到第一阻挡金属层露出的位置，形成作为引导布线层的一部分的第二阻挡金属层，以覆盖整个顶表面 的主导体层。

公开(公告)号：US20060163728A1

公开(公告)日：2006-07-27

申请号：US11334485

申请日：2006-01-19

申请人： Hiroyuki Nakanishi ,  Katsunobu Mori

发明人： Hiroyuki Nakanishi ,  Katsunobu Mori

IPC分类号： H01L23/48

CPC分类号： H01L23/5389 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2224/96 ,  H01L2224/82

摘要： A semiconductor device includes: a semiconductor chip having a plurality of electrode pads formed on a principal surface thereof; a sealing resin, which covers both (i) side surfaces of the semiconductor chip and (ii) a surface of the semiconductor chip opposite to the principal surface; and external connection pads, which are provided on both (I) the principal surface and (II) a surface of the sealing resin flush with the principal surface, and which are electrically connected to the electrode pads. Thus, a semiconductor device is provided which makes it possible to place external connection pads at wider intervals, and which makes it possible to widen wires and to place the wires at wider intervals.

摘要翻译： 半导体器件包括：具有形成在其主表面上的多个电极焊盘的半导体芯片; 密封树脂，其覆盖半导体芯片的（i）侧表面和（ii）半导体芯片的与主表面相对的表面; 以及外部连接焊盘，其设置在主表面上的（I）主表面和（II）密封树脂的与主表面齐平的表面，并且与电极焊盘电连接。 因此，提供了一种半导体器件，其使得可以以更宽的间隔放置外部连接焊盘，并且这使得可以加宽电线并且以更宽的间隔放置电线。

公开(公告)号：US5604379A

公开(公告)日：1997-02-18

申请号：US452691

申请日：1995-05-30

申请人： Katsunobu Mori

发明人： Katsunobu Mori

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/822 ,  H01L23/12 ,  H01L23/31 ,  H01L23/528 ,  H01L23/532 ,  H01L27/04 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L24/11 ,  H01L23/3157 ,  H01L23/5283 ,  H01L23/5328 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02319 ,  H01L2224/0236 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041

摘要： A semiconductor device comprising a semiconductor chip, a plurality of electrode pads formed on the semiconductor chip, a metal wiring having a desired pattern and connected to the electrode pads, an anisotropic conductive film containing fine conductive particles and laminated on the semiconductor chip including the metal wiring, and an external electrode, in which the anisotropic conductive film has a concave portion at a desired portion on the metal wiring and the metal wiring is connected to the external electrode through the intermediary of the fine conductive particles present in the anisotropic conductive film by stuffing and sticking the external electrode in the concave portion.

摘要翻译： 一种半导体器件，包括半导体芯片，形成在半导体芯片上的多个电极焊盘，具有期望图案并连接到电极焊盘的金属布线，包含导电粒子的各向异性导电膜，层压在包括金属的半导体芯片上 布线和外部电极，其中各向异性导电膜在金属布线的期望部分具有凹部，并且金属布线通过介于各向异性导电膜中存在的微细导电颗粒的介质与外部电极连接， 将外部电极填充并粘贴在凹部中。

公开(公告)号：US5336650A

公开(公告)日：1994-08-09

申请号：US112315

申请日：1993-08-27

申请人： Yasunori Chikawa ,  Yoshiaki Honda ,  Katsunobu Mori ,  Naoyuki Tajima ,  Takaaki Tsuda ,  Takamichi Maeda

发明人： Yasunori Chikawa ,  Yoshiaki Honda ,  Katsunobu Mori ,  Naoyuki Tajima ,  Takaaki Tsuda ,  Takamichi Maeda

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31

CPC分类号： H01L21/56 ,  H01L23/293 ,  H01L23/3121 ,  H01L2924/0002 ,  Y10T29/49121

摘要： A tape carrier semiconductor device has a resin sealed area not so larger than the size of the semiconductor chip, e.g. substantially not exceeding 2 mm to the outside. A device hole is not larger than an area formed by extending the outer periphery of the semiconductor chip to the outside by 0.3 mm and an epoxy resin of 500-1200 ps in viscosity is used for sealing the chip.

摘要翻译： 带载半导体器件具有树脂密封区域不大于半导体芯片的尺寸，例如， 基本上不超过2mm。 器件孔不大于通过将半导体芯片的外周向外延伸0.3mm而形成的区域，并且使用粘度为500-1200ps的环氧树脂来密封芯片。

公开(公告)号：US20100294342A1

公开(公告)日：2010-11-25

申请号：US12783859

申请日：2010-05-20

申请人： Hiroyuki Nakanishi ,  Kohji Miyata ,  Yoshihide Iwazaki ,  Seiji Ishihara ,  Masato Yokobayashi ,  Etsuko Ishizuka ,  Kiyoharu Shimano ,  Katsunobu Mori

发明人： Hiroyuki Nakanishi ,  Kohji Miyata ,  Yoshihide Iwazaki ,  Seiji Ishihara ,  Masato Yokobayashi ,  Etsuko Ishizuka ,  Kiyoharu Shimano ,  Katsunobu Mori

IPC分类号： H01L31/048 ,  H01L31/18

CPC分类号： H01L31/0508 ,  H01L31/0201 ,  H01L31/048 ,  H01L31/0504 ,  H01L31/0512 ,  Y02E10/50

摘要： A solar cell module 1 includes a plurality of solar cells 30. Each of the plurality of solar cells 30 is disposed on a corresponding one of a plurality of pad sections in such a manner that the each of the plurality of solar cells 30 is electrically connected to the corresponding one of the plurality of pad sections. The each of the plurality of solar cells 30 is electrically connected to a corresponding inner lead section 120. A cathode section 114 and an anode section 116 feed an electric current generated by the plurality of solar cells 30. A metal lead frame is provided such that the plurality of pad sections, the inner lead sections 120, the cathode section 114 and the anode section 116 are provided therein as a part of the lead frame itself. This configuration enables the solar cell module 1 to endure against bending stress and to be curved. As a result, it is possible to provide a solar cell module which can be disposed along a curved surface of an electronics device.

摘要翻译： 太阳能电池模块1包括多个太阳能电池30.多个太阳能电池30中的每一个以多个太阳能电池30中的每一个电连接的方式设置在多个焊盘部分中的相应的一个上 到多个垫部分中的对应的一个。 多个太阳能电池30中的每一个电连接到相应的内部引线部分120.阴极部分114和阳极部分116馈送由多个太阳能电池30产生的电流。金属引线框架设置成使得 多个焊盘部分，内部引线部分120，阴极部分114和阳极部分116作为引线框架本身的一部分设置在其中。 这种构造使得太阳能电池模块1能够耐受弯曲应力并弯曲。 结果，可以提供一种可以沿着电子设备的曲面布置的太阳能电池模块。

公开(公告)号：US20050194686A1

公开(公告)日：2005-09-08

申请号：US11072238

申请日：2005-03-07

申请人： Yoshihide Iwazaki ,  Shinji Suminoe ,  Katsunobu Mori

发明人： Yoshihide Iwazaki ,  Shinji Suminoe ,  Katsunobu Mori

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/44 ,  H01L21/60 ,  H01L23/12 ,  H01L23/31 ,  H01L23/48 ,  H01L23/485 ,  H01L23/525 ,  H05K3/34

CPC分类号： H05K3/3452 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/1148 ,  H01L2224/13 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1357 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K2201/2081 ,  H05K2203/0315 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/013

摘要： A semiconductor device according to the present invention comprises an electrode pad electrically conducted to an electric circuit formed on an element-formed surface of a silicon wafer; a wiring pattern re-wired by being electrically conducted to the electrode pad; and an oxide film formed on a surface of the wiring pattern, the oxide film being formed by subjecting the wiring pattern to oxidization. With the provision of oxide film, the semiconductor device prevents a decrease in reliability in terms of electric characteristic or the like, and also achieves reduction in fabrication cost compared to a conventional semiconductor device.

摘要翻译： 根据本发明的半导体器件包括电导体，该电极焊盘导电到形成在硅晶片的元件形成表面上的电路; 通过对电极焊盘进行导电而重新布线的布线图案; 以及形成在所述布线图案的表面上的氧化膜，所述氧化膜通过对所述布线图案进行氧化而形成。 通过提供氧化膜，半导体器件防止电特性等的可靠性降低，并且与现有的半导体器件相比，也可以实现制造成本的降低。