公开(公告)号：US20120113500A1

公开(公告)日：2012-05-10

申请号：US13383010

申请日：2011-04-14

申请人： Koichi Hirano ,  Masami Nakagawa ,  Seiichi Nakatani

发明人： Koichi Hirano ,  Masami Nakagawa ,  Seiichi Nakatani

IPC分类号： G02F1/167 ,  H05K3/00

CPC分类号： G09F9/372 ,  G02F1/167 ,  G02F2001/1676 ,  G02F2201/18 ,  G09F9/301 ,  G09F15/0075

摘要： Provided is an electronic paper that permits a high-quality, large area to be easily created. Also provided is a method for producing the electronic paper. The electronic paper comprises: a first substrate upon which first electrodes are formed and a second substrate upon which second electrodes are formed, said first substrate and second substrate disposed so as to face each other; and a plurality of cell spaces constituting pixels between said first substrate and second substrate. The first substrate comprises a plurality of first sheet members, each having a first electrode formed thereon. By disposing a cover substrate on said first sheet members, each with a partition wall therebetween, a plurality of subsheet formations comprising the plurality of cell spaces partitioned by the partition walls are formed, and the first electrodes are connected in between adjacent subsheet formations.

摘要翻译： 提供了允许容易地创建高质量，大面积的电子纸。 还提供了一种用于生产电子纸的方法。 电子纸包括：形成有第一电极的第一基板和形成有第二电极的第二基板，所述第一基板和第二基板彼此相对配置; 以及在所述第一基板和第二基板之间构成像素的多个单元空间。 第一衬底包括多个第一片构件，每个第一片构件具有形成在其上的第一电极。 通过将覆盖基板设置在所述第一板状部件上，每个在其间具有隔壁，形成包括由隔壁分隔的多个电池单元的多个子片形成层，并且第一电极连接在相邻的子片层之间。

公开(公告)号：US08593720B2

公开(公告)日：2013-11-26

申请号：US13383010

申请日：2011-04-14

申请人： Koichi Hirano ,  Masami Nakagawa ,  Seiichi Nakatani

发明人： Koichi Hirano ,  Masami Nakagawa ,  Seiichi Nakatani

IPC分类号： G02B26/00 ,  G09G3/34

CPC分类号： G09F9/372 ,  G02F1/167 ,  G02F2001/1676 ,  G02F2201/18 ,  G09F9/301 ,  G09F15/0075

摘要： Provided is an electronic paper that permits a high-quality, large area to be easily created. Also provided is a method for producing the electronic paper. The electronic paper comprises: a first substrate upon which first electrodes are formed and a second substrate upon which second electrodes are formed, said first substrate and second substrate disposed so as to face each other; and a plurality of cell spaces constituting pixels between said first substrate and second substrate. The first substrate comprises a plurality of first sheet members, each having a first electrode formed thereon. By disposing a cover substrate on said first sheet members, each with a partition wall therebetween, a plurality of subsheet formations comprising the plurality of cell spaces partitioned by the partition walls are formed, and the first electrodes are connected in between adjacent subsheet formations.

摘要翻译： 提供了允许容易地创建高质量，大面积的电子纸。 还提供了一种用于生产电子纸的方法。 电子纸包括：形成有第一电极的第一基板和形成有第二电极的第二基板，所述第一基板和第二基板彼此相对配置; 以及在所述第一基板和第二基板之间构成像素的多个单元空间。 第一衬底包括多个第一片构件，每个第一片构件具有形成在其上的第一电极。 通过将覆盖基板设置在所述第一板状部件上，每个在其间具有隔壁，形成包括由隔壁分隔的多个电池单元的多个子片形成层，并且第一电极连接在相邻的子片层之间。

公开(公告)号：US08435842B2

公开(公告)日：2013-05-07

申请号：US12681399

申请日：2009-07-30

申请人： Koichi Hirano ,  Seiichi Nakatani ,  Tatsuo Ogawa

发明人： Koichi Hirano ,  Seiichi Nakatani ,  Tatsuo Ogawa

IPC分类号： H01L21/00

CPC分类号： H01L51/0541 ,  H01L51/0004 ,  H01L51/0022 ,  H01L51/0097 ,  H01L51/107 ,  Y02E10/549 ,  Y02P70/521

摘要： A method for manufacturing a flexible semiconductor device comprises (i) forming an insulating film on the upper surface of a resin film, (ii) forming a pattern of extraction electrodes on the upper surface of the resin film, (iii) forming a semiconductor layer on the insulating film in such a manner that the semiconductor layer is in contact with the pattern of extraction electrodes, and (iv) forming a sealing resin layer on the upper surface of the resin film in such a manner that the sealing resin layer covers the semiconductor layer and the pattern of extraction electrodes, wherein at least one of the stepsof the above steps (i) to (iv) is carried out by a printing method. With this manufacturing method, various layers can be formed by a simple printing process without using a vacuum process, photolithography, or the like.

摘要翻译： 一种制造柔性半导体器件的方法包括：（i）在树脂膜的上表面上形成绝缘膜，（ii）在树脂膜的上表面上形成提取电极的图案，（iii）形成半导体层 以使得半导体层与提取电极的图案接触的方式在绝缘膜上，以及（iv）在树脂膜的上表面上形成密封树脂层，使得密封树脂层覆盖 半导体层和提取电极的图案，其中通过印刷方法进行上述步骤（i）至（iv）中的步骤中的至少一个。 利用该制造方法，可以通过简单的印刷工艺形成各种层，而不使用真空工艺，光刻等。

公开(公告)号：US08343822B2

公开(公告)日：2013-01-01

申请号：US12681445

申请日：2009-07-30

申请人： Koichi Hirano ,  Seiichi Nakatani ,  Tatsuo Ogawa ,  Takashi Ichiryu ,  Takeshi Suzuki

发明人： Koichi Hirano ,  Seiichi Nakatani ,  Tatsuo Ogawa ,  Takashi Ichiryu ,  Takeshi Suzuki

IPC分类号： H01L21/84 ,  H01L21/00

CPC分类号： H01L29/78651 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1266 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78603 ,  H01L29/7869

摘要： A method for manufacturing a flexible semiconductor device includes (i) forming an insulating film on the upper surface of metal foil, (ii) forming an extraction electrode pattern on the upper surface of the metal foil, (iii) forming a semiconductor layer on the insulating film such that the semiconductor layer is in contact with the extraction electrode pattern, (iv) forming a sealing resin layer on the upper surface of the metal foil such that the sealing resin layer covers the semiconductor layer and the extraction electrode pattern, and (v) forming electrodes by etching the metal foil, the metal foil being used as a support for the insulating film, the extraction electrode pattern, the semiconductor layer, and the sealing resin layer formed in (i) to (iv) and used as a constituent material for the electrodes in (v). The metal foil need not be stripped, and a high-temperature process can be used.

摘要翻译： 一种制造柔性半导体器件的方法包括：（i）在金属箔的上表面上形成绝缘膜，（ii）在金属箔的上表面上形成引出电极图案，（iii）在金属箔的上表面上形成半导体层 绝缘膜，使得半导体层与引出电极图案接触，（iv）在金属箔的上表面上形成密封树脂层，使得密封树脂层覆盖半导体层和引出电极图案，和（ v）通过蚀刻金属箔形成电极，金属箔用作绝缘膜的支撑体，引出电极图案，半导体层和形成在（i）至（iv）中的密封树脂层，并用作 （v）中的电极的构成材料。 金属箔不需要剥离，可以使用高温工艺。

公开(公告)号：US07981528B2

公开(公告)日：2011-07-19

申请号：US11848407

申请日：2007-08-31

申请人： Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Ichiryu ,  Koichi Hirano

发明人： Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Ichiryu ,  Koichi Hirano

IPC分类号： B32B15/00

CPC分类号： G06K19/07749 ,  G06K19/07771 ,  Y10T428/24355 ,  Y10T428/32

摘要： A water-repelling layer is formed on a resin film, and a stripe pattern region is formed so as to be positioned within a surface region of the water-repelling layer and so as to be relatively hydrophilic with respect to water repellency of the water-repelling layer. A magnetic stripe pattern is formed of needle-shaped magnetic grains oriented and aggregated in the stripe pattern region. The needle-shaped magnetic grains are arranged in a desirable state in a predetermined stripe pattern, with a high magnetic permeability and a magnetic sheet with stripe-arranged magnetic grains that is thin and flexible is obtained.

摘要翻译： 在树脂膜上形成防水层，并且形成条纹图案区域，以便位于防水层的表面区域内，并且相对于水溶性防水层的防水性而相对亲水， 排斥层。 磁条图案由在条纹图案区域中定向和聚集的针状磁性颗粒形成。 针状磁性颗粒以预定的条纹图案被布置成期望的状态，具有高磁导率，并且获得薄且柔性的带状排列的磁性颗粒的磁性片。

公开(公告)号：US20110162578A1

公开(公告)日：2011-07-07

申请号：US13046151

申请日：2011-03-11

申请人： Koichi Hirano ,  Seiji Karashima ,  Takashi Ichiryu ,  Yoshihiro Tomita ,  Seiichi Nakatani

发明人： Koichi Hirano ,  Seiji Karashima ,  Takashi Ichiryu ,  Yoshihiro Tomita ,  Seiichi Nakatani

IPC分类号： H01L21/70 ,  B05C3/02 ,  B05C9/14 ,  B05C13/02 ,  B05C11/00 ,  B05C11/10 ,  H01L21/687

CPC分类号： H01L21/563 ,  B23K35/0244 ,  H01L21/67144 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1131 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/133 ,  H01L2224/16 ,  H01L2224/75 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83815 ,  H01L2224/83886 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/18161 ,  H01L2924/30105 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/1361 ,  Y02P70/613 ,  Y10T29/53178 ,  H01L2224/05599

摘要： [Problem] To provide a flip-chip mounting method and a bump formation method applicable to flip-chip mounting of a next generation LSI and having high productivity and high reliability.[Means for Solving Problem] A semiconductor chip 20 having a plurality of electrode terminals 12 is held to oppose a circuit board 21 having a plurality of connection terminals 11 with a given gap provided therebetween, and the semiconductor chip 20 and the circuit board 21 in this state are dipped in a dipping bath 40 containing a melted resin 14 including melted solder particles for a given period of time. In this dipping process, the melted solder particles self-assemble between the connection terminals 11 of the circuit board 21 and the electrode terminals 12 of the semiconductor chip 20, so as to form connectors 22 between these terminals. Thereafter, the semiconductor chip 20 and the circuit board 21 are taken out of the dipping bath 40, and the melted resin 14 having permeated into the gap between the semiconductor chip 20 and the circuit board 21 is cured, so as to complete a flip-chip mounting body.

摘要翻译： [问题]提供一种适用于下一代LSI的倒装安装并具有高生产率和高可靠性的倒装芯片安装方法和凸块形成方法。 解决问题的手段具有多个电极端子12的半导体芯片20被保持为具有多个连接端子11的电路板21，其间设置有给定的间隙，半导体芯片20和电路板21 将该状态浸渍在包含熔融的焊料颗粒的熔融树脂14的浸渍浴40中一段给定的时间。 在该浸渍过程中，熔融的焊料颗粒自组装在电路板21的连接端子11和半导体芯片20的电极端子12之间，从而在这些端子之间形成连接器22。 此后，半导体芯片20和电路板21从浸渍浴40中取出，并且已经渗透到半导体芯片20和电路板21之间的间隙中的熔融树脂14固化， 芯片安装体。

公开(公告)号：US20110121298A1

公开(公告)日：2011-05-26

申请号：US13054049

申请日：2010-02-05

申请人： Takashi Ichiryu ,  Seiichi Nakatani ,  Koichi Hirano

发明人： Takashi Ichiryu ,  Seiichi Nakatani ,  Koichi Hirano

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/78603 ,  H01L27/1218 ,  H01L27/1266 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78681 ,  H01L29/7869 ,  H01L2224/24195 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2924/3511 ,  H01L2924/3512

摘要： A method includes the steps of preparing a multilayer film 80 formed by sequentially stacking a first metal layer 10, an inorganic insulating layer 20, a semiconductor layer 30, and a second metal layer 40; forming a source electrode 42s and a drain electrode 42d comprised of the second metal layer 40 by etching the second metal layer 40; pressure-bonding a resin layer 50 onto a surface of the multilayer film 80 provided with the source electrode 42s and the drain electrode 42d to burry the source electrode 42s and the drain electrode 42d in the resin layer 50; and forming a gate electrode 10g comprised of the first metal layer 10 by etching the first metal layer 10. The inorganic insulating layer 20g functions as a gate insulating film. The semiconductor layer 30 functions as a channel.

摘要翻译： 一种方法包括制备通过顺序堆叠第一金属层10，无机绝缘层20，半导体层30和第二金属层40而形成的多层膜80的步骤; 通过蚀刻第二金属层40形成由第二金属层40构成的源电极42s和漏电极42d; 将树脂层50压接到设置有源电极42s和漏电极42d的多层膜80的表面，以将树脂层50中的源电极42s和漏电极42d嵌入; 以及通过蚀刻第一金属层10形成由第一金属层10构成的栅极电极10g。无机绝缘层20g用作栅极绝缘膜。 半导体层30用作沟道。

公开(公告)号：US20080128664A1

公开(公告)日：2008-06-05

申请号：US11793175

申请日：2005-12-14

申请人： Takashi Kitae ,  Seiji Karashima ,  Koichi Hirano ,  Toshiyuki Kojima ,  Seiichi Nakatani ,  Shingo Komatsu ,  Yoshihisa Yamashita

发明人： Takashi Kitae ,  Seiji Karashima ,  Koichi Hirano ,  Toshiyuki Kojima ,  Seiichi Nakatani ,  Shingo Komatsu ,  Yoshihisa Yamashita

IPC分类号： H01B1/02

CPC分类号： H05K3/323 ,  H01L21/6835 ,  H01L23/49838 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/11001 ,  H01L2224/11003 ,  H01L2224/1141 ,  H01L2224/11502 ,  H01L2224/11522 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/293 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29316 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/832 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/8388 ,  H01L2224/83886 ,  H01L2224/83887 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01061 ,  H01L2924/01065 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/083 ,  H05K2203/087 ,  Y02P70/613 ,  H01L2924/00011 ,  H01L2924/066 ,  H01L2924/06 ,  H01L2924/0695 ,  H01L2924/062 ,  H01L2924/0615 ,  H01L2924/068 ,  H01L2924/0705 ,  H01L2924/0675 ,  H01L2924/07001 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/00014

摘要： There is provided a flip-chip mounting resin composition which can be used for a flip-chip mounting process that is high in productivity and reliability and thus can be applicable to a flip-chip mounting of a next-generation LSI. This flip-chip mounting resin composition comprises a resin, metal particles and a convection additive 12 that boils upon heating the resin 13. Upon the heating of the resin 13, the metal particles melt and the boiling convection additive 12 convects within the resin 13. This flip-chip mounting resin composition is supplied between a circuit substrate 10 and a semiconductor chip 20, and subsequently the resin 13 is heated so that the molten metal particles self-assemble into the region between each electrode of the circuit substrate and each electrode of the semiconductor chip. As a result, an electrical connection is formed between each electrode of the circuit substrate and each electrode of the semiconductor chip. Finally, the resin 13 is allowed to cure so that the semiconductor chip 20 is secured to the circuit substrate 10, which leads to in a formation of a flip chip assembly.

摘要翻译： 提供了一种倒装芯片安装树脂组合物，其可用于生产率和可靠性高的倒装芯片安装工艺，因此可以应用于下一代LSI的倒装芯片安装。 这种倒装芯片安装树脂组合物包括在加热树脂13时沸腾的树脂，金属颗粒和对流添加剂12。 在加热树脂13时，金属颗粒熔化，沸腾对流添加剂12在树脂13内对流。 将该倒装芯片安装树脂组合物供给在电路基板10和半导体芯片20之间，随后加热树脂13，使得熔融金属颗粒自组装成电路基板的每个电极和电极的每个电极之间的区域 半导体芯片。 结果，在电路基板的每个电极和半导体芯片的每个电极之间形成电连接。 最后，使树脂13固化，使得半导体芯片20固定到电路基板10，这导致形成倒装芯片组件。

公开(公告)号：US07038310B1

公开(公告)日：2006-05-02

申请号：US09587768

申请日：2000-06-06

申请人： Seiichi Nakatani ,  Koichi Hirano ,  Mitsuhiro Matsuo ,  Hiroyuki Handa

发明人： Seiichi Nakatani ,  Koichi Hirano ,  Mitsuhiro Matsuo ,  Hiroyuki Handa

IPC分类号： H01L23/10 ,  H01L23/34

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/4951 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49575 ,  H01L23/5389 ,  H01L24/81 ,  H01L25/16 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/81801 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/0401

摘要： The invention provides a power module that is excellent in heat dissipation and suitable for the trend of miniaturization with high density, and provides also a method of manufacturing the same. The power module includes an insulating layer including an inorganic filler and a thermosetting resin composition, a lead formed on the surface of the insulating layer, and a semiconductor chip mounted on a insulating layer side of the lead, and a heat sink formed on the backside of the insulating layer. The semiconductor chip is mounted on the lead by flip-chip bonding and sealed in the insulating layer.

摘要翻译： 本发明提供一种功率模块，该功率模块具有优异的散热性，适合于高密度小型化的趋势，并且还提供了一种制造该功率模块的方法。 功率模块包括绝缘层，其包括无机填料和热固性树脂组合物，形成在绝缘层的表面上的引线和安装在引线的绝缘层侧的半导体芯片，以及形成在背面的散热片 的绝缘层。 半导体芯片通过倒装芯片接合安装在引线上并密封在绝缘层中。

公开(公告)号：US20060087020A1

公开(公告)日：2006-04-27

申请号：US11254379

申请日：2005-10-20

申请人： Koichi Hirano ,  Seiichi Nakatani ,  Tsukasa Shiraishi ,  Yoshitake Hayashi

发明人： Koichi Hirano ,  Seiichi Nakatani ,  Tsukasa Shiraishi ,  Yoshitake Hayashi

IPC分类号： H01L23/02

CPC分类号： H01L23/5389 ,  H01L21/563 ,  H01L23/3121 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/20752 ,  H01L2224/0401

摘要： In a semiconductor device, circuit boards are connected electrically to each other by via-conductors that penetrate sheet members, semiconductor elements arranged between substrates are contained in element-containing portions formed on the sheet members, and a low-elastic material whose elastic modulus is lower than the elastic modulus of the thermosetting resin composition of the sheet members is filled in the space between the semiconductor elements contained in the element-containing portions and the substrates opposing surfaces opposite to the mounting surfaces of the semiconductor elements. Thereby, a semiconductor device resistant to warping and deformation and having a high mounting reliability is provided.

摘要翻译： 在半导体装置中，电路板通过贯穿片状部件的通孔导体相互电连接，设置在基板之间的半导体元件容纳在形成在片状部件上的元件容纳部中，弹性模量为 低于片状部件的热固性树脂组合物的弹性模量填充在包含在元件容纳部分中的半导体元件与与半导体元件的安装表面相对的相对表面的基板之间的空间中。 因此，提供了耐翘曲变形并且具有高安装可靠性的半导体器件。