公开(公告)号：US10187031B2

公开(公告)日：2019-01-22

申请号：US15151351

申请日：2016-05-10

Applicant: QUALCOMM Incorporated

Inventor： Yunfei Ma ,  Chengjie Zuo ,  David Francis Berdy ,  Daeik Daniel Kim ,  Changhan Hobie Yun ,  Je-Hsiung Jeffrey Lan ,  Mario Francisco Velez ,  Niranjan Sunil Mudakatte ,  Robert Paul Mikulka ,  Jonghae Kim

IPC: H03H7/38 ,  H03H7/40 ,  H04B1/04

Abstract: A tunable matching network is disclosed. In a particular example, the matching network includes at least one first inductor in a signal path of the matching network. The matching network includes at least one second inductor outside of the signal path. The matching network includes one or more switches coupled to the at least one second inductor. The one or more switches are configured to selectively enable mutual coupling of the at least one first inductor and the at least one second inductor.

公开(公告)号：US20180316374A1

公开(公告)日：2018-11-01

申请号：US16029432

申请日：2018-07-06

Applicant: QUALCOMM Incorporated

Inventor： Changhan Yun ,  Chengjie Zuo ,  Mario Velez ,  Niranjan Sunil Mudakatte ,  Shiqun Gu ,  Jonghae Kim ,  David Berdy

IPC: H04B1/16 ,  H01L49/02 ,  H01L23/522 ,  H01L23/00 ,  H01L27/01 ,  H01L23/498 ,  H01L23/66 ,  H01L21/48 ,  H04B1/00

CPC classification number: H04B1/1638 ,  H01F17/0013 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5223 ,  H01L23/64 ,  H01L23/66 ,  H01L24/19 ,  H01L24/20 ,  H01L27/01 ,  H01L28/10 ,  H01L28/40 ,  H01L2223/6616 ,  H01L2223/6672 ,  H01L2223/6677 ,  H01L2223/6688 ,  H01L2224/04105 ,  H01L2224/24195 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/1421 ,  H01L2924/15153 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H04B1/006 ,  H05K1/165 ,  H05K1/185 ,  H05K3/4605 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/097 ,  H05K2201/09827

Abstract: In an illustrative example, an apparatus includes a passive-on-glass (POG) device integrated within a glass substrate. The apparatus further includes a semiconductor die integrated within the glass substrate.

公开(公告)号：US10074625B2

公开(公告)日：2018-09-11

申请号：US14859323

申请日：2015-09-20

Applicant: QUALCOMM Incorporated

Inventor： Mario Francisco Velez ,  David Francis Berdy ,  Changhan Hobie Yun ,  Jonghae Kim ,  Chengjie Zuo ,  Daeik Daniel Kim ,  Je-Hsiung Jeffrey Lan ,  Niranjan Sunil Mudakatte ,  Robert Paul Mikulka

IPC: H01L23/00 ,  H01L23/13 ,  H01L23/498

CPC classification number: H01L24/17 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/09 ,  H01L24/11 ,  H01L2224/023 ,  H01L2224/0905

Abstract: An integrated circuit device in a wafer level package (WLP) includes ball grid array (BGA) balls fabricated with cavities filled with adhesives for improved solder joint reliability.

公开(公告)号：US10069474B2

公开(公告)日：2018-09-04

申请号：US15137662

申请日：2016-04-25

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Chengjie Zuo ,  Daeik Daniel Kim ,  Mario Francisco Velez ,  Niranjan Sunil Mudakatte ,  Je-Hsiung Jeffrey Lan ,  David Francis Berdy ,  Yunfei Ma ,  Robert Paul Mikulka ,  Jonghae Kim

IPC: H03H9/05 ,  H03H9/10 ,  H03H9/15 ,  H03H3/02 ,  H01F17/02 ,  H05K1/18 ,  H03H9/54 ,  H05K3/46 ,  H05K1/03 ,  H05K3/00 ,  H03H3/08 ,  H03H9/64 ,  H01F17/00 ,  H03H7/01 ,  H03H7/46

Abstract: A device includes an acoustic resonator embedded within an encapsulating structure that at least partially encapsulates the acoustic resonator. The device includes an inductor electrically connected to the acoustic resonator. At least a portion of the inductor is embedded in the encapsulating structure.

公开(公告)号：US10026546B2

公开(公告)日：2018-07-17

申请号：US15160776

申请日：2016-05-20

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Chengjie Zuo ,  Daeik Daniel Kim ,  Mario Francisco Velez ,  Niranjan Sunil Mudakatte ,  Jonghae Kim ,  David Francis Berdy

IPC: H03H7/46 ,  H01F27/40 ,  H01F27/28 ,  H01F27/29 ,  H01F41/02 ,  H03H7/01

Abstract: An apparatus includes a substrate and a three-dimensional (3D) wirewound inductor integrated within the substrate. The apparatus further includes a capacitor coupled to the 3D wirewound inductor.

公开(公告)号：US20170365570A1

公开(公告)日：2017-12-21

申请号：US15184841

申请日：2016-06-16

Applicant: QUALCOMM Incorporated

Inventor： Daeik Kim ,  Chengjie Zuo ,  Mario Velez ,  Changhan Yun ,  Jonghae Kim

IPC: H01L23/00 ,  H01L21/78 ,  H01L21/48 ,  H01L21/683

CPC classification number: H01L21/6836 ,  H01L21/4846 ,  H01L21/78 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/05647 ,  H01L2224/32265 ,  H01L2224/94 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19102 ,  H01L2224/83 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00014

Abstract: Some implementations provide a device that includes a passive component and a substrate coupled to the passive component, where a surface of the substrate comprises a first irradiated portion. In some implementations, the first irradiated portion is located in an offset portion of the substrate. Some implementations provide an integrated device that includes a device layer and a substrate coupled to the device layer, where a surface of the substrate comprises a first irradiated portion. In some implementations, the first irradiated portion is located in an offset portion of the substrate.

公开(公告)号：US20170279469A1

公开(公告)日：2017-09-28

申请号：US15080472

申请日：2016-03-24

Applicant: QUALCOMM Incorporated

Inventor： Yunfei Ma ,  Chengjie Zuo ,  David Berdy ,  Daeik Kim ,  Changhan Yun ,  Je-Hsiung Lan ,  Mario Velez ,  Niranjan Sunil Mudakatte ,  Robert Mikulka ,  Jonghae Kim

IPC: H04B1/00 ,  H04B1/40 ,  H04L5/14 ,  H04B1/04 ,  H04B1/3827

CPC classification number: H04B1/0057 ,  H03H7/09 ,  H03H7/463 ,  H04B1/04 ,  H04B1/3827 ,  H04B1/40 ,  H04B2001/0416 ,  H04L5/14

Abstract: An RF diplexer is provided with an integrated diplexer that shares a primary inductor included in a channel within the RF diplexer.

公开(公告)号：US09692386B2

公开(公告)日：2017-06-27

申请号：US14177620

申请日：2014-02-11

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Zuo ,  Mario Francisco Velez ,  Jonghae Kim ,  Daeik Daniel Kim ,  Changhan Hobie Yun

IPC: H03H7/01 ,  H01F27/28 ,  H01L23/522

CPC classification number: H03H7/0115 ,  H01F27/2866 ,  H01L23/5223 ,  H01L23/5227 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48464 ,  Y10T29/417 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An inductor is provided on a substrate that includes a capacitor. The inductor comprises a series of wire loops. An end of the wire loop is wire bonded to the capacitor.

公开(公告)号：US09468098B2

公开(公告)日：2016-10-11

申请号：US14220913

申请日：2014-03-20

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  Jonghae Kim ,  Chengjie Zuo ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Robert Paul Mikulka

IPC: H01L23/538 ,  H05K1/11 ,  H05K1/03 ,  H05K1/18 ,  H05K3/30 ,  H05K3/40 ,  H01L23/48 ,  H01L23/64 ,  H05K1/02 ,  H05K3/36 ,  H05K1/14 ,  H05K1/16 ,  H05K3/34

CPC classification number: H05K3/303 ,  H01L23/48 ,  H01L23/5385 ,  H01L23/645 ,  H01L2924/0002 ,  H01L2924/19101 ,  H05K1/0243 ,  H05K1/0306 ,  H05K1/111 ,  H05K1/141 ,  H05K1/144 ,  H05K1/165 ,  H05K1/18 ,  H05K3/3436 ,  H05K3/368 ,  H05K3/4007 ,  H05K3/4015 ,  H05K2201/1003 ,  H05K2201/10477 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2203/041 ,  H05K2203/1316 ,  Y10T29/4902 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  H01L2924/00

Abstract: Systems and methods relate to a semiconductor package comprising a first substrate or a 2D passive-on-glass (POG) structure with a passive component and a first set of one or more package pads formed on a face of a glass substrate. The semiconductor package also includes a second or laminate substrate with a second set of one or more package pads formed on a face of the second or laminate substrate. Solder balls are dropped, configured to contact the first set of one or more package pads with the second set of one or more package pads, wherein the first substrate or the 2D POG structure is placed face-up on the face of the second or laminate substrate. A printed circuit board (PCB) can be coupled to a bottom side of the second or laminate substrate.

Abstract translation: 系统和方法涉及包括第一衬底或2D无源玻璃（POG）结构的半导体封装，其具有无源部件和形成在玻璃衬底的表面上的一个或多个封装焊盘的第一组。 半导体封装还包括具有第二组一个或多个封装焊盘的第二或层压衬底，其形成在第二层压衬底的表面上。 焊球被落下，被配置为使第一组一个或多个封装焊盘与第二组一个或多个封装焊盘接触，其中第一基板或2D POG结构朝上放置在第二或层压板的表面上 基质。 印刷电路板（PCB）可以耦合到第二或层压基板的底侧。

公开(公告)号：US09401689B2

公开(公告)日：2016-07-26

申请号：US13887568

申请日：2013-05-06

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Zuo ,  Daeik D. Kim ,  Je-Hsiung Lan ,  Jonghae Kim ,  Mario Francisco Velez ,  Changhan Yun ,  David F. Berdy ,  Robert P. Mikulka ,  Matthew M. Nowak ,  Xiangdong Zhang ,  Puay H. See

IPC: H03H7/46

Abstract: Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) are disclosed. In one embodiment, the tunable diplexer may be formed by providing one of either a varactor or a variable inductor in the diplexer. The variable nature of the varactor or the variable inductor allows a notch in the diplexer to be tuned so as to select a band stop to eliminate harmonics at a desired frequency as well as control the cutoff frequency of the pass band. By stacking the elements of the diplexer into three dimensions, space is conserved and a variety of varactors and inductors are able to be used.