公开(公告)号：US06730533B2

公开(公告)日：2004-05-04

申请号：US10387862

申请日：2003-03-14

申请人： Kevin Matthew Durocher ,  Ernest Wayne Balch ,  Vikram B. Krishnamurthy ,  Richard Joseph Saia ,  Herbert Stanley Cole ,  Ronald Frank Kolc

发明人： Kevin Matthew Durocher ,  Ernest Wayne Balch ,  Vikram B. Krishnamurthy ,  Richard Joseph Saia ,  Herbert Stanley Cole ,  Ronald Frank Kolc

IPC分类号： H01L2100

CPC分类号： H01L23/13 ,  H01L23/3677 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/97 ,  H01L33/46 ,  H01L33/62 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  Y10S362/80 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： There is provided a flexible circuit module, including at least one rigid carrier, at least one solid state device mounted over a first side of the at least one rigid carrier, a flexible base supporting a second side of the at least one rigid carrier, a conductive interconnect pattern on the flexible base, and a plurality of feed through electrodes extending from the first side to the second side of the at least one rigid carrier and electrically connecting the conductive interconnect pattern with the at least one of a plurality of the solid state devices. The solid state devices may be LED chips to form an LED array module.

公开(公告)号：US06323096B1

公开(公告)日：2001-11-27

申请号：US09162800

申请日：1998-09-29

申请人： Richard Joseph Saia ,  Kevin Matthew Durocher ,  Herbert Stanley Cole

发明人： Richard Joseph Saia ,  Kevin Matthew Durocher ,  Herbert Stanley Cole

IPC分类号： H01L2170

CPC分类号： H01L23/5389 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/5385 ,  H01L24/19 ,  H01L24/82 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/162 ,  H05K1/167 ,  H05K3/388 ,  H05K3/4076 ,  H05K3/426 ,  H05K3/4644 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2203/0315 ,  H05K2203/0361 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method for fabricating a flexible interconnect film includes applying a resistor layer over one or both surfaces of a dielectric film; applying a metallization layer over the resistor layer with the resistor layer including a material facilitating adhesion of the dielectric film and the metallization layer; applying a capacitor dielectric layer over the metallization layer; and applying a capacitor electrode layer over the capacitor dielectric layer. The capacitor electrode layer is patterned to form a first capacitor electrode; the capacitor dielectric layer is patterned; the metallization layer is patterned to form a resistor; and the metallization layer and the resistor layer are patterned to form an inductor and a second capacitor electrode. In one embodiment, the dielectric film includes a polyimide, the resistor layer includes tantalum nitride, and the capacitor dielectric layer includes amorphous hydrogenated carbon or tantalum oxide. If the resistor and metallization layers are applied over both surfaces of the dielectric film, passive components can be fabricated on both surfaces of the dielectric film. The dielectric film can have vias therein with the resistor and metallization layers extending through the vias. A circuit chip can be attached and coupled to the passive components by metallization patterned through vias in an additional dielectric layer.

摘要翻译： 制造柔性互连膜的方法包括在电介质膜的一个或两个表面上施加电阻层; 在所述电阻层上施加金属化层，所述电阻层包括促进所述电介质膜和所述金属化层的粘附的材料; 在所述金属化层上施加电容器电介质层; 以及在电容器电介质层上施加电容器电极层。 将电容器电极层图案化以形成第一电容器电极; 对电容器电介质层进行图案化; 图案化金属化层以形成电阻器; 并且金属化层和电阻层被图案化以形成电感器和第二电容器电极。 在一个实施例中，电介质膜包括聚酰亚胺，电阻层包括氮化钽，电容器介电层包括无定形氢化碳或氧化钽。 如果将电阻和金属化层施加在电介质膜的两个表面上，则可以在电介质膜的两个表面上制造无源元件。 电介质膜可以具有通孔，其中电阻器和金属化层延伸穿过通孔。 电路芯片可以通过在附加电介质层中通过通孔图案化的金属化而附接并耦合到无源部件。

公开(公告)号：US06733711B2

公开(公告)日：2004-05-11

申请号：US10387835

申请日：2003-03-14

申请人： Kevin Matthew Durocher ,  Ernest Wayne Balch ,  Vikram B. Krishnamurthy ,  Richard Joseph Saia ,  Herbert Stanley Cole ,  Ronald Frank Kolc

发明人： Kevin Matthew Durocher ,  Ernest Wayne Balch ,  Vikram B. Krishnamurthy ,  Richard Joseph Saia ,  Herbert Stanley Cole ,  Ronald Frank Kolc

IPC分类号： B29C4514

CPC分类号： H01L23/13 ,  H01L23/3677 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/97 ,  H01L33/46 ,  H01L33/62 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  Y10S362/80 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： There is provided a flexible circuit module, including at least one rigid carrier, at least one solid state device mounted over a first side of the at least one rigid carrier, a flexible base supporting a second side of the at least one rigid carrier, a conductive interconnect pattern on the flexible base, and a plurality of feed through electrodes extending from the first side to the second side of the at least one rigid carrier and electrically connecting the conductive interconnect pattern with the at least one of a plurality of the solid state devices. The solid state devices may be LED chips to form an LED array module.

摘要翻译： 提供了一种柔性电路模块，包括至少一个刚性载体，安装在至少一个刚性载体的第一侧上的至少一个固态装置，支撑至少一个刚性载体的第二侧的柔性基座， 导电互连图案，以及多个馈通电极，其从所述至少一个刚性载体的第一侧延伸到第二侧，并将导电互连图案与多个固态中的至少一个电连接 设备。 固态器件可以是LED芯片以形成LED阵列模块。

公开(公告)号：US06614103B1

公开(公告)日：2003-09-02

申请号：US09654163

申请日：2000-09-01

申请人： Kevin Matthew Durocher ,  Ernest Wayne Balch ,  Vikram B. Krishnamurthy ,  Richard Joseph Saia ,  Herbert Stanley Cole ,  Ronald Frank Kolc

发明人： Kevin Matthew Durocher ,  Ernest Wayne Balch ,  Vikram B. Krishnamurthy ,  Richard Joseph Saia ,  Herbert Stanley Cole ,  Ronald Frank Kolc

IPC分类号： B60Q100

CPC分类号： H01L23/13 ,  H01L23/3677 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/97 ,  H01L33/46 ,  H01L33/62 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  Y10S362/80 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： There is provided a flexible circuit module, including at least one rigid carrier, at least one solid state device mounted over a first side of the at least one rigid carrier, a flexible base supporting a second side of the at least one rigid carrier, a conductive interconnect pattern on the flexible base, and a plurality of feed through electrodes extending from the first side to the second side of the at least one rigid carrier and electrically connecting the conductive interconnect pattern with the at least one of a plurality of the solid state devices. The solid state devices may be LED chips to form an LED array module.

公开(公告)号：US5874770A

公开(公告)日：1999-02-23

申请号：US731172

申请日：1996-10-10

申请人： Richard Joseph Saia ,  Kevin Matthew Durocher ,  Herbert Stanley Cole

发明人： Richard Joseph Saia ,  Kevin Matthew Durocher ,  Herbert Stanley Cole

IPC分类号： H05K3/46 ,  H01L21/48 ,  H01L21/822 ,  H01L21/98 ,  H01L23/498 ,  H01L23/538 ,  H01L25/16 ,  H01L27/04 ,  H05K1/16 ,  H05K3/38 ,  H05K3/40 ,  H05K3/42 ,  H01L23/053 ,  H01L23/02 ,  H01L23/48

CPC分类号： H01L23/5389 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/5385 ,  H01L24/18 ,  H01L24/82 ,  H01L25/16 ,  H01L25/50 ,  H05K1/162 ,  H05K1/167 ,  H01L2224/18 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2203/0315 ,  H05K2203/0361 ,  H05K3/388 ,  H05K3/4076 ,  H05K3/426 ,  H05K3/4644 ,  Y10T29/49165

摘要： A method for fabricating a flexible interconnect film includes applying a resistor layer over one or both surfaces of a dielectric film; applying a metallization layer over the resistor layer with the resistor layer including a material facilitating adhesion of the dielectric film and the metallization layer; applying a capacitor dielectric layer over the metallization layer; and applying a capacitor electrode layer over the capacitor dielectric layer. The capacitor electrode layer is patterned to form a first capacitor electrode; the capacitor dielectric layer is patterned; the metallization layer is patterned to form a resistor; and the metallization layer and the resistor layer are patterned to form an inductor and a second capacitor electrode. In one embodiment, the dielectric film includes a polyimide, the resistor layer includes tantalum nitride, and the capacitor dielectric layer includes amorphous hydrogenated carbon or tantalum oxide. If the resistor and metallization layers are applied over both surfaces of the dielectric film, passive components can be fabricated on both surfaces of the dielectric film. The dielectric film can have vias therein with the resistor and metallization layers extending through the vias. A circuit chip can be attached and coupled to the passive components by metallization patterned through vias in an additional dielectric layer.

摘要翻译： 制造柔性互连膜的方法包括在电介质膜的一个或两个表面上施加电阻层; 在所述电阻层上施加金属化层，所述电阻层包括促进所述电介质膜和所述金属化层的粘附的材料; 在所述金属化层上施加电容器电介质层; 以及在电容器电介质层上施加电容器电极层。 将电容器电极层图案化以形成第一电容器电极; 对电容器电介质层进行图案化; 图案化金属化层以形成电阻器; 并且金属化层和电阻层被图案化以形成电感器和第二电容器电极。 在一个实施例中，电介质膜包括聚酰亚胺，电阻层包括氮化钽，电容器介电层包括无定形氢化碳或氧化钽。 如果将电阻和金属化层施加在电介质膜的两个表面上，则可以在电介质膜的两个表面上制造无源元件。 电介质膜可以具有通孔，其中电阻器和金属化层延伸穿过通孔。 电路芯片可以通过在附加电介质层中通过通孔图案化的金属化而附接并耦合到无源部件。

公开(公告)号：US06770885B2

公开(公告)日：2004-08-03

申请号：US09682389

申请日：2001-08-29

申请人： Jeffrey Wayne Eberhard ,  Herbert Stanley Cole ,  Robert Forrest Kwasnick ,  Theresa Ann Sitnik-Nieters

发明人： Jeffrey Wayne Eberhard ,  Herbert Stanley Cole ,  Robert Forrest Kwasnick ,  Theresa Ann Sitnik-Nieters

IPC分类号： G01T120

CPC分类号： G01T1/2002 ,  G01T1/1642 ,  G01T1/2018 ,  Y10T156/10

摘要： A radiation imaging system comprising a scintillator, an imager array, and a lamination layer. Lamination layer bonds and optically couples scintillator to imager array. Lamination layer is comprised of a lamination material that is substantially free from void spaces. Radiation imaging system fabrication comprises the steps of disposing lamination layer between a light imager and a scintillator to form a subassembly. Light imager comprises imager array, an imaging plate surface and a plurality of contact pads. Additional steps include subjecting subassembly to a vacuum; heating subassembly to a bonding temperature, exerting a bonding force on subassembly, maintaining the vacuum, the bonding temperature and the bonding force until light imager is bonded to the scintillator and the lamination layer is comprised of lamination material that is substantially free from void spaces.

摘要翻译： 一种包括闪烁体，成像器阵列和层叠层的辐射成像系统。 复合层结合并将闪烁体光学耦合到成像器阵列。 层压层由基本上没有空隙的层压材料组成。 辐射成像系统制造包括在光成像仪和闪烁体之间设置层压层以形成子组件的步骤。 光成像仪包括成像器阵列，成像板表面和多个接触焊盘。 附加步骤包括使组件进行真空; 加热组件到接合温度，在组件上施加接合力，保持真空，接合温度和接合力，直到光成像仪结合到闪烁体，并且层压层由基本上没有空隙的层压材料构成。

公开(公告)号：US06548189B1

公开(公告)日：2003-04-15

申请号：US09682871

申请日：2001-10-26

申请人： Somasundaram Gunasekaran ,  Thomas Bert Gorczyca ,  Herbert Stanley Cole

发明人： Somasundaram Gunasekaran ,  Thomas Bert Gorczyca ,  Herbert Stanley Cole

IPC分类号： B32B1508

CPC分类号： C08G59/027 ,  B32B15/08 ,  C08G59/4215 ,  C09J163/00 ,  H01L23/3114 ,  H01L23/4334 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/15787 ,  Y10T428/12528 ,  Y10T428/12569 ,  Y10T428/31515 ,  H01L2924/00 ,  H01L2924/3512

摘要： In the present invention an adhesive composition is provided. The adhesive composition includes epoxidized cashew nutshell liquid, a catalyst, and diglycidyl ether of bisphenol A. The invention may further include at least one additive selected from the group including curing agents, bonding enhancers, hardeners, flexibilizers, tackifiers, and mixtures thereof.

摘要翻译： 在本发明中，提供了粘合剂组合物。 粘合剂组合物包括环氧化腰果壳液体，催化剂和双酚A的二缩水甘油醚。本发明还可包括至少一种选自包括固化剂，粘合增强剂，硬化剂，增韧剂，增粘剂及其混合物的添加剂。

公开(公告)号：US06191681B1

公开(公告)日：2001-02-20

申请号：US08896874

申请日：1997-07-21

申请人： Herbert Stanley Cole ,  Theresa Ann Sitnik-Nieters ,  Anil Raj Duggal

发明人： Herbert Stanley Cole ,  Theresa Ann Sitnik-Nieters ,  Anil Raj Duggal

IPC分类号： H01C710

CPC分类号： H01C7/027 ,  Y10T29/49082

摘要： A current limiting device utilizes an electrically conductive composite material and an inhomogeneous distribution of resistance structure. The electrically conductive composite material comprises an organic binder portion comprising a high Tg epoxy and a low viscosity polyglycol epoxy; at least one epoxy curing agent; and a conductive powder.

摘要翻译： 限流装置利用导电复合材料和电阻结构的不均匀分布。 导电复合材料包括包含高Tg环氧树脂和低粘度聚乙二醇环氧树脂的有机粘合剂部分; 至少一种环氧固化剂; 和导电粉末。

公开(公告)号：US5897728A

公开(公告)日：1999-04-27

申请号：US759691

申请日：1991-09-06

申请人： Herbert Stanley Cole ,  James Wilson Rose ,  Robert John Wojnarowski ,  Charles William Eichelberger

发明人： Herbert Stanley Cole ,  James Wilson Rose ,  Robert John Wojnarowski ,  Charles William Eichelberger

IPC分类号： G01R31/30 ,  G01R1/04 ,  G01R31/00 ,  G01R31/28 ,  H01L21/60 ,  H01L21/66 ,  H01L23/538 ,  H01L23/58 ,  B32B32/00

CPC分类号： G01R1/04 ,  G01R31/2863 ,  H01L22/32 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/4823 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/85205 ,  H01L24/45 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15312 ,  H01L2924/15787 ,  H01L2924/30105

摘要： For fully testing and burning-in an integrated circuit chip before it is incorporated into a high density interconnect or other standard hybrid bare chip circuit, a temporary test substrate having pins extending therethrough holds the chip within a cavity. Chip pads are electrically connected with the pins to create a package that can be tested using commercially available testing and burn-in devices. After testing, the chip is retrieved from the test structure undamaged. In using HDI techniques to interconnect the chip with the pins, metal-filled vias in a polymer layer overlying the temporary test substrate electrically connect the chip to the pins through a metal interconnect pattern on the polymer layer. In another embodiment, the chip is interconnected with the pins through wire bonds. Metal-filled vias pass through an insulative coating on the chip and make electrical contact with the chip pad. A temporary buffer pad connected to a respective via and offset from the chip pad connected to that via comprises a wire-bonding site.

摘要翻译： 为了在将集成电路芯片并入高密度互连或其他标准混合裸芯片电路之前对其进行完全测试和烧录，具有延伸穿过的引脚的临时测试基板将芯片保持在空腔内。 芯片焊盘与引脚电连接以产生可以使用市售测试和老化设备进行测试的封装。 测试后，芯片从测试结构中检索到无损坏。 在使用HDI技术将芯片与引脚互连时，覆盖临时测试基板的聚合物层中的金属填充的通孔通过聚合物层上的金属互连图案将芯片电连接到引脚。 在另一个实施例中，芯片通过引线键与引脚互连。 金属填充的通孔穿过芯片上的绝缘涂层，并与芯片焊盘电接触。 连接到相应通孔并与连接到该通孔的芯片焊盘偏移的临时缓冲垫包括引线接合部位。

公开(公告)号：US06362722B1

公开(公告)日：2002-03-26

申请号：US09709880

申请日：2000-11-13

申请人： Herbert Stanley Cole ,  Theresa Ann Sitnik-Nieters ,  Anil Raj Duggal

发明人： Herbert Stanley Cole ,  Theresa Ann Sitnik-Nieters ,  Anil Raj Duggal

IPC分类号： H01C710

CPC分类号： H01C7/027 ,  Y10T29/49082

摘要： A current limiting device utilizes an electrically conductive composite material and an inhomogeneous distribution of resistance structure. The electrically conductive composite material comprises an organic binder portion comprising a high Tg epoxy and a low viscosity polyglycol epoxy; at least one epoxy curing agent; and a conductive powder.

摘要翻译： 限流装置利用导电复合材料和电阻结构的不均匀分布。 导电复合材料包括包含高Tg环氧树脂和低粘度聚乙二醇环氧树脂的有机粘合剂部分; 至少一种环氧固化剂; 和导电粉末。