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    Rigid-flexible circuit board and method of manufacturing the same
    4.
    发明授权
    Rigid-flexible circuit board and method of manufacturing the same 失效
    刚性柔性电路板及其制造方法

    公开(公告)号：US08198543B2

    公开(公告)日：2012-06-12

    申请号：US12618726

    申请日：2009-11-14

    申请人： Jung Eun Kang ,  Seog Moon Choi ,  Tae Hoon Kim ,  Young Ki Lee ,  Hye Sook Shin ,  Chang Hyun Lim

    发明人： Jung Eun Kang ,  Seog Moon Choi ,  Tae Hoon Kim ,  Young Ki Lee ,  Hye Sook Shin ,  Chang Hyun Lim

    IPC分类号： H05K1/00

    CPC分类号： H05K3/4641 ,  H05K1/0203 ,  H05K1/053 ,  H05K1/189 ,  H05K3/462 ,  H05K3/4691 ,  H05K2203/0315 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

    摘要： Disclosed is a rigid-flexible circuit board, which includes a rigid region and a flexible region, the rigid region including a flexible substrate having a first circuit layer on both surfaces thereof, a metal core substrate formed on the flexible substrate and having a second circuit layer on both surfaces thereof, and an adhesive layer disposed between the flexible substrate and the metal core substrate, wherein the metal core substrate includes a metal core having a through hole, and an insulating layer formed on a surface of the metal core, so that the rigid region and the flexible region are thermally separated from each other and heat dissipation properties of the rigid region are improved. A method of manufacturing the rigid-flexible circuit board is also provided.

    摘要翻译： 公开了一种刚性柔性电路板，其包括刚性区域和柔性区域，所述刚性区域包括在其两个表面上具有第一电路层的柔性基板，形成在柔性基板上的金属芯基板，并具有第二电路 并且设置在柔性基板和金属芯基板之间的粘合层，其中金属芯基板包括具有通孔的金属芯和形成在金属芯的表面上的绝缘层，使得 刚性区域和柔性区域彼此热分离，改善了刚性区域的散热性能。 还提供了制造刚性柔性电路板的方法。

    Wafer level package and wafer level packaging method
    5.
    发明申请
    Wafer level package and wafer level packaging method 审中-公开
    晶圆级封装和晶圆级封装方法

    公开(公告)号：US20080283989A1

    公开(公告)日：2008-11-20

    申请号：US12153373

    申请日：2008-05-16

    申请人： Won Kyu Jeung ,  Seog Moon Choi ,  Job Ha ,  Sang Hee Park ,  Tae Hoon Kim

    发明人： Won Kyu Jeung ,  Seog Moon Choi ,  Job Ha ,  Sang Hee Park ,  Tae Hoon Kim

    IPC分类号： H01L23/055 ,  H01L21/54

    CPC分类号： H01L23/26 ,  H01L23/055 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Provided are a wafer level package and a wafer level packaging method, which are capable of performing an attaching process at a low temperature and preventing contamination of internal devices. In the wafer level package, a device substrate includes a device region, where a device is formed, and internal pads on the top surface. The internal pads are electrically connected to the device. A cap substrate includes a getter corresponding to the device on the bottom surface. A plurality of sealing/attaching members are provided between the device substrate and the cap substrate to attach the device substrate and the cap substrate and seal the device region and the getter. The sealing/attaching members are formed of polymer. A plurality of vias penetrate the cap substrate and are connected to the internal pads. The getter provided in the sealed space defined by the sealing/attaching members can prevent the devices of the device region from being contaminated by moisture or foreign particles generated during the fabrication process, and the sealing/attaching process can be performed at a lower temperature compared with a typical sealing/attaching process using a metal.

    摘要翻译： 提供了能够在低温下执行附着处理并防止内部装置的污染的晶片级封装和晶片级封装方法。 在晶片级封装中，器件衬底包括其中形成器件的器件区域和顶表面上的内部焊盘。 内部焊盘电连接到设备。 盖基板包括对应于底表面上的装置的吸气剂。 在装置基板和盖基板之间设置多个密​​封/附接构件，以附接装置基板和盖基板，并密封装置区域和吸气剂。 密封/附接构件由聚合物形成。 多个通孔穿过盖基板并连接到内部焊盘。 设置在由密封/附接构件限定的密封空间中的吸气剂可以防止装置区域的装置被制造过程中产生的湿气或异物污染，并且密封/附着过程可以在较低的温度下进行比较 具有典型的使用金属的密封/附着工艺。

    SEMICONDUCTOR PACKAGE
    6.
    发明申请
    SEMICONDUCTOR PACKAGE 有权
    半导体封装

    公开(公告)号：US20130154070A1

    公开(公告)日：2013-06-20

    申请号：US13584743

    申请日：2012-08-13

    申请人： Tae Hoon Kim ,  Seog Moon Choi

    发明人： Tae Hoon Kim ,  Seog Moon Choi

    IPC分类号： H01L23/495

    CPC分类号： H01L23/3107 ,  H01L21/563 ,  H01L23/4334 ,  H01L23/49537 ,  H01L23/49575 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Disclosed herein is a semiconductor package. The semiconductor package includes: semiconductor elements, a first heat dissipation substrate formed under the semiconductor elements, a first lead frame electrically connecting the lower portions of the semiconductor elements to an upper portion of the first heat dissipation substrate, a second heat dissipation substrate formed over the semiconductor elements, and a second lead frame having a protrusion formed to be protruded from a lower surface thereof and electrically connecting the upper portions of the semiconductor elements to a lower portion of the second heat dissipation substrate.

    摘要翻译： 这里公开了半导体封装。 半导体封装包括：半导体元件，形成在半导体元件下的第一散热基板，将半导体元件的下部电连接到第一散热基板的上部的第一引线框架，形成在第一散热基板上的第二散热基板 所述半导体元件和具有突起的第二引线框架，所述突起形成为从其下表面突出并将所述半导体元件的上部电连接到所述第二散热基板的下部。

    3D POWER MODULE PACKAGE
    7.
    发明申请
    3D POWER MODULE PACKAGE 有权
    3D电源模块封装

    公开(公告)号：US20120162931A1

    公开(公告)日：2012-06-28

    申请号：US13177270

    申请日：2011-07-06

    申请人： Tae Hoon Kim ,  Jae Cheon Doh ,  Seog Moon Choi

    发明人： Tae Hoon Kim ,  Jae Cheon Doh ,  Seog Moon Choi

    IPC分类号： H05K7/00

    CPC分类号： H01L23/3121 ,  H01L23/4334 ,  H01L23/49531 ,  H01L23/49575 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Disclosed herein is a 3D power module package, including: a power converting unit packaged to include a heat radiating substrate, a power device connected to the heat radiating substrate, and a lead frame; a controlling unit packaged to include a controlling unit substrate and IC and controlling devices mounted on an upper portion of the controlling unit substrate; and an electrical connecting unit electrically connecting the packaged power converting unit and the packaged controlling unit.

    摘要翻译： 本文公开了一种3D功率模块封装，包括：封装成包括散热基板的功率转换单元，连接到散热基板的功率器件和引线框架; 控制单元，其被封装成包括控制单元基板和IC以及安装在所述控制单元基板的上部的控制装置; 以及电连接单元，电连接所述封装的电力转换单元和所述封装的控制单元。

    Wafer level device package with sealing line having electroconductive pattern and method of packaging the same
    9.
    发明授权
    Wafer level device package with sealing line having electroconductive pattern and method of packaging the same 有权
    具有导电图案的密封线的晶片级器件封装及其封装方法

    公开(公告)号：US07911043B2

    公开(公告)日：2011-03-22

    申请号：US12153705

    申请日：2008-05-22

    申请人： Ju Pyo Hong ,  Seog Moon Choi ,  Tae Hoon Kim ,  Job Ha ,  Seung Wook Park

    发明人： Ju Pyo Hong ,  Seog Moon Choi ,  Tae Hoon Kim ,  Job Ha ,  Seung Wook Park

    IPC分类号： H01L23/02

    CPC分类号： H01L21/50 ,  B81B2207/093 ,  B81C1/00301 ,  B81C2203/0118 ,  B81C2203/019 ,  H01L23/10 ,  H01L23/3114 ,  H01L2924/0002 ,  H01L2924/16195 ,  H01L2924/16235 ,  H03H9/1057 ,  H03H9/1071 ,  H01L2924/00

    摘要： Provided are wafer level package with a sealing line that seals a device and includes electroconductive patterns as an electrical connection structure for the device, and a method of packaging the same. In the wafer level package, a device substrate includes a device region, where a device is mounted, on the top surface. A sealing line includes a plurality of non-electroconductive patterns and a plurality of electroconductive patterns, and seals the device region. A cap substrate includes a plurality of vias respectively connected to the electroconductive patterns and is attached to the device substrate by the sealing line. Therefore, a simplified wafer level package structure that accomplishes electric connection through electroconductive patterns of a sealing line can be formed without providing an electrode pad for electric connection with a device.

    摘要翻译： 提供了具有密封设备并且包括作为设备的电连接结构的导电图案的密封线的晶片级封装以及其封装方法。 在晶片级封装中，器件衬底包括在顶表面上安装器件的器件区域。 密封线包括多个非导电图案和多个导电图案，并且密封该装置区域。 盖基板包括分别连接到导电图案的多个通孔，并通过密封线附接到器件基板。 因此，可以形成通过密封线的导电图案实现电连接的简化的晶片级封装结构，而不需要提供用于与器件电连接的电极焊盘。

    3D power module package
    10.
    发明授权
    3D power module package 有权
    3D电源模块封装

    公开(公告)号：US08842438B2

    公开(公告)日：2014-09-23

    申请号：US13177270

    申请日：2011-07-06

    申请人： Tae Hoon Kim ,  Jae Cheon Doh ,  Seog Moon Choi

    发明人： Tae Hoon Kim ,  Jae Cheon Doh ,  Seog Moon Choi

    IPC分类号： H05K7/00 ,  H01L23/34 ,  H01L23/31 ,  H01L23/495 ,  H01L23/433 ,  H01L25/16

    CPC分类号： H01L23/3121 ,  H01L23/4334 ,  H01L23/49531 ,  H01L23/49575 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Disclosed herein is a 3D power module package, including: a power converting unit packaged to include a heat radiating substrate, a power device connected to the heat radiating substrate, and a lead frame; a controlling unit packaged to include a controlling unit substrate and IC and controlling devices mounted on an upper portion of the controlling unit substrate; and an electrical connecting unit electrically connecting the packaged power converting unit and the packaged controlling unit.

    摘要翻译： 本文公开了一种3D功率模块封装，包括：封装成包括散热基板的功率转换单元，连接到散热基板的功率器件和引线框架; 控制单元，其被封装成包括控制单元基板和IC以及安装在所述控制单元基板的上部的控制装置; 以及电连接单元，电连接所述封装的电力转换单元和所述封装的控制单元。