公开(公告)号：US20120139123A1

公开(公告)日：2012-06-07

申请号：US12960110

申请日：2010-12-03

申请人： Timothy H. Daubenspeck ,  Gary Lafontant ,  Ekta Misra ,  David L. Questad ,  George J. Scott ,  Krystyna W. Semkow ,  Timothy D. Sullivan ,  Thomas A. Wassick ,  Steven L. Wright

发明人： Timothy H. Daubenspeck ,  Gary Lafontant ,  Ekta Misra ,  David L. Questad ,  George J. Scott ,  Krystyna W. Semkow ,  Timothy D. Sullivan ,  Thomas A. Wassick ,  Steven L. Wright

IPC分类号： H01L23/52 ,  G06F17/50 ,  H01L21/44

CPC分类号： G06F17/5068 ,  G06F2217/12 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05541 ,  H01L2224/05552 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/13006 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/3511 ,  Y02P90/265 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/206 ,  H01L2924/00014 ,  H01L2924/014

摘要： Semiconductor structures, methods of manufacture and design structures are provided. The structure includes at least one offset crescent shaped solder via formed in contact with an underlying metal pad of a chip. The at least one offset crescent shaped via is offset with respect to at least one of the underlying metal pad and an underlying metal layer in direct electrical contact with an interconnect of the chip which is in electrical contact with the underlying metal layer.

摘要翻译： 提供半导体结构，制造方法和设计结构。 该结构包括与芯片的下面的金属焊盘接触形成的至少一个偏移月牙形焊料通孔。 至少一个偏移月牙形通孔相对于下面的金属焊盘和下面的金属层中的至少一个与芯片的与下面的金属层电接触的互连直接电接触而偏移。

公开(公告)号：US08298929B2

公开(公告)日：2012-10-30

申请号：US12960110

申请日：2010-12-03

申请人： Timothy H. Daubenspeck ,  Gary Lafontant ,  Ekta Misra ,  David L. Questad ,  George J. Scott ,  Krystyna W. Semkow ,  Timothy D. Sullivan ,  Thomas A. Wassick ,  Steven L. Wright

发明人： Timothy H. Daubenspeck ,  Gary Lafontant ,  Ekta Misra ,  David L. Questad ,  George J. Scott ,  Krystyna W. Semkow ,  Timothy D. Sullivan ,  Thomas A. Wassick ,  Steven L. Wright

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： G06F17/5068 ,  G06F2217/12 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05541 ,  H01L2224/05552 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/13006 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/3511 ,  Y02P90/265 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/206 ,  H01L2924/00014 ,  H01L2924/014

摘要： Semiconductor structures, methods of manufacture and design structures are provided. The structure includes at least one offset crescent shaped solder via formed in contact with an underlying metal pad of a chip. The at least one offset crescent shaped via is offset with respect to at least one of the underlying metal pad and an underlying metal layer in direct electrical contact with an interconnect of the chip which is in electrical contact with the underlying metal layer.

摘要翻译： 提供半导体结构，制造方法和设计结构。 该结构包括与芯片的下面的金属焊盘接触形成的至少一个偏移月牙形焊料通孔。 至少一个偏移月牙形通孔相对于下面的金属焊盘和下面的金属层中的至少一个与芯片的与下面的金属层电接触的互连直接电接触而偏移。

公开(公告)号：US08446006B2

公开(公告)日：2013-05-21

申请号：US12640752

申请日：2009-12-17

申请人： Raschid J. Bezama ,  Timothy H. Daubenspeck ,  Gary LaFontant ,  Ian D. Melville ,  Ekta Misra ,  George J. Scott ,  Krystyna W. Semkow ,  Timothy D. Sullivan ,  Robin A. Susko ,  Thomas A. Wassick ,  Xiaojin Wei ,  Steven L. Wright

发明人： Raschid J. Bezama ,  Timothy H. Daubenspeck ,  Gary LaFontant ,  Ian D. Melville ,  Ekta Misra ,  George J. Scott ,  Krystyna W. Semkow ,  Timothy D. Sullivan ,  Robin A. Susko ,  Thomas A. Wassick ,  Xiaojin Wei ,  Steven L. Wright

IPC分类号： H01L23/498 ,  H01L21/3205

CPC分类号： H01L23/49816 ,  H01L21/76804 ,  H01L23/5226 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05011 ,  H01L2224/05012 ,  H01L2224/05013 ,  H01L2224/05094 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： Structures and methods to reduce maximum current density in a solder ball are disclosed. A method includes forming a contact pad in a last wiring level and forming a plurality of wires of the contact pad extending from side edges of the contact pad to respective ones of a plurality of vias. Each one of the plurality of wires has substantially the same electrical resistance.

摘要翻译： 公开了减少焊球中的最大电流密度的结构和方法。 一种方法包括在最后的布线层中形成接触焊盘，并且形成从接触焊盘的侧边缘延伸到多个通孔中的多个通孔的接触焊盘的多个导线。 多个导线中的每一根具有基本上相同的电阻。

公开(公告)号：US08492892B2

公开(公告)日：2013-07-23

申请号：US12963139

申请日：2010-12-08

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  George J. Scott

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  George J. Scott

IPC分类号： H01L23/48 ,  H01L29/40 ,  H01L23/28

CPC分类号： H01L24/10 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02126 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0348 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05016 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/0508 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/051 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05562 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/10126 ,  H01L2224/11 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/01027 ,  H01L2924/00 ,  H01L2224/05552

摘要： Solder bump connections and methods for fabricating solder bump connections. The method includes forming a layer stack containing first and second conductive layers, forming a dielectric passivation layer on a top surface of the second conductive layer, and forming a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer. The method further includes forming a conductive plug in the via opening. The solder bump connection includes first and second conductive layers comprised of different conductors, a dielectric passivation layer on a top surface of the second conductive layer, a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer, and a conductive plug in the via opening.

摘要翻译： 焊接凸块连接和制造焊料凸点连接的方法。 该方法包括形成包含第一和第二导电层的层叠层，在第二导电层的顶表面上形成电介质钝化层，以及形成延伸穿过介电钝化层的通孔至第二导电层的顶表面。 该方法还包括在通孔开口中形成导电塞。 焊料凸点连接包括由不同导体组成的第一和第二导电层，在第二导电层的顶表面上的介电钝化层，延伸穿过介电钝化层到第二导电层顶表面的通孔，以及 导电塞在通孔开口中。

公开(公告)号：US20120146212A1

公开(公告)日：2012-06-14

申请号：US12963139

申请日：2010-12-08

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  George J. Scott

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  George J. Scott

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L24/10 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02126 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0348 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05016 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/0508 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/051 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05562 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/10126 ,  H01L2224/11 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/01027 ,  H01L2924/00 ,  H01L2224/05552

摘要： Solder bump connections and methods for fabricating solder bump connections. The method includes forming a layer stack containing first and second conductive layers, forming a dielectric passivation layer on a top surface of the second conductive layer, and forming a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer. The method further includes forming a conductive plug in the via opening. The solder bump connection includes first and second conductive layers comprised of different conductors, a dielectric passivation layer on a top surface of the second conductive layer, a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer, and a conductive plug in the via opening.

摘要翻译： 焊接凸块连接和制造焊料凸块连接的方法。 该方法包括形成包含第一和第二导电层的层叠层，在第二导电层的顶表面上形成电介质钝化层，以及形成延伸穿过介电钝化层的通孔至第二导电层的顶表面。 该方法还包括在通孔开口中形成导电塞。 焊料凸点连接包括由不同导体组成的第一和第二导电层，在第二导电层的顶表面上的介电钝化层，延伸穿过介电钝化层到第二导电层顶表面的通孔，以及 导电塞在通孔开口中。

公开(公告)号：US08710656B2

公开(公告)日：2014-04-29

申请号：US13553882

申请日：2012-07-20

申请人： Timothy H. Daubenspeck ,  Brian M. Erwin ,  Jeffrey P. Gambino ,  Wolfgang Sauter ,  George J. Scott

发明人： Timothy H. Daubenspeck ,  Brian M. Erwin ,  Jeffrey P. Gambino ,  Wolfgang Sauter ,  George J. Scott

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L23/3192 ,  H01L23/525 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05093 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/0603 ,  H01L2224/0614 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/14104 ,  H01L2224/14131 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

摘要： An integrated circuit (IC) chip is disclosed including a plurality of metal vertical interconnect accesses (vias) in a back end of line (BEOL) layer, a redistribution layer (RDL) on the BEOL layer, the BEOL layer having a plurality of bond pads, each bond pad connected to at least one corresponding metal via through the RDL; and a solder bump connected to each bond pad, wherein each solder bump is laterally offset from the corresponding metal via connected to the bond pad towards a center of the IC chip by an offset distance, wherein the offset distance is non-uniform across the IC chip. In one embodiment, the offset distance for each solder bump is proportionate to a distance between the center of the IC chip and the center of the corresponding solder bump pad structure for that solder bump.

摘要翻译： 公开了一种集成电路（IC）芯片，其包括在后端（BEOL）层中的多个金属垂直互连访问（通孔），BEOL层上的再分配层（RDL），BEOL层具有多个键 焊盘，每个接合焊盘通过RDL连接到至少一个对应的金属通孔; 以及连接到每个接合焊盘的焊料凸块，其中每个焊料凸块横向偏离连接到所述接合焊盘的相应金属通孔朝向所述IC芯片的中心偏移距离，其中所述偏移距离在所述IC 芯片。 在一个实施例中，每个焊料凸块的偏移距离与IC芯片的中心与该焊料凸块的相应焊料凸块焊盘结构的中心之间的距离成比例。

公开(公告)号：US20140021600A1

公开(公告)日：2014-01-23

申请号：US13553882

申请日：2012-07-20

申请人： Timothy H. Daubenspeck ,  Brian M. Erwin ,  Jeffrey P. Gambino ,  Wolfgang Sauter ,  George J. Scott

发明人： Timothy H. Daubenspeck ,  Brian M. Erwin ,  Jeffrey P. Gambino ,  Wolfgang Sauter ,  George J. Scott

IPC分类号： H01L23/488 ,  H01L21/768

CPC分类号： H01L23/3192 ,  H01L23/525 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05093 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/0603 ,  H01L2224/0614 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/14104 ,  H01L2224/14131 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

摘要： An integrated circuit (IC) chip is disclosed including a plurality of metal vertical interconnect accesses (vias) in a back end of line (BEOL) layer, a redistribution layer (RDL) on the BEOL layer, the BEOL layer having a plurality of bond pads, each bond pad connected to at least one corresponding metal via through the RDL; and a solder bump connected to each bond pad, wherein each solder bump is laterally offset from the corresponding metal via connected to the bond pad towards a center of the IC chip by an offset distance, wherein the offset distance is non-uniform across the IC chip. In one embodiment, the offset distance for each solder bump is proportionate to a distance between the center of the IC chip and the center of the corresponding solder bump pad structure for that solder bump.

摘要翻译： 公开了一种集成电路（IC）芯片，其包括在后端（BEOL）层中的多个金属垂直互连访问（通孔），BEOL层上的再分配层（RDL），BEOL层具有多个键 焊盘，每个接合焊盘通过RDL连接到至少一个对应的金属通孔; 以及连接到每个接合焊盘的焊料凸块，其中每个焊料凸块横向偏离连接到所述接合焊盘的相应金属通孔朝向所述IC芯片的中心偏移距离，其中所述偏移距离在所述IC 芯片。 在一个实施例中，每个焊料凸块的偏移距离与IC芯片的中心与该焊料凸块的相应焊料凸块焊盘结构的中心之间的距离成比例。

公开(公告)号：US09347147B2

公开(公告)日：2016-05-24

申请号：US13608386

申请日：2012-09-10

申请人： Charles L. Arvin ,  Harry Cox ,  Hariklia Deligianni ,  George J. Scott

发明人： Charles L. Arvin ,  Harry Cox ,  Hariklia Deligianni ,  George J. Scott

IPC分类号： C03C15/00 ,  C25D17/00 ,  G01N27/403 ,  G01N27/404 ,  C25D17/12 ,  C25D21/12

CPC分类号： C25D17/007 ,  C25D17/12 ,  C25D21/12 ,  G01N27/403 ,  G01N27/404

摘要： An electroplating apparatus including a reference electrode to control the potential during an electro-deposition process. The electroplating apparatus may include a bath containing a plating electrolyte and an anode present in a first portion of the bath containing the plating electrolyte. A cathode is present in a second portion of the bath containing the plating electrolyte. A reference electrode is present at a perimeter of the cathode. The electroplating apparatus also includes a control system to bias the cathode and the anode to provide a potential. A measuring system is provided in electrical communication with the reference electrode to measure the potential of the cathode. Methods of using the above described electroplating apparatus are also provided. Structures and method for electroless deposition are also provided.

公开(公告)号：US20120043301A1

公开(公告)日：2012-02-23

申请号：US12859444

申请日：2010-08-19

申请人： Charles L. Arvin ,  Harry Cox ,  Hariklia Deligianni ,  George J. Scott

发明人： Charles L. Arvin ,  Harry Cox ,  Hariklia Deligianni ,  George J. Scott

IPC分类号： C25D17/02 ,  C23F1/00 ,  C25D21/12 ,  B05C3/02 ,  C25D5/00

CPC分类号： C25D17/007 ,  C25D17/12 ,  C25D21/12 ,  G01N27/403 ,  G01N27/404

摘要： An electroplating apparatus including a reference electrode to control the potential during an electro-deposition process. The electroplating apparatus may include a bath containing a plating electrolyte and an anode present in a first portion of the bath containing the plating electrolyte. A cathode is present in a second portion of the bath containing the plating electrolyte. A reference electrode is present at a perimeter of the cathode. The electroplating apparatus also includes a control system to bias the cathode and the anode to provide a potential. A measuring system is provided in electrical communication with the reference electrode to measure the potential of the cathode. Methods of using the above described electroplating apparatus are also provided. Structures and method for electroless deposition are also provided.

摘要翻译： 一种电镀设备，包括在电沉积过程中控制电位的参比电极。 电镀装置可以包括含有电镀电解质的浴和存在于含有电镀电解质的浴的第一部分中的阳极。 在包含电镀电解质的浴的第二部分中存在阴极。 参考电极存在于阴极的周边。 电镀设备还包括一个控制系统，用于偏压阴极和阳极以提供电位。 提供与参考电极电连通的测量系统以测量阴极的电位。 还提供了使用上述电镀设备的方法。 还提供了无电沉积的结构和方法。

公开(公告)号：US09062388B2

公开(公告)日：2015-06-23

申请号：US12859444

申请日：2010-08-19

申请人： Charles L. Arvin ,  Harry Cox ,  Hariklia Deligianni ,  George J. Scott

发明人： Charles L. Arvin ,  Harry Cox ,  Hariklia Deligianni ,  George J. Scott

IPC分类号： C23F1/00 ,  C25D17/00 ,  G01N27/403 ,  G01N27/404 ,  C25D17/12 ,  C25D21/12

CPC分类号： C25D17/007 ,  C25D17/12 ,  C25D21/12 ,  G01N27/403 ,  G01N27/404

摘要： An electroplating apparatus including a reference electrode to control the potential during an electro-deposition process. The electroplating apparatus may include a bath containing a plating electrolyte and an anode present in a first portion of the bath containing the plating electrolyte. A cathode is present in a second portion of the bath containing the plating electrolyte. A reference electrode is present at a perimeter of the cathode. The electroplating apparatus also includes a control system to bias the cathode and the anode to provide a potential. A measuring system is provided in electrical communication with the reference electrode to measure the potential of the cathode. Methods of using the above described electroplating apparatus are also provided. Structures and method for electroless deposition are also provided.

摘要翻译： 一种电镀设备，包括在电沉积过程中控制电位的参比电极。 电镀装置可以包括含有电镀电解质的浴和存在于含有电镀电解质的浴的第一部分中的阳极。 在包含电镀电解质的浴的第二部分中存在阴极。 参考电极存在于阴极的周边。 电镀设备还包括一个控制系统，用于偏压阴极和阳极以提供电位。 提供与参考电极电连通的测量系统以测量阴极的电位。 还提供了使用上述电镀设备的方法。 还提供了无电沉积的结构和方法。