公开(公告)号：US06818469B2

公开(公告)日：2004-11-16

申请号：US10445330

申请日：2003-05-27

申请人： Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi

发明人： Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi

IPC分类号： H01L2100

CPC分类号： H05K1/162 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H05K1/185 ,  H05K3/429 ,  H05K2201/0317 ,  H05K2201/09509

摘要： A thin film capacitor is provided with a substrate having a thickness equal to or more than 2 &mgr;m and equal to or less than 100 &mgr;m; a lower electrode on the substrate, which includes at least a highly elastic electrode and an anti-oxidation electrode on the highly elastic electrode; a dielectric thin film on the first lower electrode; and an upper electrode on the dielectric thin film; wherein the highly elastic electrode is made of a material having a Young's modulus higher than that of the anti-oxidation electrode.

摘要翻译： 薄膜电容器具有厚度等于或大于2μm且等于或小于100μm的基板; 所述基板上的下部电极，在所述高弹性电极上至少包括高弹性电极和抗氧化电极; 第一下电极上的电介质薄膜; 和电介质薄膜上的上电极; 其中所述高弹性电极由杨氏模量高于所述抗氧化电极的杨氏模量的材料制成。

公开(公告)号：US06703705B2

公开(公告)日：2004-03-09

申请号：US09996054

申请日：2001-11-28

申请人： Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

发明人： Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

IPC分类号： H01L2352

CPC分类号： H01L24/81 ,  H01L23/50 ,  H01L23/642 ,  H01L24/73 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/30107

摘要： A semiconductor device has an LSI device provided with a plurality of power supply line connection pads and ground line connection pad in a peripheral edge part of a circuit-formation surface, metal foil leads 5 electrically connected to each of the pads and adhered to the LSI device via an insulation layer, and decoupling capacitors mounted on one surface of the metal foil leads.

摘要翻译： 半导体器件具有在电路形成面的周边部分设置有多个电源线连接焊盘和接地线连接焊盘的LSI器件，电连接到每个焊盘并粘附到LSI的金属箔引线5 通过绝缘层的器件，以及安装在金属箔引线的一个表面上的去耦电容器。

公开(公告)号：US06949815B2

公开(公告)日：2005-09-27

申请号：US10746603

申请日：2003-12-23

申请人： Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

发明人： Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

IPC分类号： H05K3/34 ,  H01L21/60 ,  H01L21/822 ,  H01L23/12 ,  H01L23/50 ,  H01L23/64 ,  H01L27/04 ,  H01L23/52 ,  H01L23/32 ,  H01L23/48 ,  H01G9/05

CPC分类号： H01L24/81 ,  H01L23/50 ,  H01L23/642 ,  H01L24/73 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/30107

摘要： A semiconductor device has an LSI device provided with a plurality of power supply line connection pads and ground line connection pad in a peripheral edge part of a circuit-formation surface, metal foil leads 5 electrically connected to each of the pads and adhered to the LSI device via an insulation layer, and decoupling capacitors mounted on one surface of the metal foil leads.

摘要翻译： 半导体器件具有在电路形成面的周边部分设置有多个电源线连接焊盘和接地线连接焊盘的LSI器件，电连接到每个焊盘并粘附到LSI的金属箔引线5 通过绝缘层的器件，以及安装在金属箔引线的一个表面上的去耦电容器。

公开(公告)号：US06515324B2

公开(公告)日：2003-02-04

申请号：US09942817

申请日：2001-08-30

申请人： Akinobu Shibuya ,  Shintaro Yamamichi ,  Toru Mori ,  Takao Yamazaki ,  Yuzo Shimada

发明人： Akinobu Shibuya ,  Shintaro Yamamichi ,  Toru Mori ,  Takao Yamazaki ,  Yuzo Shimada

IPC分类号： H01L27178

CPC分类号： H01L23/49827 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01L2924/00

摘要： A capacitor has a lower electrode, a dielectric thin film, an upper electrode, and an insulation cover layer formed on an insulation substrate made of an organic film or a ceramic material, and through holes formed at positions corresponding to input and output pads of a semiconductor element or to input and output terminals of a semiconductor package, with electrodes for connection to input and output pads of a semiconductor element or to input and output terminals of a semiconductor package provided within through holes. In a method for mounting the capacitor, the capacitor is interposed between a flip-chip connected semiconductor element and a mounting substrate.

公开(公告)号：US06524905B2

公开(公告)日：2003-02-25

申请号：US09903316

申请日：2001-07-11

申请人： Shintaro Yamamichi ,  Toru Mori ,  Akinobu Shibuya ,  Takao Yamazaki ,  Yuzo Shimada

发明人： Shintaro Yamamichi ,  Toru Mori ,  Akinobu Shibuya ,  Takao Yamazaki ,  Yuzo Shimada

IPC分类号： H01L218242

CPC分类号： H01L28/40 ,  H01L23/5223 ,  H01L24/05 ,  H01L27/0688 ,  H01L2221/68363 ,  H01L2224/04042 ,  H01L2224/4847 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00

摘要： A semiconductor device provided with a thin film capacitor having a small equivalent series inductance is provided, which can be operated at a high frequency range and contributes to size reduction of the electronic devices. The semiconductor device comprises a device formed on a silicon substrate 1a, interlayer insulating films 3a, 3b, and 3c, wiring blocks including a power source wire block and a ground wire block, and a thin film capacitor 14 formed on an uppermost insulating layer. The thin film capacitor 14 comprises a lower electrode 6 connected to the ground wire block 4e through a contact 5d, an upper electrode 8 which is connected to the power source wire block 4d through a contact 5d, and which extends above the lower electrode 6, and a dielectric layer 7 which is inserted between the lower and the upper electrodes.

摘要翻译： 提供了具有小等效串联电感的薄膜电容器的半导体器件，其可以在高频范围下操作并且有助于电子器件的尺寸减小。 半导体器件包括形成在硅衬底1a，层间绝缘膜3a，3b和3c上的器件，包括电源线块和接地线块的布线块，以及形成在最上层绝缘层上的薄膜电容器14。 薄膜电容器14包括通过接触件5d连接到接地线块4e的下电极6，通过接触件5d连接到电源线块4d并且在下电极6上方延伸的上电极8， 以及插入在下电极和上电极之间的电介质层7。

公开(公告)号：US20100044089A1

公开(公告)日：2010-02-25

申请号：US12529378

申请日：2008-02-28

申请人： Akinobu Shibuya ,  Yasuhiro Ishii ,  Toru Mori ,  Koichi Takemura

发明人： Akinobu Shibuya ,  Yasuhiro Ishii ,  Toru Mori ,  Koichi Takemura

IPC分类号： H05K1/16 ,  H05K3/30

CPC分类号： H05K1/162 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L27/016 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K3/4614 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/09763 ,  H05K2201/10378 ,  H05K2203/061 ,  Y10T29/4913 ,  H01L2924/00014

摘要： An interposer integrated with capacitors (100) includes a plug substrate (10) in which via-plugs (12) is formed, and a capacitor substrate (20) in which capacitors are formed. The capacitor substrate (20) includes a substrate body (21), capacitors (22) formed on the main surface of the substrate body, a cover insulating film (25) that covers the capacitors, a terminal electrodes (26) connected to the electrodes of the capacitor and formed on the cover insulating film, electrode pads (24) formed on the rear surface of the substrate body, and via-plugs 23 connecting together the terminal electrodes and electrode pads. The plug substrate (10) includes a substrate body (11), and electrode pads (13) formed on the main surface of the substrate body corresponding to the terminal electrodes of the capacitor substrate, and via-plugs (12) penetrating the substrate body and connected to the electrode pads.

摘要翻译： 与电容器（100）集成的插入器包括其中形成有通孔（12）的插头基板（10）和形成有电容器的电容器基板（20）。 电容器基板（20）包括基板主体（21），形成在基板主体的主表面上的电容器（22），覆盖电容器的覆盖绝缘膜（25），与电极连接的端子电极 的电容器，形成在覆盖绝缘膜上，形成在基板主体的后表面上的电极焊盘（24）以及将端子电极和电极焊盘连接在一起的通孔塞23。 插头基板（10）包括基板主体（11），和形成在基板主体的与主电极基板的端子电极对应的主面上的电极焊盘（13）以及穿过基板体的通孔（12） 并连接到电极焊盘。

公开(公告)号：US08531023B2

公开(公告)日：2013-09-10

申请号：US13383895

申请日：2010-06-25

申请人： Akinobu Shibuya ,  Akira Ouchi

发明人： Akinobu Shibuya ,  Akira Ouchi

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/563 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/498 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01004 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/0242 ,  H05K1/0243 ,  H05K2201/09736 ,  H05K2201/09845 ,  H05K2201/10674 ,  H01L2924/00

摘要： Disclosed is a substrate for a semiconductor package in which leakage of radiation noise from a gap between a semiconductor element and a mounting substrate can be prevented. The substrate for the semiconductor package includes a coplanar waveguide including a signal and ground electrodes on the mounting substrate, the signal electrode flip-chip connected to the semiconductor element, the ground electrodes arranged on both sides of the signal electrode with intervals therebetween. A step part is formed in the ground electrodes in an outer circumferential part of a mounting region of the semiconductor element, the step part having a larger distance between upper surfaces of the mounting substrate and the ground electrode in the outer circumferential part of the mounting region than such distance in the mounting region, and an insulator for covering the signal electrode in the outer circumferential part of the mounting region is formed.

摘要翻译： 公开了一种用于半导体封装的衬底，其中可以防止辐射噪声从半导体元件和安装衬底之间的间隙泄漏。 用于半导体封装的衬底包括共面波导，其包括安装衬底上的信号和接地电极，连接到半导体元件的信号电极倒装芯片，布置在信号电极的两侧上的接地电极，间隔。 在半导体元件的安装区域的外周部的接地电极中形成台阶部，台阶部在安装基板的上表面与安装区域的外周部的接地电极之间具有较大的距离 形成安装区域的距离，并且形成用于覆盖安装区域的外周部分中的信号电极的绝缘体。

公开(公告)号：US20150034373A1

公开(公告)日：2015-02-05

申请号：US14379420

申请日：2013-02-13

申请人： Yoshiki Nakashima ,  Masahiro Kubo ,  Akinobu Shibuya

发明人： Yoshiki Nakashima ,  Masahiro Kubo ,  Akinobu Shibuya

IPC分类号： H05K3/12 ,  H05K1/03 ,  H05K1/09

CPC分类号： H05K3/1275 ,  H05K1/0313 ,  H05K1/09 ,  H05K3/4685 ,  H05K2201/0129 ,  H05K2201/0137 ,  H05K2203/0278 ,  Y10T29/49155

摘要： A wiring structure includes a substrate, a convexoconcave absorption layer including a convexoconcave portion on the substrate, a conductive layer pattern on at least a concave portion of the convexoconcave absorption layer, and an insulating layer pattern over the conductive layer pattern and the convexoconcave absorption layer, on at least the concave portion. This configuration provides a wiring structure and a manufacturing method thereof which enable to form fine multilayer wiring using microcontact printing or the like.

摘要翻译： 布线结构包括基板，在基板上包括凸凹部的凸凹陷波吸收层，凹凸吸收层的至少凹部的导电层图案，以及导电层图案和凹凸吸收层之上的绝缘层图案 至少在凹部上。 这种结构提供了使用微接触印刷等形成精细多层布线的布线结构及其制造方法。

公开(公告)号：US20130012145A1

公开(公告)日：2013-01-10

申请号：US13636576

申请日：2011-03-15

申请人： Akinobu Shibuya ,  Akira Ouchi ,  Akira Miyata ,  Ryo Miyazaki ,  Yoshiaki Wakabayashi

发明人： Akinobu Shibuya ,  Akira Ouchi ,  Akira Miyata ,  Ryo Miyazaki ,  Yoshiaki Wakabayashi

IPC分类号： H04B1/38

CPC分类号： H01P5/024 ,  H01L23/48 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2223/6627 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01P3/12 ,  H05K1/0239 ,  H05K1/141 ,  H05K2201/096 ,  H05K2201/09854 ,  H05K2201/09981 ,  H01L2224/0401

摘要： Provided is a radio module that includes a radio signal connection portion having a low insertion loss and high reliability.This radio module includes a first wiring substrate 1, and a second wiring substrate 2 which is located opposite to a first face 1a of the first wiring substrate 1. Further, at least one through hole 3 having an inner wall formed of a conductive material is provided inside the second wiring substrate. Moreover, at least one hollow pillar 4 formed of a conductive material is provided at a position corresponding to the at least one through hole 3, on at least one of the first face 1a and a second face 2a of the second wiring substrate 2, the second face 2a being opposite to the first face 1a. Here, an axis-direction height of the at least one hollow pillar 4 formed of a conductive material is smaller than the width of a gap between the first face 1a and the second face 2a. Further, one end face of the at least one hollow pillar 4 formed of a conductive material is not fixed, and a radio signal passes through a hollow portion of the at least one pillar.

摘要翻译： 提供一种无线电模块，其包括具有低插入损耗和高可靠性的无线电信号连接部分。 该无线电模块包括第一布线基板1和与第一布线基板1的第一面1a相对的第二布线基板2.此外，具有由导电材料形成的内壁的至少一个通孔3是 设置在第二布线基板的内部。 此外，在与第二布线基板2的第一面1a和第二面2a中的至少一个相对应的至少一个通孔3的位置处设置由导电材料形成的至少一个中空柱4， 第二面2a与第一面1a相对。 这里，由导电材料形成的至少一个中空柱4的轴向高度小于第一面1a和第二面2a之间的间隙的宽度。 此外，由导电材料形成的至少一个中空柱4的一个端面不固定，并且无线电信号通过至少一个支柱的中空部分。

公开(公告)号：US5576518A

公开(公告)日：1996-11-19

申请号：US439945

申请日：1995-05-12

申请人： Akinobu Shibuya ,  Mitsuru Kimura

发明人： Akinobu Shibuya ,  Mitsuru Kimura

IPC分类号： H05K3/46 ,  H01L21/48 ,  H01L23/498 ,  H01L23/538 ,  H05K1/02

CPC分类号： H01L23/5384 ,  H01L21/485 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/09701

摘要： A via-structure off a multilayer interconnection ceramic substrate for a multi-chip module, a semiconductor package and an insulating substrate has a high strength and a high reliability being produced at a low cost. A gap is provided at an interface between a via-conductor and ceramics, and filled with a resin. The resin is preferably of a thermosetting polyimide resin or a benzo-cyclo-butene resin.

摘要翻译： 用于多芯片模块，半导体封装和绝缘衬底的多层互连陶瓷衬底的通孔结构具有高成本的高强度和高可靠性。 在通孔导体和陶瓷之间的界面处提供间隙，并填充树脂。 树脂优选为热固性聚酰亚胺树脂或苯并环丁烯树脂。