公开(公告)号：US08008770B2

公开(公告)日：2011-08-30

申请号：US11556035

申请日：2006-11-02

申请人： Yaojian Lin ,  Romeo Emmanuel P. Alvarez ,  Haijing Cao ,  Wan Lay Looi

发明人： Yaojian Lin ,  Romeo Emmanuel P. Alvarez ,  Haijing Cao ,  Wan Lay Looi

IPC分类号： H01L23/48

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L24/13 ,  H01L2224/05008 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： An integrated circuit package system includes an integrated circuit, and forming a patterned redistribution pad over the integrated circuit.

摘要翻译： 集成电路封装系统包括集成电路，并在该集成电路上形成图案化再分配焊盘。

公开(公告)号：US07381634B2

公开(公告)日：2008-06-03

申请号：US10907732

申请日：2005-04-13

申请人： Yaojian Lin ,  Byung Tai Do ,  Wan Lay Looi ,  Haijing Cao

发明人： Yaojian Lin ,  Byung Tai Do ,  Wan Lay Looi ,  Haijing Cao

IPC分类号： H01L21/44

CPC分类号： H01L24/02 ,  C23F1/26 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48

摘要： An integrated circuit system provides a precursor for an integrated wire bond and flip chip structure. The precursor has a plurality of contact pads thereon. A layer of titanium is deposited on the precursor. A layer of nickel-vanadium is deposited on the layer of titanium. A layer of copper is deposited on the layer of nickel-vanadium. A mask is formed on at least a portion of the layer of copper. Portions of the layers of copper and nickel-vanadium not protected by the mask are removed to expose portions of the layer of titanium. The exposed portions of the layer of titanium are etched with an etching solution consisting of an etchant, a viscosity modifier, and an oxidizer.

摘要翻译： 集成电路系统为集成引线键合和倒装芯片结构提供了前体。 前体在其上具有多个接触焊盘。 一层钛沉积在前体上。 一层镍钒沉积在钛层上。 一层铜沉积在镍 - 钒层上。 在铜层的至少一部分上形成掩模。 去除未被掩模保护的部分铜和镍钒层以露出钛层的部分。 用蚀刻剂，粘度调节剂和氧化剂组成的蚀刻溶液蚀刻钛层的暴露部分。

公开(公告)号：US20070114639A1

公开(公告)日：2007-05-24

申请号：US11556035

申请日：2006-11-02

申请人： Yaojian Lin ,  Romeo Alvarez ,  Haijing Cao ,  Wan Lay Looi

发明人： Yaojian Lin ,  Romeo Alvarez ,  Haijing Cao ,  Wan Lay Looi

IPC分类号： H01L23/495

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L24/13 ,  H01L2224/05008 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： An integrated circuit package system includes an integrated circuit, and forming a patterned redistribution pad over the integrated circuit.

摘要翻译： 集成电路封装系统包括集成电路，并在该集成电路上形成图案化再分配焊盘。

公开(公告)号：US08134196B2

公开(公告)日：2012-03-13

申请号：US11469576

申请日：2006-09-01

申请人： Yaojian Lin ,  Haijing Cao ,  Wan Lay Looi ,  Eng Seng Lim

发明人： Yaojian Lin ,  Haijing Cao ,  Wan Lay Looi ,  Eng Seng Lim

IPC分类号： H01L29/76 ,  H01L21/8242

CPC分类号： H01L28/75

摘要： An integrated circuit system is provided including forming a substrate, forming a first contact having multiple conductive layers over the substrate and a layer of the multiple conductive layers on other layers of the multiple conductive layers, forming a dielectric layer on the first contact, and forming a second contact on the dielectric layer and over the first contact.

摘要翻译： 提供一种集成电路系统，包括形成衬底，在衬底上形成具有多个导电层的第一触点和在多个导电层的其它层上的多个导电层的层，在第一触点上形成电介质层，以及形成 在介电层上和第一接触点上的第二接触。

公开(公告)号：US20060231948A1

公开(公告)日：2006-10-19

申请号：US10907732

申请日：2005-04-13

申请人： Yaojian Lin ,  Byung Tai Do ,  Wan Lay Looi ,  Haijing Cao

发明人： Yaojian Lin ,  Byung Tai Do ,  Wan Lay Looi ,  Haijing Cao

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/02 ,  C23F1/26 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48

摘要： An integrated circuit system provides a precursor for an integrated wire bond and flip chip structure. The precursor has a plurality of contact pads thereon. A layer of titanium is deposited on the precursor. A layer of nickel-vanadium is deposited on the layer of titanium. A layer of copper is deposited on the layer of nickel-vanadium. A mask is formed on at least a portion of the layer of copper. Portions of the layers of copper and nickel-vanadium not protected by the mask are removed to expose portions of the layer of titanium. The exposed portions of the layer of titanium are etched with an etching solution consisting of an etchant, a viscosity modifier, and an oxidizer.

摘要翻译： 集成电路系统为集成引线键合和倒装芯片结构提供了前体。 前体在其上具有多个接触焊盘。 一层钛沉积在前体上。 一层镍钒沉积在钛层上。 一层铜沉积在镍 - 钒层上。 在铜层的至少一部分上形成掩模。 去除未被掩模保护的部分铜和镍钒层以露出钛层的部分。 用蚀刻剂，粘度调节剂和氧化剂组成的蚀刻溶液蚀刻钛层的暴露部分。

公开(公告)号：US20070108615A1

公开(公告)日：2007-05-17

申请号：US11469576

申请日：2006-09-01

申请人： Yaojian Lin ,  Haijing Cao ,  Wan Lay Looi ,  Eng Seng Lim

发明人： Yaojian Lin ,  Haijing Cao ,  Wan Lay Looi ,  Eng Seng Lim

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L28/75

摘要： An integrated circuit system is provided including forming a substrate, forming a first contact having multiple conductive layers over the substrate and a layer of the multiple conductive layers on other layers of the multiple conductive layers, forming a dielectric layer on the first contact, and forming a second contact on the dielectric layer and over the first contact.

摘要翻译： 提供一种集成电路系统，包括形成衬底，在衬底上形成具有多个导电层的第一触点和在多个导电层的其它层上的多个导电层的层，在第一触点上形成电介质层，以及形成 在介电层上和第一接触点上的第二接触。

公开(公告)号：US09865482B2

公开(公告)日：2018-01-09

申请号：US13438696

申请日：2012-04-03

申请人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

发明人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC分类号： H01L23/522 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1134 ,  H01L2224/16235 ,  H01L2224/20 ,  H01L2224/24195 ,  H01L2224/2518 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is made by providing a temporary carrier for supporting the semiconductor device. An integrated passive device (IPD) is mounted to the temporary carrier using an adhesive. The IPD includes a capacitor and a resistor and has a plurality of through-silicon vias (TSVs). A discrete component is mounted to the temporary carrier using the adhesive. The discrete component includes a capacitor. The IPD and the discrete component are encapsulated using a molding compound. A first metal layer is formed over the molding compound. The first metal layer is connected to the TSVs of the IPD and forms an inductor. The temporary carrier and the adhesive are removed, and a second metal layer is formed over the IPD and the discrete component. The second metal layer interconnects the IPD and the discrete component and forms an inductor. An optional interconnect structure is formed over the second metal layer.

公开(公告)号：US09269598B2

公开(公告)日：2016-02-23

申请号：US13569105

申请日：2012-08-07

申请人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

发明人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC分类号： H01L27/08 ,  H01L21/56 ,  H01L21/683 ,  H01L25/16 ,  H01L25/00 ,  H01L25/03 ,  H01L23/538 ,  H01L23/00

CPC分类号： H01L21/568 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/81 ,  H01L25/03 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/81001 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81805 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device has a first conductive layer formed over a sacrificial substrate. A first integrated passive device (IPD) is formed in a first region over the first conductive layer. A conductive pillar is formed over the first conductive layer. A high-resistivity encapsulant greater than 1.0 kohm-cm is formed over the first IPD to a top surface of the conductive pillar. A second IPD is formed over the encapsulant. The first encapsulant has a thickness of at least 50 micrometers to vertically separate the first and second IPDs. An insulating layer is formed over the second IPD. The sacrificial substrate is removed and a second semiconductor die is disposed on the first conductive layer. A first semiconductor die is formed in a second region over the substrate. A second encapsulant is formed over the second semiconductor die and a thermally conductive layer is formed over the second encapsulant.

摘要翻译： 半导体器件具有形成在牺牲衬底上的第一导电层。 第一集成无源器件（IPD）形成在第一导电层上的第一区域中。 在第一导电层上形成导电柱。 在第一IPD上形成大于1.0kohm-cm的高电阻率密封剂到导电柱的顶表面。 在密封剂上形成第二个IPD。 第一密封剂具有至少50微米的厚度以垂直分离第一和第二IPD。 绝缘层形成在第二IPD上。 去除牺牲基板，在第一导电层上设置第二半导体管芯。 第一半导体管芯形成在衬底上的第二区域中。 在第二半导体管芯上形成第二密封剂，并且在第二密封剂上形成导热层。

公开(公告)号：US20120292738A1

公开(公告)日：2012-11-22

申请号：US13569105

申请日：2012-08-07

申请人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

发明人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC分类号： H01L27/06

CPC分类号： H01L21/568 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/81 ,  H01L25/03 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/81001 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81805 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device has a first conductive layer formed over a sacrificial substrate. A first integrated passive device (IPD) is formed in a first region over the first conductive layer. A conductive pillar is formed over the first conductive layer. A high-resistivity encapsulant greater than 1.0 kohm-cm is formed over the first IPD to a top surface of the conductive pillar. A second IPD is formed over the encapsulant. The first encapsulant has a thickness of at least 50 micrometers to vertically separate the first and second IPDs. An insulating layer is formed over the second IPD. The sacrificial substrate is removed and a second semiconductor die is disposed on the first conductive layer. A first semiconductor die is formed in a second region over the substrate. A second encapsulant is formed over the second semiconductor die and a thermally conductive layer is formed over the second encapsulant.

摘要翻译： 半导体器件具有形成在牺牲衬底上的第一导电层。 第一集成无源器件（IPD）形成在第一导电层上的第一区域中。 在第一导电层上形成导电柱。 在第一IPD上形成大于1.0kohm-cm的高电阻率密封剂到导电柱的顶表面。 在密封剂上形成第二个IPD。 第一密封剂具有至少50微米的厚度以垂直分离第一和第二IPD。 绝缘层形成在第二IPD上。 去除牺牲基板，在第一导电层上设置第二半导体管芯。 第一半导体管芯形成在衬底上的第二区域中。 在第二半导体管芯上形成第二密封剂，并且在第二密封剂上形成导热层。

公开(公告)号：US20120175784A1

公开(公告)日：2012-07-12

申请号：US13424484

申请日：2012-03-20

申请人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

发明人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC分类号： H01L23/538

CPC分类号： H01L23/147 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19106 ,  Y10S438/977 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device is made with a conductive via formed through a top-side of the substrate. The conductive via extends vertically through less than a thickness of the substrate. An integrated passive device (IPD) is formed over the substrate. A plurality of first conductive pillars is formed over the first IPD. A first semiconductor die is mounted over the substrate. An encapsulant is formed around the first conductive pillars and first semiconductor die. A second IPD is formed over the encapsulant. An interconnect structure is formed over the second IPD. The interconnect structure operates as a heat sink. A portion of a back-side of the substrate is removed to expose the first conductive via. A second semiconductor die is mounted to the back-side of the substrate. The second semiconductor die is electrically connected to the first IPD and first semiconductor die through the conductive via.

摘要翻译： 半导体器件由通过衬底的顶侧形成的导电通孔制成。 导电通孔垂直延伸穿过小于衬底的厚度。 集成无源器件（IPD）形成在衬底上。 在第一IPD上形成多个第一导电柱。 第一半导体管芯安装在衬底上。 围绕第一导电柱和第一半导体管芯形成密封剂。 在密封剂上形成第二个IPD。 在第二IPD上形成互连结构。 互连结构作为散热器工作。 去除衬底的背面的一部分以露出第一导电通孔。 第二半导体管芯安装到衬底的背面。 第二半导体管芯通过导电通孔电连接到第一IPD和第一半导体管芯。