专利检索 ap:("Zvi Or-Bach" OR "Brian Cronquist" OR "Isreal Beinglass" OR "J.L. de Jong" OR "Deepak C. Sekar") AND inv:"Deepak C. Sekar" 第 1 页

1.

发明申请
SEMICONDUCTOR DEVICE AND STRUCTURE 有权
标题翻译：半导体器件和结构

公开(公告)号：US20120193719A1

公开(公告)日：2012-08-02

申请号：US12904119

申请日：2010-10-13

申请人： Zvi Or-Bach , Brian Cronquist , Isreal Beinglass , J.L. de Jong , Deepak C. Sekar

发明人： Zvi Or-Bach , Brian Cronquist , Isreal Beinglass , J.L. de Jong , Deepak C. Sekar

IPC分类号： H01L27/088

CPC分类号： H01L21/6835 , H01L21/823431 , H01L23/481 , H01L23/5283 , H01L23/544 , H01L27/0688 , H01L27/088 , H01L27/092 , H01L27/10802 , H01L27/10894 , H01L27/1108 , H01L27/1116 , H01L27/11529 , H01L27/11551 , H01L27/1157 , H01L27/11573 , H01L27/11578 , H01L27/2436 , H01L27/249 , H01L29/7841 , H01L29/785 , H01L29/7881 , H01L29/792 , H01L45/04 , H01L45/1226 , H01L45/146 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2223/5442 , H01L2223/54426 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/10253 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/00

摘要： A device comprising semiconductor memories, the device comprising: a first layer and a second layer of layer-transferred mono-crystallized silicon, wherein the first layer comprises a first plurality of horizontally-oriented transistors; wherein the second layer comprises a second plurality of horizontally-oriented transistors; and wherein the second plurality of horizontally-oriented transistors overlays the first plurality of horizontally-oriented transistors.

摘要翻译： 一种包括半导体存储器的器件，所述器件包括：第一层和第二层转移单结晶硅，其中所述第一层包括第一多个水平取向晶体管; 其中所述第二层包括第二多个水平取向晶体管; 并且其中所述第二多个水平取向晶体管覆盖所述第一多个水平取向晶体管。

2.

发明授权
Method of fabricating a semiconductor device and structure 有权
标题翻译：制造半导体器件和结构的方法

公开(公告)号：US08476145B2

公开(公告)日：2013-07-02

申请号：US12904119

申请日：2010-10-13

申请人： Zvi Or-Bach , Brian Cronquist , Isreal Beinglass , Jan Lodewijk de Jong , Deepak C. Sekar

发明人： Zvi Or-Bach , Brian Cronquist , Isreal Beinglass , Jan Lodewijk de Jong , Deepak C. Sekar

IPC分类号： H01L21/30

CPC分类号： H01L21/6835 , H01L21/823431 , H01L23/481 , H01L23/5283 , H01L23/544 , H01L27/0688 , H01L27/088 , H01L27/092 , H01L27/10802 , H01L27/10894 , H01L27/1108 , H01L27/1116 , H01L27/11529 , H01L27/11551 , H01L27/1157 , H01L27/11573 , H01L27/11578 , H01L27/2436 , H01L27/249 , H01L29/7841 , H01L29/785 , H01L29/7881 , H01L29/792 , H01L45/04 , H01L45/1226 , H01L45/146 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2223/5442 , H01L2223/54426 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/10253 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/00

摘要： A method to fabricate a semiconductor device, including the sequence of: implanting one or more regions on a semiconductor wafer forming a doped layer; performing a first transfer of the doped layer onto a carrier; and then performing a second transfer of the doped layer from the carrier to a target wafer; and then etching said one or more regions of the doped layer to form transistors on the doped layer.

摘要翻译： 一种制造半导体器件的方法，包括以下顺序：在形成掺杂层的半导体晶片上注入一个或多个区域; 执行掺杂层到载体上的第一次转移; 然后执行掺杂层从载体到目标晶片的第二次转移; 然后蚀刻掺杂层的一个或多个区域以在掺杂层上形成晶体管。

3.

发明授权
Method for fabrication of a semiconductor device and structure 有权
标题翻译：半导体器件和结构的制造方法

公开(公告)号：US08461035B1

公开(公告)日：2013-06-11

申请号：US12894235

申请日：2010-09-30

申请人： Brian Cronquist , Isreal Beinglass , Jan Lodewijk de Jong , Deepak C. Sekar , Zvi Or-Bach

发明人： Brian Cronquist , Isreal Beinglass , Jan Lodewijk de Jong , Deepak C. Sekar , Zvi Or-Bach

IPC分类号： H01L21/44 , H01L21/82

CPC分类号： H01L21/76898 , H01L21/268 , H01L21/76254 , H01L21/84 , H01L23/481 , H01L24/05 , H01L27/0623 , H01L27/0688 , H01L27/082 , H01L27/088 , H01L27/092 , H01L27/1203 , H01L29/0673 , H01L29/66545 , H01L29/785 , H01L2224/0401 , H01L2224/16225 , H01L2924/12032 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/15788 , H01L2924/16152 , H01L2924/351 , H01L2924/00

摘要： A method for fabricating a device, the method including: providing a first layer including first transistors wherein the first transistors include mono-crystalline semiconductor and first alignment marks; overlaying a second semiconductor layer over the first layer, wherein the second layer includes second transistors, the second transistors include mono-crystalline semiconductor and are configured to be memory cells, at least one of the memory cells include a floating body region configured to be charged to a level indicative of a state of the memory cell, and fabricating the second transistors includes alignment to the first alignment marks.

摘要翻译： 一种制造器件的方法，所述方法包括：提供包括第一晶体管的第一层，其中所述第一晶体管包括单晶半导体和第一对准标记; 在所述第一层上覆盖第二半导体层，其中所述第二层包括第二晶体管，所述第二晶体管包括单晶半导体，并且被配置为存储器单元，所述存储器单元中的至少一个包括配置为被充电的浮体区域到指示存储单元的状态的电平，并且制造第二晶体管包括与第一对准标记对准。

4.

发明授权
Method for fabrication of a semiconductor device and structure 有权
标题翻译：半导体器件和结构的制造方法

公开(公告)号：US08373230B1

公开(公告)日：2013-02-12

申请号：US12904114

申请日：2010-10-13

申请人： Zvi Or-Bach , Brian Cronquist , Isreal Beinglass , Jan Lodewijk de Jong , Deepak C. Sekar

发明人： Zvi Or-Bach , Brian Cronquist , Isreal Beinglass , Jan Lodewijk de Jong , Deepak C. Sekar

IPC分类号： H01L27/12

CPC分类号： H01L21/76254 , B82Y10/00 , B82Y40/00 , H01L21/6835 , H01L21/84 , H01L23/36 , H01L23/481 , H01L23/535 , H01L23/544 , H01L27/0207 , H01L27/0688 , H01L27/088 , H01L27/092 , H01L27/10802 , H01L27/10894 , H01L27/10897 , H01L27/11524 , H01L27/11529 , H01L27/11551 , H01L27/11556 , H01L27/1157 , H01L27/11573 , H01L27/11578 , H01L27/11582 , H01L27/11807 , H01L27/1203 , H01L29/0669 , H01L29/0673 , H01L29/413 , H01L29/66795 , H01L29/66825 , H01L29/66833 , H01L29/7841 , H01L29/785 , H01L29/78696 , H01L29/7881 , H01L29/7889 , H01L29/792 , H01L29/7926 , H01L2221/68359 , H01L2221/68363 , H01L2221/68381 , H01L2223/5442 , H01L2223/54426 , H01L2224/73253 , H01L2924/0002 , H01L2924/00

摘要： Systems and methods are disclosed for fabricating a semiconductor device, includes implanting one or more regions on a semiconductor wafer; performing a layer transfer onto a carrier; and transferring from said carrier to a target wafer.

摘要翻译： 公开了用于制造半导体器件的系统和方法，包括在半导体晶片上注入一个或多个区域; 执行层转移到载体上; 并从所述载体转移到目标晶片。

5.

发明申请
SYSTEM COMPRISING A SEMICONDUCTOR DEVICE AND STRUCTURE 有权
标题翻译：包含半导体器件和结构的系统

公开(公告)号：US20110121366A1

公开(公告)日：2011-05-26

申请号：US13016313

申请日：2011-01-28

申请人： Zvi Or-Bach , Brian Cronquist , Israel Beinglass , J.L. de Jong , Deepak C. Sekar , Paul Lim

发明人： Zvi Or-Bach , Brian Cronquist , Israel Beinglass , J.L. de Jong , Deepak C. Sekar , Paul Lim

IPC分类号： H01L27/118

CPC分类号： H01L21/8221 , H01L21/6835 , H01L21/76254 , H01L21/823828 , H01L21/84 , H01L23/3677 , H01L23/481 , H01L23/5252 , H01L24/05 , H01L24/13 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/83 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L27/0207 , H01L27/0688 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/10802 , H01L27/10873 , H01L27/10876 , H01L27/10894 , H01L27/10897 , H01L27/11 , H01L27/1108 , H01L27/1116 , H01L27/112 , H01L27/11206 , H01L27/11526 , H01L27/11529 , H01L27/11551 , H01L27/11573 , H01L27/11578 , H01L27/11807 , H01L27/11898 , H01L27/1203 , H01L27/1214 , H01L27/1266 , H01L29/4236 , H01L29/66272 , H01L29/66621 , H01L29/66825 , H01L29/66833 , H01L29/66901 , H01L29/78 , H01L29/7841 , H01L29/7881 , H01L29/792 , H01L2221/68368 , H01L2223/5442 , H01L2223/54426 , H01L2224/0401 , H01L2224/16145 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/83894 , H01L2225/06513 , H01L2225/06541 , H01L2924/00011 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01051 , H01L2924/01066 , H01L2924/01068 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15788 , H01L2924/1579 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00015 , H01L2924/01031 , H01L2924/3512 , H01L2924/00 , H01L2224/80001 , H01L2224/05599 , H01L2924/00012

摘要： A semiconductor device includes a first single crystal silicon layer including first transistors, a first alignment mark, and at least one metal layer overlying the first single crystal silicon layer for interconnecting the first transistors; a second layer overlying the at least one metal layer, wherein the second layer includes a plurality of second transistors; and a connection path connecting the first transistors and the second transistors and including at least a first strip, a second strip, and a through via connecting the first strip and the second strip, wherein the second strip is substantially orthogonal to the first strip and wherein the through via is substantially away from both ends of the first strip and both ends of the second strip.

摘要翻译： 半导体器件包括第一单晶硅层，其包括第一晶体管，第一对准标记和覆盖在第一单晶硅层上的至少一个金属层，用于互连第一晶体管; 覆盖所述至少一个金属层的第二层，其中所述第二层包括多个第二晶体管; 以及连接路径，其连接第一晶体管和第二晶体管，并且至少包括连接第一条带和第二条带的第一条带，第二条带和通孔，其中第二条带基本上与第一条带正交，通孔基本上远离第一条带的两端和第二条带的两端。

6.

发明申请
SYSTEM COMPRISING A SEMICONDUCTOR DEVICE AND STRUCTURE 有权
标题翻译：包含半导体器件和结构的系统

公开(公告)号：US20110084314A1

公开(公告)日：2011-04-14

申请号：US12900379

申请日：2010-10-07

申请人： Zvi Or-Bach , Brian Cronquist , Israel Beinglass , J.L. de Jong , Deepak C. Sekar , Zeev Wurman

发明人： Zvi Or-Bach , Brian Cronquist , Israel Beinglass , J.L. de Jong , Deepak C. Sekar , Zeev Wurman

IPC分类号： H01L23/52

CPC分类号： H01L27/0688 , G03F9/7076 , G03F9/7084 , H01L21/268 , H01L21/76254 , H01L21/76898 , H01L21/8221 , H01L21/823871 , H01L21/84 , H01L23/367 , H01L23/481 , H01L23/5226 , H01L23/528 , H01L23/53214 , H01L23/53228 , H01L23/544 , H01L24/73 , H01L27/0207 , H01L27/088 , H01L27/092 , H01L27/105 , H01L27/10876 , H01L27/10894 , H01L27/10897 , H01L27/11 , H01L27/1108 , H01L27/112 , H01L27/11551 , H01L27/11578 , H01L27/11807 , H01L27/11898 , H01L27/1203 , H01L29/42392 , H01L29/458 , H01L29/66272 , H01L29/66545 , H01L29/66621 , H01L29/66848 , H01L29/66901 , H01L29/732 , H01L29/78639 , H01L29/78642 , H01L29/78645 , H01L29/808 , H01L29/812 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2924/00011 , H01L2924/10253 , H01L2924/12032 , H01L2924/1301 , H01L2924/1305 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/3011 , H01L2924/3025 , H01L2924/00014 , H01L2924/00 , H01L2224/80001 , H01L2924/00012 , H01L2924/01015

摘要： A system includes a semiconductor device. The semiconductor device includes a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single crystal silicon layer, wherein the at least one metal layer comprises copper or aluminum more than other materials; and a second single crystal silicon layer overlying the at least one metal layer. The second single crystal silicon layer comprises a plurality of second transistors arranged in substantially parallel bands. Each of a plurality of the bands comprises a portion of the second transistors along an axis in a repeating pattern.

摘要翻译： 系统包括半导体器件。半导体器件包括第一单晶硅层，其包括第一晶体管，第一对准标记和覆盖在第一单晶硅层上的至少一个金属层，其中所述至少一个金属层比其它材料包括铜或铝; 以及覆盖所述至少一个金属层的第二单晶硅层。第二单晶硅层包括以基本平行的带布置的多个第二晶体管。多个频带中的每一个包括沿着重复图案的轴的第二晶体管的一部分。

7.

发明授权
Integrated circuit device and structure 有权
标题翻译：集成电路器件及结构

公开(公告)号：US09099526B2

公开(公告)日：2015-08-04

申请号：US13251269

申请日：2011-10-02

申请人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist

发明人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist

IPC分类号： H01L23/02 , H01L21/762 , H01L21/683 , H01L21/822 , H01L21/84 , H01L23/48 , H01L23/498 , H01L23/544 , H01L25/065 , H01L27/02 , H01L27/06 , H01L27/12 , H01L23/36 , H01L23/00

CPC分类号： H01L21/76232 , H01L21/6835 , H01L21/76254 , H01L21/8221 , H01L21/84 , H01L21/845 , H01L23/36 , H01L23/481 , H01L23/49827 , H01L23/544 , H01L24/16 , H01L24/80 , H01L24/94 , H01L25/0657 , H01L27/0207 , H01L27/0688 , H01L27/1203 , H01L27/1211 , H01L2221/68368 , H01L2221/68381 , H01L2223/54426 , H01L2224/80006 , H01L2224/80009 , H01L2224/80047 , H01L2224/802 , H01L2224/80896 , H01L2224/9202 , H01L2225/06513 , H01L2225/06541 , H01L2225/06589 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01066 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01082 , H01L2924/10329 , H01L2924/12032 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/1436 , H01L2924/1437 , H01L2924/15311 , H01L2924/15788 , H01L2924/3011 , H01L2924/351 , H01L2924/00

摘要： A device, including: an integrated circuit chip, where the integrated circuit chip includes: a first layer including a plurality of first transistors including a mono-crystal channel; at least one metal layer overlying the first layer, the at least one metal layer including aluminum or copper and providing interconnection between the first transistors; a second layer overlying the at least one metal layer, the second layer including second horizontally oriented transistors including a second mono-crystal channel; and a through the second layer via of diameter less than 150 nm, where the second horizontally oriented transistors are interconnected to form logic circuits.

摘要翻译： 一种器件，包括：集成电路芯片，其中所述集成电路芯片包括：包括多个第一晶体管的第一层，所述第一晶体管包括单晶通道; 覆盖在第一层上的至少一个金属层，所述至少一个金属层包括铝或铜并提供第一晶体管之间的互连; 覆盖所述至少一个金属层的第二层，所述第二层包括包括第二单晶通道的第二水平取向晶体管; 以及通过直径小于150nm的第二层通孔，其中第二水平取向晶体管互连以形成逻辑电路。

8.

发明授权
Method for fabrication of configurable systems 有权
标题翻译：可配置系统的制造方法

公开(公告)号：US08664042B2

公开(公告)日：2014-03-04

申请号：US13471009

申请日：2012-05-14

申请人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Israel Beinglass , Jan Lodewijk de Jong

发明人： Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist , Israel Beinglass , Jan Lodewijk de Jong

IPC分类号： H01L21/00

CPC分类号： H01L21/76254 , H01L21/8221 , H01L21/84 , H01L23/36 , H01L23/481 , H01L24/48 , H01L25/0657 , H01L27/0688 , H01L27/092 , H01L27/105 , H01L27/11 , H01L27/1104 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2924/00014 , H01L2924/01019 , H01L2924/01066 , H01L2924/01322 , H01L2924/10253 , H01L2924/12032 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13062 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/3011 , H03K19/177 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207

摘要： A method to construct configurable systems, the method including: providing a first configurable system including a first die and a second die, where the connections between the first die and the second die include through-silicon-via (“TSV”), where the first die is diced from a first wafer using first dice lines; providing a second configurable system including a third die and a fourth die, where the connections between the third die and the fourth die include through-silicon-via (“TSV”), where the third die is diced from a third wafer using third dice lines; and processing the first wafer and the third wafer utilizing at least 20 masks that are the same; where the first dice lines are substantially different than the third dice lines, and where the second die includes a configurable I/O to connect the first configurable system to external devices.

摘要翻译： 一种构建可配置系统的方法，所述方法包括：提供包括第一管芯和第二管芯的第一可配置系统，其中第一管芯和第二管芯之间的连接包括穿硅通孔（“TSV”），其中使用第一骰子线从第一晶片切下第一芯片; 提供包括第三管芯和第四管芯的第二可配置系统，其中第三管芯和第四管芯之间的连接包括穿硅通孔（“TSV”），其中使用第三管芯从第三晶片切割第三管芯线条以及使用相同的至少20个掩模来处理所述第一晶片和所述第三晶片; 其中第一骰子线与第三骰子线基本上不同，并且其中第二骰子包括用于将第一可配置系统连接到外部装置的可配置I / O。