Abstract:
In the production of a printed wiring board comprising innerlayer conductor circuits 161, 131 arranged among insulating layers 101~103 and blind via-holes 141, 142 formed from an outermost surface of the insulating layer toward the innerlayer conductor circuit, an opening hole 160 is previously formed in a central portion of the innerlayer conductor circuit 161 located at the bottom of the blind via-hole 141, and laser beams are irradiated from the outermost surface of the insulating layer to form the blind via-holes 141, 142. Thereafter, a metal plated film is formed on surfaces of the innerlayer conductor circuits 13, 161 and the blind via-holes 141, 142.
Abstract:
An electronic component mounting structure includes a board (110) and an electronic component (130) mounted on a front surface of the board (110). The board (110) includes lands (112). The electronic component (130) includes a body (131) and terminals (132) extending from the body (131). Each terminal (132) is electrically connected to a corresponding one of the lands (112) of the board (110). The terminal (132) has a first terminal portion (132a) extending along the front surface of the board (110) and a second terminal portion (132b) extending toward the front surface of the board (110). Each land (112) includes a land portion electrically soldered to the first terminal portion (132a) and a blind hole (111) for receiving the second terminal portion (132b). The first terminal portion (132a) is soldered to the land portion in a reflow process under the condition that the second terminal portion (132b) is inserted in the blind hole (111).
Abstract:
In the production of a printed wiring board comprising innerlayer conductor circuits 161, 131 arranged among insulating layers 101~103 and blind via-holes 141, 142 formed from an outermost surface of the insulating layer toward the innerlayer conductor circuit, an opening hole 160 is previously formed in a central portion of the innerlayer conductor circuit 161 located at the bottom of the blind via-hole 141, and laser beams are irradiated from the outermost surface of the insulating layer to form the blind via-holes 141, 142. Thereafter, a metal plated film is formed on surfaces of the innerlayer conductor circuits 13, 161 and the blind via-holes 141, 142.
Abstract:
Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.
Abstract:
The present invention refers to a printed circuit board comprising a wiring substrate provided with conductor circuits (5) and a solder resist layer (14) formed on a surface of the Substrate, in which a roughened layer (11) is formed on a surface of the conductor circuit (5).
Abstract:
On the board provided with a conductive layer (5), a pad (16) is formed to fix a conductive connecting pin (100) on a package board (310). The conduction connecting pin (100) serves as electrical connection to a motherboard. The pad (16) is coated with an organic-resin insulating layer (15) having an opening section (18) from which the pad (16) is partially exposed. The conductive connecting pin (100) is fixed to the pad exposed from the opening section using a conductive adhesive (17), preventing the conductive connecting pin (100) from separating off the board at the time of mounting.
Abstract:
In a printed wiring board 10 , an upper electrode connecting portion 52 penetrates through a capacitor portion 40 in top to bottom direction so that an upper electrode connecting portion first part 52a is not in contact with the capacitor portion 40, passes through an upper electrode connecting portion third part 52c provided at the upper portion of the capacitor portion 40, and then connects from the upper electrode connecting portion second part 52b to an upper electrode 42. Furthermore, a lower electrode connecting portion 51 penetrates through the capacitor portion 40 in top to bottom direction so that it is not in contact with the upper electrode 42 of the capacitor portion 40, but is in contact with a lower electrode 41. Therefore, the upper electrode connecting portion 52 and the lower electrode connecting portion 51 can be formed even after in process of build-up, the whole surface is covered by a high dielectric capacitor sheet that has a structure that a high dielectric layer is sandwiched between two metal foils and will afterwards serve as the capacitor portion 40.
Abstract:
A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
Abstract:
Arranging chip capacitors (20) in a printed wiring board (10) makes it possible to reduce the distance between an IC chip (90) and the chip capacitor (20) and to reduce the loop inductance. Further, since the chip capacitors (20) are received in a thick core board (30), there is no possibility of thickening the printed wiring board.
Abstract:
A printed wiring board suitable for reliable connections and reliable high-density mounting of components by using solder bumps. The printed wiring board has a mounting surface on which are formed pads coated with solder resist and having solder bumps. The position of the solder bump is coincident with the position of a via-hole, or the size of an opening disposed in the solder resist is made greater than a land diameter of the via-hole so that the solder resist does not overlap with the via-hole.