公开(公告)号：JP2008034567A

公开(公告)日：2008-02-14

申请号：JP2006205381

申请日：2006-07-27

申请人： Fujitsu Ltd ,  富士通株式会社

发明人： NISHIMURA TAKAO ,  NARISAWA YOSHIAKI

IPC分类号： H01L21/60 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18

CPC分类号： H01L23/3128 ,  H01L23/4952 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48479 ,  H01L2224/48482 ,  H01L2224/48487 ,  H01L2224/48499 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4899 ,  H01L2224/48992 ,  H01L2224/4911 ,  H01L2224/49112 ,  H01L2224/4917 ,  H01L2224/49426 ,  H01L2224/49429 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85051 ,  H01L2224/85186 ,  H01L2224/85191 ,  H01L2224/85205 ,  H01L2224/85206 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/30105 ,  H01L2224/85181 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/0635 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/48455 ,  H01L2224/4554

摘要： PROBLEM TO BE SOLVED: To provide a samll high performance semiconductor device capable of preventing contact between adjacent wires having high flexibility of wire connection, and to provide its effective manufacturing method. SOLUTION: The semiconductor device comprises a substrate 10 with an electrode 21 arranged on its surface, and a first semiconductor element 11A with an electrode 22 arranged on its surface and supported by the substrate 10. A first wire 41 is connected, to at least one electrode (at leat any of an electrode 21 and an electrode 22) arranged on at least any of the substrate 10 and the first semiconductor element 11A via a first bump 31, and a second wire 42 is connected to a part to be connected to the first wire 41 via a second bump 32. COPYRIGHT: (C)2008,JPO&INPIT

摘要翻译： 要解决的问题：提供一种能够防止具有高的线连接灵活性的相邻线之间的接触的同质高性能半导体器件，并提供其有效的制造方法。 解决方案：半导体器件包括其表面上布置有电极21的基板10，以及第一半导体元件11A，其表面上布置有电极22，并由基板10支撑。第一导线41连接到 通过第一凸块31布置在基板10和第一半导体元件11A中的至少任一个上的至少一个电极（在电极21和电极22中的任何一个上）和第二导线42连接到一部分 通过第二凸起32连接到第一导线41.版权所有（C）2008，JPO和INPIT

公开(公告)号：JP2008159607A

公开(公告)日：2008-07-10

申请号：JP2006343093

申请日：2006-12-20

申请人： Fujitsu Ltd ,  富士通株式会社

发明人： NISHIMURA TAKAO ,  NARISAWA YOSHIAKI

IPC分类号： H01L25/065 ,  H01L25/07 ,  H01L25/18

CPC分类号： H01L23/3128 ,  H01L21/563 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/743 ,  H01L24/83 ,  H01L24/91 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/83051 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83856 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/10161 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2924/0695 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/013

摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that can be made compact without making a semiconductor chip small in thickness while keeping the degree of freedom in size or shape of a plurality of semiconductor chips stacked on a wiring substrate, and to provide its manufacturing method. SOLUTION: The semiconductor device 40 is provided with a wiring substrate 41, a first semiconductor element 42 fixed on the wiring substrate 41 and a second semiconductor element 44 fixed on the first semiconductor element 43. In this case, the second semiconductor element 44 is fixed on the first semiconductor element 42 so that the terminal pad 48 of the second semiconductor element 44 may not overlap the first semiconductor element 42, and the bonding pad 47-2 of the wiring substrate 41 and the terminal pad 48 of the second semiconductor element 44 are connected by a connection part including a bump 51, and then an adhesive agent 45 fixing the second semiconductor element 44 and the first semiconductor element 42 covers the connection part. COPYRIGHT: (C)2008,JPO&INPIT

摘要翻译： 要解决的问题：为了提供一种可以制造紧凑的半导体器件，而不使半导体芯片的厚度小，同时保持堆叠在布线基板上的多个半导体芯片的尺寸或形状的自由度，并且 提供其制造方法。 解决方案：半导体器件40设置有布线基板41，固定在布线基板41上的第一半导体元件42和固定在第一半导体元件43上的第二半导体元件44。在这种情况下，第二半导体元件 44固定在第一半导体元件42上，使得第二半导体元件44的端子焊盘48可以不与第一半导体元件42重叠，并且布线基板41的接合焊盘47-2和第二半导体元件42的端子焊盘48 半导体元件44由包括凸块51的连接部分连接，然后固定第二半导体元件44和第一半导体元件42的粘合剂45覆盖连接部分。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2008198940A

公开(公告)日：2008-08-28

申请号：JP2007035280

申请日：2007-02-15

申请人： Fujitsu Ltd ,  富士通株式会社

发明人： NISHIMURA TAKAO ,  NARISAWA YOSHIAKI

IPC分类号： H01L21/60 ,  H05K3/32

CPC分类号： H05K3/305 ,  H01L21/561 ,  H01L21/563 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/743 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/2731 ,  H01L2224/27901 ,  H01L2224/29014 ,  H01L2224/29015 ,  H01L2224/29019 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29339 ,  H01L2224/29355 ,  H01L2224/3003 ,  H01L2224/30051 ,  H01L2224/30131 ,  H01L2224/30141 ,  H01L2224/30177 ,  H01L2224/32055 ,  H01L2224/32056 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/3303 ,  H01L2224/33051 ,  H01L2224/3313 ,  H01L2224/3314 ,  H01L2224/33177 ,  H01L2224/73204 ,  H01L2224/75251 ,  H01L2224/75743 ,  H01L2224/75841 ,  H01L2224/81444 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1579 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/0126 ,  H05K2203/0545 ,  Y02P70/613 ,  H01L2924/07025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/0695 ,  H01L2224/0401

摘要： PROBLEM TO BE SOLVED: To provide a packaging method for electronic components that allows an adhesive to be evenly disposed on a surface of a supporting substrate, such as a wiring substrate, on which electronic components are firmly fixed in response to pneumatic discharged from a semiconductor bonding tool for firmly fixing electronic components on the substrate using the adhesive. SOLUTION: As a method for packaging electronic components onto a supporting substrate 10, the present invention provides an adhesive disposition step for disposing an adhesive 12 to multiple places S1 to S5 on the supporting substrate 10 where electronic components are mounted and an electronic component mounting step for firmly fixing the electronic components by use of a suction tool to the mounting places S1 to 5 in a predetermined order through the adhesive 12. In the above adhesive disposition step, the volume centroid of adhesives 12-2 to 12-5 disposed at mount places S2 to S5 where an electronic component is mounted in the N-th order is made to be inclined in response to a deformed part owing to pneumatic blown off from the suction tool when an electronic component is mounted at the mount place S1 where an electronic component is mounted before the N-1th order. COPYRIGHT: (C)2008,JPO&INPIT

摘要翻译： 要解决的问题：提供一种电子部件的包装方法，其允许粘合剂均匀地设置在诸如布线基板的支撑基板的表面上，其中电子部件响应于气动排出而被牢固地固定 从用于使用粘合剂将电子部件牢固地固定在基板上的半导体接合工具。 解决方案：作为将电子部件包装在支撑基板10上的方法，本发明提供一种粘合剂配置步骤，用于将粘合剂12设置在安装有电子部件的支撑基板10上的多个位置S1至S5，并且电子 部件安装步骤，用于通过粘合剂12以预定的顺序通过使用吸引工具将安装位置S1至5牢固地固定到电子部件上。在上述粘合剂配置步骤中，粘合剂12-2至12-5的体积重心 当将电子部件安装在安装位置S1时，设置在安装位置S2至S5处，其中以N阶安装电子部件，以响应于变形部分而被从吸入工具气动吹出而倾斜 其中在N-1次之前安装电子部件。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2007158244A

公开(公告)日：2007-06-21

申请号：JP2005354986

申请日：2005-12-08

申请人： Fujitsu Ltd ,  富士通株式会社

发明人： NISHIMURA TAKAO ,  NARISAWA YOSHIAKI ,  KUMAGAI KINICHI

IPC分类号： H01L23/32 ,  H01L25/00

CPC分类号： H01L23/5382 ,  H01L23/3128 ,  H01L23/49531 ,  H01L23/49575 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48475 ,  H01L2224/4911 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/49429 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/85051 ,  H01L2224/85399 ,  H01L2224/85951 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/10161 ,  H01L2924/10162 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device provided with a relay member by enabling to arbitrarily set a bonding position or connection mode of bonding wires, and a method of manufacturing the semiconductor device which can inexpensively manufacture this semiconductor device. SOLUTION: The semiconductor device 10 is provided with a first semiconductor element 2 and a second semiconductor element 6, and a relay member 4 for relaying connection between the first semiconductor element 2 and the second semiconductor element 6, and connection between the second semiconductor element 6 or a wiring board 1 or a lead frame 22. The relay member 4 is arranged between the first and second semiconductor elements 2 and 6, the entire surface of a main surface of the relay member 4 is made of a conductor, and a bonding wire 7 connects the relay member 4 to the second semiconductor element 6, and connects the relay substrate 4 to the first semiconductor element 2 or the wiring board 1 or the lead frame 22. COPYRIGHT: (C)2007,JPO&INPIT

摘要翻译： 解决的问题：提供一种通过能够任意设定接合线的接合位置或连接方式而设置有中继部件的半导体器件，以及可廉价地制造该半导体器件的半导体器件的制造方法。 解决方案：半导体器件10设置有第一半导体元件2和第二半导体元件6，以及用于中继第一半导体元件2和第二半导体元件6之间的连接的中继元件4以及第二半导体元件6之间的连接 半导体元件6或配线基板1或引线框22.中继部件4配置在第一和第二半导体元件2,6之间，中继部件4的主面的整个表面由导体构成， 接合线7将中继构件4连接到第二半导体元件6，并且将继电器基板4连接到第一半导体元件2或布线基板1或引线框架22.版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2007096115A

公开(公告)日：2007-04-12

申请号：JP2005285422

申请日：2005-09-29

申请人： Fujitsu Ltd ,  富士通株式会社

发明人： NISHIMURA TAKAO ,  NARISAWA YOSHIAKI ,  KUMAGAI KINICHI

IPC分类号： H01L21/304 ,  B24B1/00

摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device for not propagating cracking and chipping generated at an outer peripheral edge to the inside when thinning a semiconductor wafer by back surface grinding.
SOLUTION: On a semiconductor substrate 10 provided with a first surface 10a where the semiconductor device 12 is formed and a second surface 10b on the opposite side of the first surface, a recess 14 is formed in an outer peripheral region where the semiconductor device 12 is not formed on the first surface 10a. The second surface 10b of the semiconductor substrate 10 is ground and the semiconductor substrate 10 is thinned. Since the recess 14 is formed, the thickness of the semiconductor substrate 10 at the position of the recess 14 after grinding it from the side of the second surface 10b is extremely small. Or, the semiconductor substrate 10 is separated at the recess 14 by grinding from the side of the second surface 10b.
COPYRIGHT: (C)2007,JPO&INPIT

摘要翻译： 要解决的问题：提供一种半导体器件的制造方法，该半导体器件在通过背面研磨来减薄半导体晶片时，不会在外周边缘向内部产生裂纹和碎裂。 解决方案：在具有形成有半导体器件12的第一表面10a和在第一表面的相对侧上的第二表面10b的半导体衬底10上，在半导体衬底10的外周区域中形成有凹部14， 装置12不形成在第一表面10a上。 对半导体衬底10的第二表面10b进行研磨，并使半导体衬底10变薄。 由于形成凹部14，所以从第二面10b侧研磨后的凹部14的位置处的半导体衬底10的厚度非常小。 或者，半导体衬底10通过从第二表面10b的侧面研磨而在凹部14处分离。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2007048962A

公开(公告)日：2007-02-22

申请号：JP2005232040

申请日：2005-08-10

申请人： Fujitsu Ltd ,  富士通株式会社

发明人： NISHIMURA TAKAO ,  NARISAWA YOSHIAKI

IPC分类号： H01L21/52 ,  H01L25/00

CPC分类号： H01L24/97 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48195 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00

摘要： PROBLEM TO BE SOLVED: To prevent that a passive component is brought into contact with a die pad in a semiconductor device, constituted by connecting a semiconductor chip and the passive component with bonding wires, wherein the passive component is mounted via insulating paste-like adhesives on the die pad mounting the semiconductor chip. SOLUTION: After applying a first insulating adhesive on the die pad, the first insulating adhesive is made to harden. On the hardened first insulating adhesives, a second insulating adhesive is applied further so that the passive component may be attached fixedly. Even if stress is added at the time of arranging the passive component on the die pad, passive component is prevented from coming into direct contact with the die pad due to the first insulating adhesive. Then, the connection is carried out between the electrode pad of the semiconductor device on the die pad and the terminal of the passive component by wire bonding. COPYRIGHT: (C)2007,JPO&INPIT

摘要翻译： 要解决的问题：为了防止无源部件与半导体器件中的管芯焊盘接触，其通过用接合线连接半导体芯片和无源部件构成，其中无源部件经由绝缘膏安装 在芯片焊盘上安装半导体芯片的类似粘合剂。 解决方案：在芯片焊盘上施加第一绝缘粘合剂之后，使第一绝缘粘合剂硬化。 在硬化的第一绝缘粘合剂上，进一步施加第二绝缘粘合剂，使得被动部件可以固定地附接。 即使在将无源部件布置在管芯焊盘上时施加应力，也可以防止被动部件由于第一绝缘粘接剂而与管芯焊盘直接接触。 然后，通过引线接合在芯片焊盘上的半导体器件的电极焊盘与无源部件的端子之间进行连接。 版权所有（C）2007，JPO＆INPIT