摘要:
Apparatus and methods of fabricating an under bump metallization structure including an adhesion layer abutting a conductive pad, a molybdenum-containing barrier layer abutting the adhesion layer, a wetting layer abutting the molybdenum-containing barrier layer, and high tin content solder material abutting the wetting layer. The wetting layer may be substantially subsumed in the high content solder forming an intermetallic compound layer. The molybdenum-containing barrier layer prevents the movement of tin in the high tin content solder material from migrating to dielectric layers abutting the conductive pad and potentially causing delamination and/or attacking any underlying structures, particularly copper structures, which may be present.
摘要:
Apparatus and methods of fabricating an under bump metallization structure including an adhesion layer abutting a conductive pad, a molybdenum-containing barrier layer abutting the adhesion layer, a wetting layer abutting the molybdenum-containing barrier layer, and high tin content solder material abutting the wetting layer. The wetting layer may be substantially subsumed in the high content solder forming an intermetallic compound layer. The molybdenum-containing barrier layer prevents the movement of tin in the high tin content solder material from migrating to dielectric layers abutting the conductive pad and potentially causing delamination and/or attacking any underlying structures, particularly copper structures, which may be present.
摘要:
The present invention relates to a composite sputtering target comprising a plurality of bonded metal pieces. The composite sputtering target further comprises a bonded region between the metal pieces. The bonded region may comprise an inter-metallic region upon bonding. The composite sputter target of the present invention may be used in conjunction with an apparatus for sputtering alloy films on substrates.
摘要:
Passivation coatings and gettering agents may be used in an Extreme Ultraviolet (EUV) source which uses tin (Sn) vapor as a plasma “fuel” to prevent contamination and corresponding loss of reflectivity due to tin contamination. The passivation coating may be a material to which tin does not adhere, and may be placed on reflective surfaces in the source chamber. The gettering agent may be a material that reacts strongly with tin, and may be placed outside of the collector mirrors and/or on non-reflective surfaces. A passivation coating may also be provided on the insulator between the anode and cathode of the source electrodes to prevent shorting due to tin coating the insulator surface.
摘要:
At least a p-type and n-type semiconductor device deposited upon a semiconductor wafer containing metal or metal alloy gates. More particularly, a complementary metal-oxide-semiconductor (CMOS) device is formed on a semiconductor wafer having n-type and p-type metal gates.
摘要:
At least a p-type and n-type semiconductor device deposited upon a semiconductor wafer containing metal or metal alloy gates. More particularly, a complementary metal-oxide-semiconductor (CMOS) device is formed on a semiconductor wafer having n-type and p-type metal gates.
摘要:
A technique for producing an enhanced gate structure having a silicon-nitride buffer. Embodiments relate to the structure and development of a gate structure having a silicon-nitride buffer layer deposited upon a dielectric layer, upon which a gate material, such as polysilicon, is deposited.
摘要:
A high-K thin film patterning solution is disclosed to address structural and process limitations of conventional patterning techniques. Subsequent to formation of gate structures adjacent a high-K dielectric layer, a portion of the high-K dielectric layer material is reduced, preferably via exposure to hydrogen gas, to form a reduced portion of the high-K dielectric layer. The reduced portion may be selectively removed utilizing wet etch chemistries to leave behind a trench of desirable geometric properties.
摘要:
A high-K thin film patterning solution is disclosed to address structural and process limitations of conventional patterning techniques. Subsequent to formation of gate structures adjacent a high-K dielectric layer, a portion of the high-K dielectric layer material is reduced, preferably via exposure to hydrogen gas, to form a reduced portion of the high-K dielectric layer. The reduced portion may be selectively removed utilizing wet etch chemistries to leave behind a trench of desirable geometric properties.
摘要:
A liquid form oxidizer may be utilized to form a high dielectric constant dielectric material from a metallic precursor for semiconductor applications. The use of a liquid rather than a gaseous oxidizer reduces the presence of an oxidation under layer under the metallic precursor. It may also, in some embodiments, result in a purer dielectric film.