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91.发明申请公开(公告)号：US20150375999A1
公开(公告)日：2015-12-31
申请号：US14696757
申请日：2015-04-27
Applicant: Infineon Technologies Dresden GmbH
Inventor： Thoralf Kautzsch , Heiko Froehlich , Mirko Vogt , Maik Stegemann , Boris Binder , Steffen Bieselt
CPC classification number: B81C1/00246 , B81B7/008 , B81B2201/0264 , B81B2203/0315 , B81C2203/0721 , B81C2203/0735 , G01L9/0073
Abstract: A method for manufacturing a micromechanical system is shown. The method comprises the steps of forming in a front end of line (FEOL) process a transistor in a transistor region. After the FEOL process, a protective layer is deposited in the transistor region, wherein the protective layer comprises an isolating material, e.g. an oxide. A structured sacrificial layer is formed at least in a region which is not the transistor region. Furthermore, a functional layer is formed which is at least partially covering the structured sacrificial layer. After the functional layer is formed removing the sacrificial layer in order to create a cavity between the functional layer and a surface, where the sacrificial layer was deposited on. The protective layer protects the transistor from being damaged especially during etching processes in further processing steps in MOL (middle of line) and BEOL (back end of line) processes. Using an oxide for said protective layer is advantageous, since the same oxide may be used as the basis for a metallization process in the BEOL. Therefore, the protective layer may remain over the transistor and does not need to be removed like the sacrificial layer, which is typically used as a protection for the transistor. Therefore, the protective layer becomes part of the oxide coverage, which is applied before the BEOL process.
Abstract translation: 示出了用于制造微机械系统的方法。 该方法包括以下步骤：在线的前端（FEOL）处理晶体管区域中的晶体管。 在FEOL处理之后，保护层沉积在晶体管区域中，其中保护层包括隔离材料，例如， 氧化物。 至少在不是晶体管区域的区域中形成结构化牺牲层。 此外，形成至少部分地覆盖结构化牺牲层的功能层。 在形成功能层之后，去除牺牲层，以便在功能层和沉积有牺牲层的表面之间形成空腔。 保护层保护晶体管不被损坏，特别是在MOL（中间线）和BEOL（后端）工艺的进一步处理步骤中的蚀刻工艺期间。 使用用于所述保护层的氧化物是有利的，因为可以使用相同的氧化物作为BEOL中的金属化工艺的基础。 因此，保护层可以保留在晶体管上方，并且不需要像牺牲层一样去除，其通常用作晶体管的保护。 因此，保护层成为在BEOL工艺之前施加的氧化物覆盖的一部分。
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92.发明申请公开(公告)号：US20150375998A1
公开(公告)日：2015-12-31
申请号：US14315979
申请日：2014-06-26
Applicant: Infineon Technologies Dresden GmbH
Inventor： Thoralf Kautzsch , Heiko Froehlich , Mirko Vogt , Maik Stegemann , Boris Binder
CPC classification number: B81C1/00246 , B81B7/008 , B81B2201/0264 , B81B2203/0315 , B81C2203/0721 , B81C2203/0735 , G01D5/145 , G01L9/0073
Abstract: A method for manufacturing a micromechanical system includes forming in a Front-End-of-Line (FEOL) process transistors in a transistor region; after the FEOL-process, forming a sacrificial layer; structuring the sacrificial layer to form a structured sacrificial layer; forming a functional layer at least partially covering the structured sacrificial layer; and removing the sacrificial layer to create a cavity.
Abstract translation: 一种用于制造微机械系统的方法包括在晶体管区域中的前端（FEOL）处理晶体管中形成; 在FEOL工艺之后，形成牺牲层; 构造牺牲层以形成结构化牺牲层; 形成至少部分地覆盖所述结构化牺牲层的功能层; 并去除牺牲层以形成空腔。
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公开(公告)号：US20150375994A1
公开(公告)日：2015-12-31
申请号：US14596967
申请日：2015-01-14
Applicant: MiraMEMS Sensing Technology Co., Ltd.
Inventor： Yu-Hao CHIEN , Li-Tien TSENG
CPC classification number: B81B7/0041 , B81B7/02 , B81B2201/0264 , B81B2203/0315 , B81B2203/033 , B81B2207/012 , B81B2207/07 , B81B2207/094 , B81C1/00238 , B81C1/00293 , B81C2201/112 , B81C2203/0172 , B81C2203/0792 , H01L23/10 , H01L2924/1461
Abstract: A pressure sensor using the MEMS device comprises an airtight ring surrounding a chamber defined by the first substrate and the second substrate. The airtight ring extends from the upper surface of the second substrate to the surface between the first substrate and the second substrate and further breaks out the surface. The pressure sensor utilizes the airtight ring to retain the airtightness of the chamber. The manufacture method of the pressure sensor is also disclosed.
Abstract translation: 使用MEMS装置的压力传感器包括围绕由第一基板和第二基板限定的室的气密环。 气密环从第二基板的上表面延伸到第一基板和第二基板之间的表面，并进一步破坏表面。 压力传感器利用气密环来保持腔室的气密性。 还公开了压力传感器的制造方法。
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公开(公告)号：US09102519B2
公开(公告)日：2015-08-11
申请号：US13804934
申请日：2013-03-14
Applicant: Infineon Technologies AG
Inventor： Alfons Dehe , Carsten Ahrens , Stefan Barzen , Wolfgang Friza
CPC classification number: B81B3/0072 , B81B3/001 , B81B3/0027 , B81B2201/0257 , B81B2203/0127 , B81B2203/0315 , B81C1/00182 , B81C1/00404 , B81C1/00984 , B81C2201/017 , B81C2201/115
Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a sacrificial layer over a first surface of a workpiece having the first surface and an opposite second surface. A membrane is formed over the sacrificial layer. A through hole is etched through the workpiece from the second surface to expose a surface of the sacrificial layer. At least a portion of the sacrificial layer is removed from the second surface to form a cavity under the membrane. The cavity is aligned with the membrane.
Abstract translation: 根据本发明的实施例，形成半导体器件的方法包括在具有第一表面和相对的第二表面的工件的第一表面上形成牺牲层。 在牺牲层上形成膜。 从第二表面通过工件蚀刻通孔以暴露牺牲层的表面。 牺牲层的至少一部分从第二表面移除以在膜下形成空腔。 空腔与膜对准。
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公开(公告)号：US20150214100A1
公开(公告)日：2015-07-30
申请号：US14674447
申请日：2015-03-31
Applicant: Micron Technology, Inc.
Inventor： Mark Kiehlbauch
IPC: H01L21/768 , H01L21/308 , H01L21/3065
CPC classification number: H01L21/76804 , B44C1/227 , B81B2203/0315 , B81B2203/0323 , B81B2203/033 , B81B2203/0338 , B81B2203/0353 , B81C1/00103 , B81C1/00531 , G02B6/136 , H01L21/3065 , H01L21/308 , H01L21/3083 , H01L21/31116 , H01L21/32 , H01L21/32136 , H01L21/32137 , H01L21/76232
Abstract: A method of forming a substrate opening includes forming a plurality of side-by-side openings in a substrate. At least some of immediately adjacent side-by-side openings are formed in the substrate to different depths relative one another. Walls that are laterally between the side-by-side openings are removed to form a larger opening having a non-vertical sidewall surface where the walls were removed in at least one straight-line vertical cross-section that passes through the sidewall surface orthogonally to the removed walls.
Abstract translation: 形成基板开口的方法包括在基板中形成多个并排开口。 至少一些立即相邻的并排开口形成在衬底中彼此不同的深度。 在侧面开口之间的横向的壁被移除以形成具有非垂直侧壁表面的更大的开口，其中壁在至少一个直线垂直横截面中移除，所述至少一个直线垂直横截面正交地穿过侧壁表面 被拆除的墙壁。
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Patent Agency Ranking
公开(公告)号：US20150197419A1
公开(公告)日：2015-07-16
申请号：US14157273
申请日：2014-01-16
Inventor： Chun-Wen Cheng , Jung-Huei Peng , Shang-Ying Tsai , Hung-Chia Tsai , Yi-Chuan Teng
CPC classification number: B81B7/0006 , B81B7/02 , B81B2201/0235 , B81B2201/0242 , B81B2201/0264 , B81B2203/0315 , B81B2207/098 , B81C1/0023 , B81C2203/0154 , B81C2203/0714 , H01L21/78 , H01L23/053 , H01L23/31 , H01L2924/16152 , H01L2924/16235
Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
Abstract translation: 一个实施例是包括具有第一压力的第一腔的第一MEMS模具和第二压力下具有第二空腔的第二MEMS模具，第二压力不同于第一压力的MEMS装置和围绕第一MEMS的模制材料 模具和第二MEMS模具，所述模制材料具有在第一和第二MEMS模具上的第一表面。 该装置还包括模制材料中的第一组电连接器，第一组电连接器中的每一个将第一和第二MEMS模具中的至少一个耦合到模制材料的第一表面，以及将第二组电连接器 连接器在模制材料的第一表面上，每个第二组电连接器被耦合到第一组电连接器中的至少一个。
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公开(公告)号：US20150158723A1
公开(公告)日：2015-06-11
申请号：US14624008
申请日：2015-02-17
Inventor： Kai-Chih Liang , Chia-Hua Chu , Te-Hao Lee , Jiou-Kang Lee , Chung-Hsien Lin
IPC: B81B7/00
CPC classification number: B81C1/00515 , B81B7/0006 , B81B7/0077 , B81B2201/0235 , B81B2203/0315 , B81B2207/07 , B81B2207/095 , B81B2207/096 , B81C1/00293 , B81C1/00301 , B81C2201/0132 , B81C2201/014 , B81C2203/0109 , B81C2203/0118 , B81C2203/0145 , B81C2203/035 , H01L2224/11
Abstract: A microelectromechanical system (MEMS) device may include a MEMS structure over a first substrate. The MEMS structure comprises a movable element. Depositing a first conductive material over the first substrate and etching trenches in a second substrate. Filling the trenches with a second conductive material and depositing a third conductive material over the second conductive material and the second substrate. Bonding the first substrate and the second substrate and thinning a backside of the second substrate which exposes the second conductive material in the trenches.
Abstract translation: 微机电系统（MEMS）装置可以包括在第一基板上的MEMS结构。 MEMS结构包括可移动元件。 在第一衬底上沉积第一导电材料并蚀刻第二衬底中的沟槽。 用第二导电材料填充沟槽并在第二导电材料和第二衬底上沉积第三导电材料。 将第一基板和第二基板接合并使第二基板的背面变薄，从而在沟槽中露出第二导电材料。
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公开(公告)号：US20150125003A1
公开(公告)日：2015-05-07
申请号：US14073672
申请日：2013-11-06
Applicant: Infineon Technologies AG
Inventor： Andreas Wiesbauer , Christian Mandl , Marc Fueldner , Shu-Ting Hsu
CPC classification number: B81B7/0077 , B81B3/0021 , B81B2201/0257 , B81B2203/0127 , B81B2203/0315 , B81C1/00388 , B81C1/00523 , H01L2224/48137 , H01L2224/8592 , H01L2924/15151 , H01L2924/16152 , H04R1/04 , H04R1/406 , H04R3/005 , H04R19/005 , H04R19/04 , H04R31/00 , H04R2201/003
Abstract: An embodiment as described herein includes a microelectromechanical system (MEMS) with a first MEMS transducer element, a second MEMS transducer element, and a semiconductor substrate. The first and second MEMS transducer elements are disposed at a top surface of the semiconductor substrate and the semiconductor substrate includes a shared cavity acoustically coupled to the first and second MEMS transducer elements.
Abstract translation: 如本文所述的实施例包括具有第一MEMS换能器元件的微机电系统（MEMS），第二MEMS换能器元件和半导体基板。 第一和第二MEMS换能器元件设置在半导体衬底的顶表面处，并且半导体衬底包括声耦合到第一和第二MEMS换能器元件的共享空腔。
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公开(公告)号：US08999629B2
公开(公告)日：2015-04-07
申请号：US14250455
申请日：2014-04-11
Applicant: Georgia Tech Research Corporation
Inventor： Paul Kohl , Yu-Chun Chen
IPC: G03F7/095 , G03F7/004 , G03F7/039 , G03F7/16 , G03F7/36 , G03F7/38 , G03F7/40 , B81C1/00 , H01L21/768
CPC classification number: G03F7/095 , B81B2203/0315 , B81C1/00476 , B81C2201/0108 , G03F7/0045 , G03F7/039 , G03F7/168 , G03F7/36 , G03F7/38 , G03F7/40 , H01L21/7682
Abstract: Embodiments according to the present invention relate generally to PAG bilayer and PAG-doped unilayer structures using sacrificial polymer layers that incorporate a photoacid generator having a concentration gradient therein. Said PAG concentration being higher in a upper portion of such structures than in a lower portion thereof. Embodiments according to the present invention also relate to a method of using such bilayers and unilayers to form microelectronic structures having a three-dimensional space, and methods of decomposition of the sacrificial polymer within the aforementioned layers.
Abstract translation: 根据本发明的实施方案一般涉及使用掺入其中具有浓度梯度的光致酸发生器的牺牲聚合物层的PAG双层和PAG掺杂的单层结构。 所述PAG浓度在这种结构的上部比在其下部更高。 根据本发明的实施方案还涉及使用这种双层和单层以形成具有三维空间的微电子结构的方法，以及在上述层内分解牺牲聚合物的方法。
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100.发明申请MEMS Integrated Pressure Sensor Devices having Isotropic Cavities and Methods of Forming Same 审中-公开具有各向同性腔体的MEMS集成压力传感器装置及其形成方法相同公开(公告)号：US20140319631A1
公开(公告)日：2014-10-30
申请号：US14331495
申请日：2014-07-15
Inventor： Chia-Hua Chu , Chun-Wen Cheng
CPC classification number: B81B7/02 , B81B2201/0235 , B81B2201/0242 , B81B2201/025 , B81B2201/0264 , B81B2203/0127 , B81B2203/0315 , B81C1/00182 , B81C1/00238 , B81C2201/013 , B81C2201/019 , B81C2203/0118 , B81C2203/0792 , H01L23/10 , H01L24/29 , H01L24/32 , H01L24/83 , H01L25/50 , H01L2224/29011 , H01L2224/29013 , H01L2224/291 , H01L2224/29124 , H01L2224/29144 , H01L2224/32145 , H01L2224/83193 , H01L2224/83805 , H01L2924/01322 , H01L2924/1461 , H01L2224/3012 , H01L2924/00012 , H01L2924/01029 , H01L2924/00
Abstract: A method embodiment includes providing a MEMS wafer comprising an oxide layer, a MEMS substrate, a polysilicon layer. A carrier wafer comprising a first cavity formed using isotropic etching is bonded to the MEMS, wherein the first cavity is aligned with an exposed first portion of the polysilicon layer. The MEMS substrate is patterned, and portions of the sacrificial oxide layer are removed to form a first and second MEMS structure. A cap wafer including a second cavity is bonded to the MEMS wafer, wherein the bonding creates a first sealed cavity including the second cavity aligned to the first MEMS structure, and wherein the second MEMS structure is disposed between a second portion of the polysilicon layer and the cap wafer. Portions of the carrier wafer are removed so that first cavity acts as a channel to ambient pressure for the first MEMS structure.
Abstract translation: 方法实施例包括提供包括氧化物层，MEMS衬底，多晶硅层的MEMS晶片。 包括使用各向同性蚀刻形成的第一空腔的载体晶片被结合到MEMS，其中第一空腔与多晶硅层的暴露的第一部分对准。 图案化MEMS衬底，并且去除牺牲氧化物层的部分以形成第一和第二MEMS结构。 包括第二腔的盖晶片被结合到MEMS晶片，其中所述接合产生包括与所述第一MEMS结构对准的所述第二腔的第一密封腔，并且其中所述第二MEMS结构设置在所述多晶硅层的第二部分和 盖晶圆。 去除载体晶片的部分，使得第一腔作为第一MEMS结构的环境压力的通道。
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