公开(公告)号：US20180254395A1

公开(公告)日：2018-09-06

申请号：US15969402

申请日：2018-05-02

Applicant: International Business Machines Corporation

Inventor： Stephen W. Bedell ,  Bing Dang ,  Ning Li ,  Frank R. Libsch ,  Devendra K. Sadana

IPC: H01L33/62 ,  H01L25/075

CPC classification number: H01L33/62 ,  H01L23/48 ,  H01L25/0753 ,  H01L2933/0066

Abstract: Magnetic regions of at least one of chiplet or a receiving substrate are used to permit magnetically guided precision placement of chiplets on the receiving substrate. In some embodiments, a scanning magnetic head can be used to release individual chiplets from a temporary support substrate to the receiving substrate. Structures are provided in which a magnetic moment of a controlled orientation exists between the transferred chiplets and the receiving substrate.

公开(公告)号：US10056672B2

公开(公告)日：2018-08-21

申请号：US15222230

申请日：2016-07-28

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  Duixian Liu ,  Jean-Olivier Plouchart ,  Alberto Valdes-Garcia

IPC: H01P5/107 ,  H01P5/02 ,  H01P3/12 ,  H01P3/08 ,  H01P5/08 ,  H01L23/498 ,  H01L23/66 ,  H01L25/065 ,  H01P3/16 ,  H01Q1/38 ,  H01Q1/48 ,  H01Q1/50 ,  H01L23/538 ,  H01L23/00 ,  H05K1/02

CPC classification number: H01P5/107 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0655 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2924/10253 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/19031 ,  H01L2924/19032 ,  H01L2924/19033 ,  H01L2924/19039 ,  H01P3/08 ,  H01P3/121 ,  H01P3/16 ,  H01P5/02 ,  H01P5/08 ,  H01P5/087 ,  H01Q1/2283 ,  H01Q1/38 ,  H01Q1/48 ,  H01Q1/50 ,  H05K1/0243 ,  H05K2201/037 ,  H05K2201/10522

Abstract: Embodiments include package structures having integrated waveguides to enable high data rate communication between package components. For example, a package structure includes a package substrate having an integrated waveguide, and first and second integrated circuit chips mounted to the package substrate. The first integrated circuit chip is coupled to the integrated waveguide using a first transmission line to waveguide transition, and the second integrated circuit chip is coupled to the integrated waveguide using a second transmission line to waveguide transition. The first and second integrated circuit chips are configured to communicate by transmitting signals using the integrated waveguide within the package carrier.

公开(公告)号：US20180182672A1

公开(公告)日：2018-06-28

申请号：US15903973

申请日：2018-02-23

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  Jeffrey D. Gelorme ,  John U. Knickerbocker

IPC: H01L21/78 ,  H01L23/31 ,  H01L23/00 ,  H01L23/29 ,  H01L23/48

CPC classification number: H01L21/7813 ,  H01L21/561 ,  H01L21/568 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/19 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/02331 ,  H01L2224/02335 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/03002 ,  H01L2224/03416 ,  H01L2224/03452 ,  H01L2224/03515 ,  H01L2224/03831 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05147 ,  H01L2224/12105 ,  H01L2224/1301 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16235 ,  H01L2224/24137 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2924/15192 ,  H01L2924/15311

Abstract: A support structure for use in fan-out wafer level packaging is provided that includes, a silicon handler wafer having a first surface and a second surface opposite the first surface, a release layer is located above the first surface of the silicon handler wafer, and a layer selected from the group consisting of an adhesive layer and a redistribution layer is located on a surface of the release layer. After building-up a fan-out wafer level package on the support structure, infrared radiation is employed to remove (via laser ablation) the release layer, and thus remove the silicon handler wafer from the fan-out wafer level package.

公开(公告)号：US09947567B2

公开(公告)日：2018-04-17

申请号：US14747670

申请日：2015-06-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bing Dang ,  Jeffrey D. Gelorme ,  John U. Knickerbocker

IPC: H01L21/30 ,  H01L21/46 ,  H01L21/683 ,  C08K3/04 ,  C09J9/00 ,  C09J171/12 ,  H01L21/02 ,  C08G59/06 ,  C09J163/00 ,  C09J171/00 ,  C08L63/00

CPC classification number: H01L21/6835 ,  C08G59/063 ,  C08G2650/56 ,  C08K3/04 ,  C08L63/00 ,  C08L71/00 ,  C09J9/00 ,  C09J163/00 ,  C09J171/00 ,  C09J171/12 ,  H01L21/02052 ,  H01L21/02057 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2221/68386

Abstract: A bonding material including a phenoxy resin thermoplastic component, and a carbon black filler component. The carbon black filler component is present in an amount greater than 1 wt. %. The carbon black filler converts the phenoxy resin thermoplastic component from a material that transmits infra-red (IR) wavelengths to a material that absorbs a substantial portion of infra-red (IR) wavelengths.

公开(公告)号：US20180098432A1

公开(公告)日：2018-04-05

申请号：US15821432

申请日：2017-11-22

Applicant: International Business Machines Corporation

Inventor： Paul S. Andry ,  Qianwen Chen ,  Bing Dang ,  John U. Knickerbocker ,  Minhua Lu ,  Robert J. Polastre ,  Bucknell C. Webb

IPC: H05K1/18 ,  H05K1/02 ,  H05K3/00 ,  H05K1/11 ,  H05K3/30 ,  H05K1/03 ,  H05K3/34

CPC classification number: H05K1/189 ,  G01R31/2818 ,  G01R31/309 ,  G01R31/44 ,  H05K1/0268 ,  H05K1/0274 ,  H05K1/0393 ,  H05K1/111 ,  H05K3/0026 ,  H05K3/0052 ,  H05K3/305 ,  H05K3/341 ,  H05K3/3494 ,  H05K13/0069 ,  H05K2201/09072 ,  H05K2201/10015 ,  H05K2201/10037 ,  H05K2201/1006 ,  H05K2201/10098 ,  H05K2201/10106 ,  H05K2201/10121 ,  H05K2201/10522 ,  H05K2203/107 ,  H05K2203/162

Abstract: An electro-optical module assembly is provided that includes a flexible substrate having a first surface and a second surface opposite the first surface, wherein the flexible substrate contains an opening located therein that extends from the first surface to the second surface. An optical component is located on the second surface of the flexible substrate and is positioned to have a surface exposed by the opening. At least one electronic component is located on a first portion of the first surface of the flexible substrate, and at least one micro-energy source is located on a second portion of the first surface of the flexible substrate.

公开(公告)号：US09935009B2

公开(公告)日：2018-04-03

申请号：US15085099

申请日：2016-03-30

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  Jeffrey D. Gelorme ,  John U. Knickerbocker

IPC: H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L23/48

CPC classification number: H01L21/7813 ,  H01L21/561 ,  H01L21/568 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/19 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/02331 ,  H01L2224/02335 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/03002 ,  H01L2224/03416 ,  H01L2224/03452 ,  H01L2224/03515 ,  H01L2224/03831 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05147 ,  H01L2224/12105 ,  H01L2224/1301 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16235 ,  H01L2224/24137 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2924/15192 ,  H01L2924/15311

Abstract: A support structure for use in fan-out wafer level packaging is provided that includes, a silicon handler wafer having a first surface and a second surface opposite the first surface, a release layer is located above the first surface of the silicon handler wafer, and a layer selected from the group consisting of an adhesive layer and a redistribution layer is located on a surface of the release layer. After building-up a fan-out wafer level package on the support structure, infrared radiation is employed to remove (via laser ablation) the release layer, and thus remove the silicon handler wafer from the fan-out wafer level package.

公开(公告)号：US20180090404A1

公开(公告)日：2018-03-29

申请号：US15440032

申请日：2017-02-23

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  Yu Luo

IPC: H01L23/10 ,  H01L31/0203 ,  H01L21/48 ,  B81B7/00 ,  B81C1/00

CPC classification number: H01L23/10 ,  B81B7/0058 ,  B81C1/00269 ,  B81C2203/038 ,  H01L21/4817 ,  H01L31/0203

Abstract: A semiconductor device includes a first bonding surface disposed on a first component of the semiconductor device. A bond material is disposed on the first bonding surface, and a second bonding surface is disposed on a second component of the semiconductor device. The bond material is disposed on the second bonding surface. A first electroplated bond connects the bond material and the first bonding surface, and a second electroplated bond connects the bond material and the second bonding surface.

公开(公告)号：US20170337392A1

公开(公告)日：2017-11-23

申请号：US15156800

申请日：2016-05-17

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  John U. Knickerbocker ,  Minhua Lu

IPC: G06F21/62 ,  G06F19/00 ,  G06F21/32 ,  G06F21/60

CPC classification number: G06F21/6245 ,  G06F19/00 ,  G06F19/324 ,  G06F21/32 ,  G06F21/602 ,  H04L63/0861

Abstract: A method for providing data security comprises operatively connecting one or more sensing elements with a user, sensing one or more characteristics of the user via the one or more sensing elements, wherein each of the one or more sensing elements comprises at least one unique semiconductor identifier, transmitting the at least one unique semiconductor identifier and data concerning the one or more sensed characteristics from the one or more sensing elements to a data analytics engine, attaching at least one unique biological identifier associated with the user to the transmission of the at least one unique semiconductor identifier and the data concerning the one or more sensed characteristics, verifying by the data analytics engine that the at least one unique semiconductor identifier of the one or more sensing elements and the at least one biological identifier are valid, analyzing by the data analytics engine the data concerning the one or more sensed characteristics, generating a response based on the analysis, and transmitting the response from the data analytics engine to an integration device associated with the user.

公开(公告)号：US20170324068A1

公开(公告)日：2017-11-09

申请号：US15416564

申请日：2017-01-26

Applicant: International Business Machines Corporation

Inventor： Paul S. Andry ,  Bing Dang ,  John U. Knickerbocker ,  Yang Liu ,  Jae-Woong Nah ,  Adinath Narasgond ,  Bucknell C. Webb

IPC: H01M2/02 ,  H01M2/10

CPC classification number: H01M2/0207 ,  H01M2/1061 ,  H01M6/40 ,  H01M10/0436 ,  H01M2220/30

Abstract: A micro-battery is provided in which a metallic sealing layer is used to provide a hermetic seal between an anode side of the micro-battery and the cathode side of the micro-battery. In accordance with the present application, the metallic sealing layer is formed around a perimeter of each metallic anode structure located on the anode side and then the metallic sealing layer is bonded to a solderable metal layer of a wall structure present on the cathode side. The wall structure contains a cavity that exposes a metallic current collector structure, the cavity is filled with battery materials.

公开(公告)号：US20170287782A1

公开(公告)日：2017-10-05

申请号：US15085099

申请日：2016-03-30

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  Jeffrey D. Gelorme ,  John U. Knickerbocker

IPC: H01L21/78 ,  H01L25/00 ,  H01L21/66 ,  H01L25/065

CPC classification number: H01L21/7813 ,  H01L21/561 ,  H01L21/568 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/19 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/02331 ,  H01L2224/02335 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/03002 ,  H01L2224/03416 ,  H01L2224/03452 ,  H01L2224/03515 ,  H01L2224/03831 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05147 ,  H01L2224/12105 ,  H01L2224/1301 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16235 ,  H01L2224/24137 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2924/15192 ,  H01L2924/15311

Abstract: A support structure for use in fan-out wafer level packaging is provided that includes, a silicon handler wafer having a first surface and a second surface opposite the first surface, a release layer is located above the first surface of the silicon handler wafer, and a layer selected from the group consisting of an adhesive layer and a redistribution layer is located on a surface of the release layer. After building-up a fan-out wafer level package on the support structure, infrared radiation is employed to remove (via laser ablation) the release layer, and thus remove the silicon handler wafer from the fan-out wafer level package.