利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

786 条记录 (耗时 0.038 秒)

    N-FET with a highly doped source/drain and strain booster
    111.
    发明授权
    N-FET with a highly doped source/drain and strain booster 有权
    具有高掺杂源/漏极和应变增强器的N-FET

    公开(公告)号：US08247285B2

    公开(公告)日：2012-08-21

    申请号：US12341674

    申请日：2008-12-22

    申请人： Jing-Cheng Lin ,  Chen-Hua Yu

    发明人： Jing-Cheng Lin ,  Chen-Hua Yu

    IPC分类号： H01L21/8238

    CPC分类号： H01L29/7848 ,  H01L21/26586 ,  H01L21/28255 ,  H01L29/51 ,  H01L29/66477 ,  H01L29/7833

    摘要： A structure and method of making an N-FET with a highly doped source/drain and strain booster are presented. The method provides a substrate with a Ge channel region. A gate dielectric is formed over the Ge channel and a gate electrode is formed over the gate dielectric. Sacrificial gate spacers are disposed on the sidewalls of the gate dielectric and gate electrode. Cavities are etched into the substrate extending under the sacrificial gate spacers. Si1-xGex source/drain regions are doped in-situ during formation, x

    摘要翻译： 提出了制造具有高掺杂源/漏和应变增强器的N-FET的结构和方法。 该方法提供具有Ge沟道区的衬底。 在Ge沟道上方形成栅极电介质，在栅极电介质上形成栅电极。 牺牲栅间隔件设置在栅极电介质和栅电极的侧壁上。 凹坑被蚀刻到在牺牲栅极间隔物下面延伸的衬底中。 Si1-xGex源/漏区在形成期间原位掺杂，x <0.85。

    Method of separating light-emitting diode from a growth substrate
    112.
    发明授权
    Method of separating light-emitting diode from a growth substrate 有权
    从生长衬底分离发光二极管的方法

    公开(公告)号：US08236583B2

    公开(公告)日：2012-08-07

    申请号：US12554578

    申请日：2009-09-04

    申请人： Ding-Yuan Chen ,  Hung-Ta Lin ,  Chen-Hua Yu ,  Wen-Chih Chiou

    发明人： Ding-Yuan Chen ,  Hung-Ta Lin ,  Chen-Hua Yu ,  Wen-Chih Chiou

    IPC分类号： H01L21/00

    CPC分类号： H01L33/007 ,  C23C14/048 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265 ,  H01L25/167 ,  H01L33/0079 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of forming a light-emitting diode (LED) device and separating the LED device from a growth substrate is provided. The LED device is formed by forming an LED structure over a growth substrate. The method includes forming and patterning a mask layer on the growth substrate. A first contact layer is formed over the patterned mask layer with an air bridge between the first contact layer and the patterned mask layer. The first contact layer may be a contact layer of the LED structure. After the formation of the LED structure, the growth substrate is detached from the LED structure along the air bridge.

    摘要翻译： 提供一种形成发光二极管（LED）器件并将LED器件与生长衬底分离的方法。 LED器件通过在生长衬底上形成LED结构而形成。 该方法包括在生长衬底上形成和图案化掩模层。 在图案化掩模层上形成第一接触层，在第一接触层和图案化掩模层之间具有空气桥。 第一接触层可以是LED结构的接触层。 在形成LED结构之后，生长衬底沿着空气桥与LED结构分离。

    Schemes for forming barrier layers for copper in interconnect structures
    113.
    发明授权
    Schemes for forming barrier layers for copper in interconnect structures 有权
    用于在互连结构中形成铜的阻挡层的方案

    公开(公告)号：US08232201B2

    公开(公告)日：2012-07-31

    申请号：US13115161

    申请日：2011-05-25

    申请人： Chen-Hua Yu ,  Hai-Ching Chen ,  Tien-I Bao

    发明人： Chen-Hua Yu ,  Hai-Ching Chen ,  Tien-I Bao

    IPC分类号： H01L21/44

    CPC分类号： H01L23/53238 ,  H01L21/322 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of forming a semiconductor structure includes providing a substrate; forming a low-k dielectric layer over the substrate; embedding a conductive wiring into the low-k dielectric layer; and thermal soaking the conductive wiring in a carbon-containing silane-based chemical to form a barrier layer on the conductive wiring. A lining barrier layer is formed in the opening for embedding the conductive wiring. The lining barrier layer may comprise same materials as the barrier layer, and the lining barrier layer may be recessed before forming the barrier layer and may contain a metal that can be silicided.

    摘要翻译： 形成半导体结构的方法包括提供基板; 在衬底上形成低k电介质层; 将导电布线嵌入到低k电介质层中; 并且将导电布线热浸在含碳硅烷类化学品中以在导电布线上形成阻挡层。 在用于嵌入导电布线的开口中形成衬里阻挡层。 衬里阻挡层可以包括与阻挡层相同的材料，并且衬里阻挡层可以在形成阻挡层之前被凹入，并且可以包含可以被硅化的金属。

    Process for Improving Copper Line Cap Formation
    114.
    发明申请
    Process for Improving Copper Line Cap Formation 有权
    改善铜线帽形成的工艺

    公开(公告)号：US20120190191A1

    公开(公告)日：2012-07-26

    申请号：US13440704

    申请日：2012-04-05

    申请人： Chien-Hsueh Shih ,  Minghsing Tsai ,  Chen-Hua Yu ,  Ming-Shih Yeh

    发明人： Chien-Hsueh Shih ,  Minghsing Tsai ,  Chen-Hua Yu ,  Ming-Shih Yeh

    IPC分类号： H01L21/768

    CPC分类号： H01L21/76849 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/76865 ,  H01L21/76883

    摘要： An integrated circuit includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, a first opening in the low-k dielectric layer, and a first diffusion barrier layer in the first opening covering the low-k dielectric layer in the first opening, wherein the first diffusion barrier layer has a bottom portion connected to sidewall portions, and wherein the sidewall portions have top surfaces close to a top surface of the low-k dielectric layer. The integrated circuit further includes a conductive line filling the first opening wherein the conductive line has a top surface lower than the top surfaces of the sidewall portions of the diffusion barrier layer, and a metal cap on the conductive line and only within a region directly over the conductive line.

    摘要翻译： 集成电路包括半导体衬底，半导体衬底上的低k电介质层，低k电介质层中的第一开口，第一开口中的第一扩散阻挡层，覆盖第一开口中的低k电介质层 开口，其中所述第一扩散阻挡层具有连接到侧壁部分的底部，并且其中所述侧壁部分具有靠近所述低k电介质层的顶表面的顶表面。 集成电路还包括填充第一开口的导电线，其中导电线具有比扩散阻挡层的侧壁部分的顶表面低的顶表面，以及导电线上的金属盖，并且仅在直接在 导线。

    Method of fabricating semiconductor device isolation structure
    120.
    发明授权
    Method of fabricating semiconductor device isolation structure 有权
    制造半导体器件隔离结构的方法

    公开(公告)号：US08110890B2

    公开(公告)日：2012-02-07

    申请号：US11758043

    申请日：2007-06-05

    申请人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Chu-Yun Fu ,  Ding-Yuan Chen

    发明人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Chu-Yun Fu ,  Ding-Yuan Chen

    IPC分类号： H01L21/70

    CPC分类号： H01L21/76202 ,  H01L21/26506 ,  H01L21/26533 ,  H01L21/26586 ,  H01L21/266 ,  H01L21/324 ,  H01L21/762 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/6659 ,  H01L29/7833

    摘要： A semiconductor device including reentrant isolation structures and a method for making such a device. A preferred embodiment comprises a substrate of semiconductor material forming at least one isolation structure having a reentrant profile and isolating one or more adjacent operational components. The reentrant profile of the at least one isolation structure is formed of substrate material and is created by ion implantation, preferably using oxygen ions applied at a number of different angles and energy levels. In another embodiment the present invention is a method of forming an isolation structure for a semiconductor device performing at least one oxygen ion implantation.

    摘要翻译： 包括可折入隔离结构的半导体器件和用于制造这种器件的方法。 优选实施例包括形成至少一个隔离结构的半导体材料的衬底，该隔离结构具有折返轮廓并且隔离一个或多个相邻的操作部件。 至少一个隔离结构的折返轮廓由衬底材料形成，并且通过离子注入产生，优选地使用以多个不同角度和能级施加的氧离子。 在另一个实施方案中，本发明是形成用于进行至少一个氧离子注入的半导体器件的隔离结构的方法。