LOW CTE INTERPOSER
    125.
    发明申请

    公开(公告)号:US20130063918A1

    公开(公告)日:2013-03-14

    申请号:US13232436

    申请日:2011-09-14

    摘要: An interconnection component includes a first support portion has a plurality of first conductive vias extending therethrough substantially perpendicular to surfaces thereof such that each via has a first end adjacent a first surface and a second end adjacent a second surface. A second support portion has a plurality of second conductive vias extending therethrough substantially perpendicular to surfaces thereof such that each via has a first end adjacent the first surface and a second end adjacent the second surface. A redistribution layer is disposed between the second surfaces of the first and second support portions, electrically connecting at least some of the first vias with at least some of the second vias. The first and second support portions can have a coefficient of thermal expansion (“CTE”) of less than 12 parts per million per degree, Celsius (“ppm/° C.”).

    摘要翻译: 互连部件包括第一支撑部分,其具有大致垂直于其表面延伸的多个第一导电通孔,使得每个通孔具有邻近第一表面的第一端和邻近第二表面的第二端。 第二支撑部分具有大致垂直于其表面延伸穿过的多个第二导电通路,使得每个通孔具有邻近第一表面的第一端和邻近第二表面的第二端。 再分配层设置在第一和第二支撑部分的第二表面之间,将至少一些第一通孔与至少一些第二通孔电连接。 第一和第二支撑部分的热膨胀系数(CTE)可以低于每百万摄氏度(ppm /℃)的百万分之十二。

    SEMICONDUCTOR CHIP PACKAGE ASSEMBLY AND METHOD FOR MAKING SAME
    128.
    发明申请
    SEMICONDUCTOR CHIP PACKAGE ASSEMBLY AND METHOD FOR MAKING SAME 有权
    半导体芯片封装组件及其制造方法

    公开(公告)号:US20120313238A1

    公开(公告)日:2012-12-13

    申请号:US13155552

    申请日:2011-06-08

    IPC分类号: H01L23/498 H01L21/56

    摘要: A microelectronic assembly may include a substrate containing a dielectric element having first and second opposed surfaces. The dielectric element may include a first dielectric layer adjacent the first surface, and a second dielectric layer disposed between the first dielectric layer and the second surface. A Young's modulus of the first dielectric layer may be at least 50% greater than the Young's modulus of the second dielectric layer, which is less than two gigapascal (GPa). A conductive structure may extend through the first and second dielectric layers and electrically connect substrate contacts at the first surface with terminals at the second surface. The substrate contacts may be joined with contacts of a microelectronic element through conductive masses, and a rigid underfill may be between the microelectronic element and the first surface. The terminals may be usable to bond the microelectronic assembly to contacts of a component external to the microelectronic assembly.

    摘要翻译: 微电子组件可以包括含有具有第一和第二相对表面的电介质元件的衬底。 电介质元件可以包括与第一表面相邻的第一电介质层,以及设置在第一介电层和第二表面之间的第二电介质层。 第一电介质层的杨氏模量可以比第二电介质层的杨氏模量大至少50%,小于二千兆帕(GPa)。 导电结构可以延伸穿过第一和第二电介质层,并且将第一表面处的基板触点与第二表面上的端子电连接。 衬底触点可以通过导电块与微电子元件的触点接合,并且刚性底部填充可以在微电子元件和第一表面之间。 端子可以用于将微电子组件接合到微电子组件外部的部件的触点。

    INTERPOSER HAVING MOLDED LOW CTE DIELECTRIC
    129.
    发明申请
    INTERPOSER HAVING MOLDED LOW CTE DIELECTRIC 有权
    具有成型低CTE电介质的插件

    公开(公告)号:US20120267751A1

    公开(公告)日:2012-10-25

    申请号:US13091800

    申请日:2011-04-21

    摘要: A method for making an interconnection component is disclosed, including forming a plurality of metal posts extending away from a reference surface. Each post is formed having a pair of opposed end surface and an edge surface extending therebetween. A dielectric layer is formed contacting the edge surfaces and filling spaces between adjacent ones of the posts. The dielectric layer has first and second opposed surfaces adjacent the first and second end surfaces. The dielectric layer has a coefficient of thermal expansion of less than 8 ppm/° C. The interconnection component is completed such that it has no interconnects between the first and second end surfaces of the posts that extend in a lateral direction. First and second pluralities of wettable contacts are adjacent the first and second opposed surfaces. The wettable contacts are usable to bond the interconnection component to a microelectronic element or a circuit panel.

    摘要翻译: 公开了一种用于制造互连部件的方法,包括形成远离参考表面延伸的多个金属柱。 每个柱形成具有一对相对的端面和在它们之间延伸的边缘表面。 形成接触边缘表面和相邻柱之间的填充空间的电介质层。 电介质层具有邻近第一和第二端面的第一和第二相对表面。 电介质层的热膨胀系数小于8ppm /℃。互连部件完成,使得它们在横向方向上延伸的柱的第一和第二端面之间没有互连。 第一和第二多个可湿接触部分邻近第一和第二相对表面。 可湿接触可用于将互连部件连接到微电子元件或电路板。