公开(公告)号：US09257330B2

公开(公告)日：2016-02-09

申请号：US14483578

申请日：2014-09-11

Applicant: Applied Materials, Inc.

Inventor： Amit Chatterjee ,  Geetika Bajaj ,  Pramit Manna ,  He Ren ,  Tapash Chakraborty ,  Srinivas D. Nemani ,  Mehul Naik ,  Robert Jan visser ,  Abhijit Basu Mallick

IPC: H01L21/68 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76834 ,  H01L21/76832 ,  H01L21/76835 ,  H01L21/76838 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of depositing thin, low dielectric constant layers that are effective diffusion barriers on metal interconnects of semiconductor circuits are described. A self-assembled monolayer (SAM) of molecules each having a head moiety and a tail moiety are deposited on the metal. The SAM molecules self-align, wherein the head moiety is formulated to selectively bond to the metal layer leaving the tail moiety disposed at a distal end of the molecule. A dielectric layer is subsequently deposited on the SAM, chemically bonding to the tail moiety of the SAM molecules.

Abstract translation: 描述了在半导体电路的金属互连上沉积有效扩散阻挡层的薄的低介电常数层的方法。 每个具有头部和尾部的分子的自组装单层（SAM）沉积在金属上。 SAM分子自对准，其中头部部分被配制成选择性地键合到金属层，离开设置在分子远端的尾部。 随后在SAM上沉积介电层，化学键合到SAM分子的尾部。

公开(公告)号：US20150206739A1

公开(公告)日：2015-07-23

申请号：US14161313

申请日：2014-01-22

Applicant: Applied Materials, Inc.

Inventor： Pramit MANNA ,  Abhijit Basu Mallick ,  Mukund Srinivasan

IPC: H01L21/027 ,  H01L21/311

CPC classification number: H01L21/0271 ,  C23C16/402 ,  C23C16/45553 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/0332 ,  H01L21/31133 ,  H01L21/31144 ,  Y10T428/24802

Abstract: Easily removable heteroatom-doped carbon-containing layers are deposited. The carbon-containing layers may be used as hardmasks. The heteroatom-doped carbon-containing hardmasks have high etch selectivity and density and also a low compressive stress, which will reduce or eliminate problems with wafer bow. Heteroatoms incorporated into the hardmask include sulfur, phosphorous, nitrogen, oxygen, and fluorine, all of which have low reactivity towards commonly used etchants. When sulfur is used as the heteroatom, the hardmask is easily removed, which simplifies the fabrication of NAND devices, DRAM devices, and other devices.

Abstract translation: 沉积易于除去的杂原子掺杂的含碳层。 含碳层可以用作硬掩模。 掺杂掺杂碳的硬掩模具有高蚀刻选择性和密度以及低压缩应力，这将减少或消除晶片弓的问题。 掺入硬掩模的杂原子包括硫，磷，氮，氧和氟，所有这些对于常用的蚀刻剂具有低反应性。 当使用硫作为杂原子时，硬掩模容易去除，这简化了NAND​​器件，DRAM器件和其它器件的制造。

公开(公告)号：US20140302688A1

公开(公告)日：2014-10-09

申请号：US13934863

申请日：2013-07-03

Applicant: Applied Materials, Inc.

Inventor： Brian Saxton Underwood ,  Abhijit Basu Mallick ,  Nitin K. Ingle

IPC: H01L21/02

CPC classification number: H01L21/02216 ,  C23C16/401 ,  C23C16/452 ,  C23C16/45565 ,  C23C16/45574 ,  H01L21/02126 ,  H01L21/02208 ,  H01L21/02274

Abstract: Methods are described for forming a dielectric layer on a patterned substrate. The methods may include combining a silicon-and-carbon-containing precursor and a radical oxygen precursor in a plasma free substrate processing region within a chemical vapor deposition chamber. The silicon-and-carbon-containing precursor and the radical oxygen precursor react in to deposit a flowable silicon-carbon-oxygen layer on the patterned substrate. The resulting film possesses a low wet etch rate ratio relative to thermal silicon oxide and other standard dielectrics.

Abstract translation: 描述了在图案化衬底上形成电介质层的方法。 所述方法可以包括在化学气相沉积室内的无等离子体衬底处理区域中组合含硅和碳的前体和自由基氧前体。 含硅和碳的前体和自由基氧前体反应以在图案化的衬底上沉积可流动的硅 - 碳 - 氧层。 所得膜相对于热氧化硅和其它标准电介质具有低的湿蚀刻速率比。

公开(公告)号：US20140073144A1

公开(公告)日：2014-03-13

申请号：US13668657

申请日：2012-11-05

Applicant: Applied Materials, Inc.

Inventor： Amit Chatterjee ,  Abhijit Basu Mallick ,  Nitin K. Ingle ,  Brian Underwood ,  Kiran V. Thadani ,  Xiaolin Chen ,  Abhishek Dube ,  Jingmei Liang

IPC: H01L21/02

CPC classification number: H01L21/02274 ,  C23C16/401 ,  C23C16/505 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02219

Abstract: A method of forming a dielectric layer is described. The method deposits a silicon-containing film by chemical vapor deposition using a local plasma. The silicon-containing film is flowable during deposition at low substrate temperature. A silicon precursor (e.g. a silylamine, higher order silane or halogenated silane) is delivered to the substrate processing region and excited in a local plasma. A second plasma vapor or gas is combined with the silicon precursor in the substrate processing region and may include ammonia, nitrogen (N2), argon, hydrogen (H2) and/or oxygen (O2). The equipment configurations disclosed herein in combination with these vapor/gas combinations have been found to result in flowable deposition at substrate temperatures below or about 200° C. when a local plasma is excited using relatively low power.

Abstract translation: 描述形成电介质层的方法。 该方法通过使用局部等离子体的化学气相沉积法沉积含硅膜。 含硅膜在低基板温度下沉积时是可流动的。 将硅前体（例如甲硅烷基胺，高级硅烷或卤代硅烷）输送到衬底处理区域并在局部等离子体中激发。 第二等离子体蒸气或气体与硅衬底加工区域中的硅前体结合，并且可包括氨，氮（N 2），氩，氢（H 2）和/或氧（O 2）。 已经发现本文公开的与这些蒸汽/气体组合组合的设备结构在基板温度低于或约200℃时导致可流动的沉积，当使用较低功率激发局部等离子体时。

公开(公告)号：US12173413B2

公开(公告)日：2024-12-24

申请号：US17473448

申请日：2021-09-13

Applicant: Applied Materials, Inc.

Inventor： Amrita B. Mullick ,  Pramit Manna ,  Abhijit Basu Mallick

IPC: C23C8/10 ,  C23C8/12 ,  C23C8/16 ,  C23C16/06 ,  H01L21/02 ,  H01L21/283 ,  H01L21/3105 ,  H01L21/762 ,  H01L21/768

Abstract: Methods of processing thin film by oxidation at high pressure are described. The methods are generally performed at pressures greater than 2 bar. The methods can be performed at lower temperatures and have shorter exposure times than similar methods performed at lower pressures. Some methods relate to oxidizing tungsten films to form self-aligned pillars.

公开(公告)号：US20240420952A1

公开(公告)日：2024-12-19

申请号：US18209700

申请日：2023-06-14

Applicant: Applied Materials, Inc.

Inventor： Bhaskar Soman ,  Supriya Ghosh ,  Yanze Wu ,  Zeqing Shen ,  Susmit Singha Roy ,  Abhijit Basu Mallick

IPC: H01L21/02 ,  H01L21/3205 ,  H01L21/321

Abstract: Exemplary methods of semiconductor processing may include iteratively repeating a deposition cycle several times on a substrate disposed within a processing region of a semiconductor processing chamber. Each deposition cycle may include depositing a silicon-containing material on the substrate and exposing the silicon-containing material to a first oxygen plasma to convert the silicon-containing material to a silicon-and-oxygen-containing material. After the iterative repeating of the deposition cycle, the method may include performing a densification operation by exposing the silicon-and-oxygen-containing material to a second oxygen plasma to produce a densified silicon-and-oxygen-containing material where the quality of the densified silicon-and-oxygen-containing material is greater than the silicon-and-oxygen-containing material. The method may further include iteratively repeating the iteratively repeated deposition cycles and the densification operation several times.

公开(公告)号：US20240266185A1

公开(公告)日：2024-08-08

申请号：US18106697

申请日：2023-02-07

Applicant: Applied Materials, Inc.

Inventor： Han Wang ,  Yu Yang ,  Jing Zhang ,  Aykut Aydin ,  Guoqing Li ,  Guangyan Zhong ,  Rui Cheng ,  Gene H. Lee ,  Srinivas Guggilla ,  Sinae Heo ,  Eswaranand Venkatasubramanian ,  Abhijit Basu Mallick ,  Karthik Janakiraman

IPC: H01L21/311 ,  H01L21/033

CPC classification number: H01L21/31144 ,  H01L21/0332

Abstract: Exemplary semiconductor processing methods may include depositing a metal-doped boron-containing material on a substrate disposed within a processing region of a semiconductor processing chamber. The metal-doped boron-containing material may include a metal dopant comprising tungsten. The substrate may include a silicon-containing material. The methods may include depositing one or more additional materials over the metal-doped boron-containing material. The one or more additional materials may include a patterned photoresist material. The methods may include transferring a pattern from the patterned photoresist material to the metal-doped boron-containing material. The methods may include etching the metal-doped boron-containing material with a chlorine-containing precursor. The methods may include etching the silicon-containing material with a fluorine-containing precursor. The metal dopant may enhance an etch rate of the silicon-containing material. The methods may include removing the metal-doped boron-containing material from the substrate with a halogen-containing precursor.

公开(公告)号：US12054827B2

公开(公告)日：2024-08-06

申请号：US17041403

申请日：2019-04-01

Applicant: Applied Materials, Inc.

Inventor： Shishi Jiang ,  Pramit Manna ,  Abhijit Basu Mallick ,  Suresh Chand Seth ,  Srinivas D. Nemani

IPC: C23C16/505 ,  C23C16/24 ,  C23C16/56 ,  H01J37/32 ,  H01L21/3205 ,  H01L21/321

CPC classification number: C23C16/505 ,  C23C16/24 ,  C23C16/56 ,  H01J37/32091 ,  H01J37/3244 ,  H01J37/32724 ,  H01L21/32055 ,  H01L21/321 ,  H01J2237/3321

Abstract: Embodiments herein provide methods of plasma treating an amorphous silicon layer deposited using a flowable chemical vapor deposition (FCVD) process. In one embodiment, a method of processing a substrate includes plasma treating an amorphous silicon layer by flowing a substantially silicon-free hydrogen treatment gas into a processing volume of a processing chamber, the processing volume having the substrate disposed on a substrate support therein, forming a treatment plasma of the substantially silicon-free hydrogen treatment gas, and exposing the substrate having the amorphous silicon layer deposited on a surface thereof to the treatment plasma. Herein, the amorphous silicon layer is deposited using an FCVD process. The FCVD process includes positioning the substrate on the substrate support, flowing a processing gas into the processing volume, forming a deposition plasma of the processing gas, exposing the surface of the substrate to the deposition plasma, and depositing the amorphous silicon layer on the surface of the substrate.

公开(公告)号：US11978635B2

公开(公告)日：2024-05-07

申请号：US17197871

申请日：2021-03-10

Applicant: Applied Materials, Inc.

Inventor： Swaminathan Srinivasan ,  Abhijit Basu Mallick ,  Nicolas Breil

IPC: H01L21/285 ,  C23C14/04 ,  C23C16/04 ,  H01L21/02 ,  H01L21/28 ,  H01L21/3105 ,  H01L21/768 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/28562 ,  C23C14/042 ,  C23C16/042 ,  H01L21/02208 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/3105 ,  H01L21/76864 ,  H01L21/76889 ,  H01L29/66795 ,  H01L29/7851

Abstract: Methods for forming silicide films are disclosed. Methods of selectively depositing metal-containing films on silicon surfaces which are further processed to form silicide films are disclosed. Specific embodiments of the disclosure relate to the formation of silicide films on FinFET structures without the formation of a metal layer on the dielectric.

公开(公告)号：US11972940B2

公开(公告)日：2024-04-30

申请号：US17722648

申请日：2022-04-18

Applicant: Applied Materials, Inc.

Inventor： Xinke Wang ,  Bhaskar Jyoti Bhuyan ,  Zeqing Shen ,  Susmit Singha Roy ,  Abhijit Basu Mallick ,  Jiecong Tang ,  John Sudijono ,  Mark Saly

IPC: H01L21/02 ,  C23C16/04 ,  C23C16/26 ,  C23C16/56

CPC classification number: H01L21/02118 ,  C23C16/04 ,  C23C16/26 ,  C23C16/56 ,  H01L21/02205 ,  H01L21/0228 ,  H01L21/02304

Abstract: Methods of selectively depositing a carbon-containing layer are described. Exemplary processing methods may include flowing a first precursor over a substrate comprising a metal surface and a non-metal surface to form a first portion of an initial carbon-containing film on the metal surface. The methods may include removing a first precursor effluent from the substrate. A second precursor may then be flowed over the substrate to react with the first portion of the initial carbon-containing layer. The methods may include removing a second precursor effluent from the substrate. The methods may include pre-treating the metal surface of the substrate to form a metal oxide surface on the metal surface.