公开(公告)号：US20150249061A1

公开(公告)日：2015-09-03

申请号：US14715484

申请日：2015-05-18

Applicant: Broadcom Corporation

Inventor： Sam Ziqun ZHAO ,  Rezaur Rahman KHAN

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L24/17 ,  H01L21/4853 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/105 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29007 ,  H01L2224/29012 ,  H01L2224/29014 ,  H01L2224/29015 ,  H01L2224/29035 ,  H01L2224/29036 ,  H01L2224/29078 ,  H01L2224/2919 ,  H01L2224/3012 ,  H01L2224/30131 ,  H01L2224/30141 ,  H01L2224/30179 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/92125 ,  H01L2224/9221 ,  H01L2224/92242 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An integrated circuit (IC) package includes an IC die having a first surface and a second surface opposite of the first surface. The IC package includes first contact members coupled to the second surface of the IC die. The IC package includes a bottom substrate having a first surface and a second surface opposite of the first surface, where the first surface of the bottom substrate is coupled to the second surface of the IC die via the first contact members. The IC package includes an interposer substrate coupled to the first surface of the IC die via an adhesive material, where the adhesive material is disposed on at least a surface of the interposer substrate. The IC package includes second contact members coupled along a periphery of the interposer substrate, where the interposer substrate is coupled to the first surface of the bottom substrate via the second contact members.

公开(公告)号：US20150235992A1

公开(公告)日：2015-08-20

申请号：US14701388

申请日：2015-04-30

Applicant: BROADCOM CORPORATION

Inventor： Sampath K. KARIKALAN ,  Sam Ziqun ZHAO ,  Kevin Kunzhong HU ,  Rezaur Rahman KHAN ,  Pieter VORENKAMP ,  Xiangdong CHEN

IPC: H01L25/065 ,  H01L23/00

CPC classification number: H01L25/0655 ,  H01L23/48 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/538 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/80 ,  H01L24/82 ,  H01L25/0652 ,  H01L2224/0401 ,  H01L2224/05541 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/152 ,  H01L2924/1532 ,  H01L2924/30105 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: There are disclosed herein various implementations of semiconductor packages including a bridge interposer. One exemplary implementation includes a first active die having a first portion situated over the bridge interposer, and a second portion not situated over the bridge interposer. The semiconductor package also includes a second active die having a first portion situated over the bridge interposer, and a second portion not situated over the bridge interposer. The second portion of the first active die and the second portion of the second active die include solder balls mounted on a package substrate, and are configured to communicate electrical signals to the package substrate utilizing the solder balls and without utilizing through-semiconductor vias (TSVs).

Abstract translation: 这里公开了包括桥插入器的半导体封装的各种实施方式。 一个示例性实现包括具有位于桥插入件上方的第一部分的第一有源管芯和不位于桥插入件上的第二部分。 半导体封装还包括具有位于桥插入件上方的第一部分的第二有源管芯和不位于桥插入件上的第二部分。 第一有源裸片的第二部分和第二有源裸片的第二部分包括安装在封装衬底上的焊球，并且被配置为使用焊球将电信号传送到封装衬底，并且不使用贯穿半导体通孔（TSV ）。

公开(公告)号：US20150200149A1

公开(公告)日：2015-07-16

申请号：US14668276

申请日：2015-03-25

Applicant: Broadcom Corporation

Inventor： Sam Ziqun ZHAO ,  Rezaur Rahman KHAN

IPC: H01L23/367 ,  H01L21/66 ,  H01L21/56 ,  H01L23/00 ,  H01L23/433 ,  H01L23/31

CPC classification number: H01L23/3675 ,  H01L21/565 ,  H01L22/10 ,  H01L23/315 ,  H01L23/367 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/17 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/16113 ,  H01L2224/16245 ,  H01L2224/17519 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48157 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/81897 ,  H01L2224/83101 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: Methods and apparatuses for improved integrated circuit (IC) packages are described herein. In an aspect, an IC device package includes an IC die having a contact pad, where the contact pad is located on a hotspot of the IC die. The hotspot is thermally coupled to a thermal interconnect member. In an aspect, the package is encapsulated in a mold compound. In a further aspect, a heat spreader is attached to the mold compound, and is thermally coupled to the thermal interconnect member. In another aspect, a thermal interconnect member thermally is coupled between the heat spreader and the substrate.

Abstract translation: 本文描述了用于改进的集成电路（IC）封装的方法和装置。 一方面，IC器件封装包括具有接触焊盘的IC管芯，其中接触焊盘位于IC管芯的热点上。 热点热耦合到热互连构件。 在一方面，包装被包封在模具化合物中。 在另一方面，散热器附接到模具化合物，并且热耦合到热互连构件。 另一方面，热互连构件热耦合在散热器和衬底之间。

公开(公告)号：US20150137343A1

公开(公告)日：2015-05-21

申请号：US14542351

申请日：2014-11-14

Applicant: Broadcom Corporation

Inventor： Reza-ur Rahman KHAN ,  Sam Ziqun ZHAO ,  Brent BACHER

IPC: H01L23/34 ,  H01L23/538 ,  H01L23/00

CPC classification number: H01L23/34 ,  H01L23/3677 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5384 ,  H01L23/562 ,  H01L24/14 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48237 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/0665

Abstract: Methods of assembling a ball grid array (BGA) package is provided. One method includes providing a tape substrate that has a first surface and a second surface, attaching a first surface of a stiffener to the first substrate surface, mounting an IC die to the second stiffener surface, mounting a heat spreader to the IC die, and attaching a plurality of solder balls to the second substrate surface.

Abstract translation: 提供了组装球栅阵列（BGA）封装的方法。 一种方法包括提供具有第一表面和第二表面的带基底，将加强件的第一表面附接到第一基底表面，将IC管芯安装到第二加强件表面，将散热器安装到IC管芯，以及 将多个焊球附接到第二基板表面。

公开(公告)号：US20140235183A1

公开(公告)日：2014-08-21

申请号：US14260872

申请日：2014-04-24

Applicant: Broadcom Corporation

Inventor： Sam Ziqun ZHAO ,  Rezaur Rahman Khan

IPC: H01L23/34 ,  H04B1/40 ,  H01L23/50

CPC classification number: H01L23/34 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/50 ,  H01L23/552 ,  H01L24/73 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/3511 ,  H04B1/40 ,  H04B5/0037 ,  H04B5/0068 ,  H04B7/0617 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Embodiments of provide an integrated circuit (IC) device. The IC device can include a substrate having first and second opposing surfaces, an IC die electrically coupled to the first surface of the substrate, a plurality of contact members coupled to the first surface of the substrate, and an interposer. The interposer can include a plurality of contact elements located on a first surface thereof, each conductive element being coupled to a respective one of the plurality of contact members, and an antenna formed using a conductive layer of the interposer, the antenna being electrically coupled to the IC die through at least one of the plurality of contact elements and at least one of the plurality of contact members.

Abstract translation: 提供集成电路（IC）装置的实施例。 IC器件可以包括具有第一和第二相对表面的衬底，电连接到衬底的第一表面的IC管芯，耦合到衬底的第一表面的多个接触构件和插入器。 插入器可以包括位于其第一表面上的多个接触元件，每个导电元件耦合到所述多个接触构件中的相应一个，以及使用所述插入器的导电层形成的天线，所述天线电耦合到 所述IC通过所述多个接触元件中的至少一个和所述多个接触构件中的至少一个接合。

公开(公告)号：US20170365565A1

公开(公告)日：2017-12-21

申请号：US15198991

申请日：2016-06-30

Applicant: Broadcom Corporation

Inventor： Sam Ziqun ZHAO ,  Rezaur Rahman Khan

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L21/60

CPC classification number: H01L21/4853 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L2021/60135 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/24011 ,  H01L2224/24101 ,  H01L2224/24137 ,  H01L2224/25171 ,  H01L2224/73267 ,  H01L2224/96 ,  H01L2924/18161 ,  H01L2224/82 ,  H01L2224/11 ,  H01L2924/014

Abstract: An integrated circuit (IC) package is disclosed that contains high density interconnects to connect multiple dies. The IC package includes an encapsulated layer, a first dielectric layer, and a second dielectric layer. The encapsulated layer forms the base of the IC package and includes the multiple dies. The first dielectric layer positioned between the encapsulated layer and the second layer. The first dielectric layer includes vias to connect to the input/ouput pads of active surfaces of the multiple dies. The second dielectric layer includes interconnect layers where at least one of the interconnect layers forms an electrical path to connect at least two of the multiple dies together. According to embodiments of the present disclosure, the IC package enables a high manufacturing yield due to large tolerances allowed for selection of dies. Embodiments of the present disclosure also increase an amount of input/output interconnection between multiple dies in the IC package. Embodiments of the present disclosure further enable lower manufacturing costs because of the use of mature reconstituted dies and redistribution layer technologies and the lack of a need for an interposer to connect multiple dies.

公开(公告)号：US20170011993A1

公开(公告)日：2017-01-12

申请号：US15205991

申请日：2016-07-08

Applicant: Broadcom Corporation

Inventor： Sam Ziqun ZHAO ,  Sam Komarapalayam Karikalan ,  Edward Law ,  Rezaur Rahman Khan ,  Pieter Vorenkamp

IPC: H01L23/498 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49822 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/81005 ,  H01L2224/97 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2224/81

Abstract: Semiconductor devices and manufacturing methods are provided for using a Recon interposer that provides a high density interface between the active semiconductor die and the semiconductor substrate and also provides the pitch fan-out. For example, a circuit assembly includes a silicon pad layer including a plurality of metal pads, each metal pad configured to receive a corresponding bump of a plurality of bumps. The circuit assembly further includes an oxide layer disposed on the silicon pad layer and an interposer dielectric layer disposed on the oxide layer. The interposer dielectric layer includes a plurality of routing traces that connect a top surface of the redistribution layer to a bottom surface of the interposer dielectric layer. The circuit assembly further includes an integrated circuit (IC) die attached to the plurality of routing traces at the top surface of the interposer dielectric layer using a plurality of IC bumps and an encapsulating material encapsulating at least a portion of the silicon pad layer, the oxide layer, the interposer dielectric layer, and the IC die to provide structural support for the circuit assembly.

Abstract translation: 提供半导体器件和制造方法，用于使用在活性半导体管芯和半导体衬底之间提供高密度界面的Recon插入件，并且还提供间距扇出。 例如，电路组件包括包括多个金属焊盘的硅焊盘层，每个金属焊盘被配置为接收多个凸块的相应凸块。 电路组件还包括设置在硅衬垫层上的氧化物层和设置在氧化物层上的介入层电介质层。 中介层介电层包括将再分布层的顶表面连接到插入层介电层的底表面的多个布线迹线。 电路组件还包括使用多个IC凸块和封装硅衬垫层的至少一部分的封装材料，在内插器电介质层的顶表面处附接到多个布线迹线的集成电路（IC）裸片， 氧化层，中介层介电层和IC芯片，为电路组件提供结构支撑。

公开(公告)号：US20170003339A1

公开(公告)日：2017-01-05

申请号：US14789624

申请日：2015-07-01

Applicant: Broadcom Corporation

Inventor： Sam Ziqun ZHAO

IPC: G01R31/26

CPC classification number: G01R31/2628 ,  G01R31/2872 ,  G01R31/3008 ,  G01R31/3012

Abstract: An apparatus and methods are provided that more accurately detect the onset of thermal runaway in a device and timely control it. According to one embodiment, changes in stand-by current and temperature of a transistor device are measured and are used to be compared to some thresholds to trigger the device to respond before the onset thermal runaway. According to another embodiment, stand-by current is measured and is compared to some thresholds to trigger the device to respond before the onset thermal runaway.

Abstract translation: 提供了一种更准确地检测设备中热失控的发生并及时控制的装置和方法。 根据一个实施例，测量晶体管器件的待机电流和温度的变化，并将其用于与某些阈值进行比较，以触发器件在发生热失控之前进行响应。 根据另一个实施例，测量备用电流并将其与某些阈值进行比较，以触发器件在发生热失控之前作出响应。

公开(公告)号：US20160148890A1

公开(公告)日：2016-05-26

申请号：US15012879

申请日：2016-02-02

Applicant: Broadcom Corporation

Inventor： Rezaur Rahman KHAN ,  Sam Ziqun ZHAO

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/50 ,  H01L23/42

CPC classification number: H01L24/16 ,  H01L21/50 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/42 ,  H01L23/4334 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2021/60262 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method, system, and apparatus for improved IC device packaging is described. In an aspect, an (IC) device package includes an IC die having at one or more contact pads, each contact pad located at a corresponding hotspot on a surface of th28e IC die. The package also includes a thermally conductive interposer which is thermally coupled to the IC die at the contact pads. In another aspect, an underfill material fills a space between the IC die and the interposer. The interposer may also be electrically coupled to the IC die. In an aspect, the interposer and the IC die are coupled through thermal interconnects or “nodules.”

Abstract translation: 描述了用于改进IC器件封装的方法，系统和装置。 在一方面，（IC）器件封装包括具有在一个或多个接触焊盘处的IC管芯，每个接触焊盘位于th28e IC管芯的表面上的相应热点处。 封装还包括热接触插入件，其在接触焊盘处热耦合到IC管芯。 在另一方面，底部填充材料填充IC管芯和插入件之间的空间。 插入器也可以电耦合到IC管芯。 在一方面，插入器和IC管芯通过热互连或“结节”耦合。

公开(公告)号：US20150206821A1

公开(公告)日：2015-07-23

申请号：US14674769

申请日：2015-03-31

Applicant: Broadcom Corporation

Inventor： Sam Ziqun ZHAO ,  Arpit Mittal ,  Rezaur Rahman Khan

IPC: H01L23/373 ,  F28F21/02 ,  F28F21/08 ,  H01L21/48

CPC classification number: H01L23/373 ,  B82Y10/00 ,  B82Y99/00 ,  F28F21/02 ,  F28F21/081 ,  H01L21/02112 ,  H01L21/4882 ,  H01L23/3735 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L29/0669 ,  H01L29/0676 ,  H01L51/0048 ,  H01L2223/64 ,  H01L2224/16225 ,  H01L2224/2908 ,  H01L2224/29193 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83192 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/167 ,  H01L2924/351 ,  H05K1/0203 ,  Y10S977/742 ,  H01L2924/00

Abstract: In an embodiment, a thermal interface material (TIM) is provided. The TIM includes first and a second layers of a first transition metal, and a third layer including a plurality of carbon nanotubes supported in a flexible polymer matrix and a second transition metal coupled to sidewalls of carbon nanotubes. The first and second metal layers are in contact with first and second ends of carbon nanotube. The TIM further includes fourth and fifth layers of an alloy material coupled to the first and second metal layers, respectively. The carbon nanotube based TIM including the layers with transition metal allow improved heat transfer from an integrated circuit die to a heat spreader.

Abstract translation: 在一个实施例中，提供了热界面材料（TIM）。 TIM包括第一和第二层第一过渡金属，第三层包括支撑在柔性聚合物基体中的多个碳纳米管和耦合到碳纳米管的侧壁的第二过渡金属。 第一和第二金属层与碳纳米管的第一和第二端接触。 TIM还包括分别耦合到第一和第二金属层的合金材料的第四层和第五层。 包括具有过渡金属的层的基于碳纳米管的TIM允许改进从集成电路管芯到散热器的热传递。