公开(公告)号：US20060097379A1

公开(公告)日：2006-05-11

申请号：US11268702

申请日：2005-11-08

Applicant: Chung-Cheng Wang

Inventor： Chung-Cheng Wang

IPC: H01L23/053 ,  H01L23/12

CPC classification number: H01L23/49805 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Substrate for electrical devices and methods of manufacturing such substrate are disclosed. An embodiment for the substrate comprised of an insulator and a plurality of conductive elements, wherein the conductive elements embedded in the insulator, and two surfaces of the conductive element exposed to two surfaces of the insulator for electrical connection respectively, meanwhile a portion of conductive element may protrude the insulator, in this manner, solder balls are not needed, moreover the conductive element of substrate may further include either an extending portion or a protruding portion, and the present invention may be capable of affording a thinner electrical device thickness, enhanced reliability, and a decreased cost in production.

Abstract translation: 公开了用于电气装置的基板和制造这种基板的方法。 用于由绝缘体和多个导电元件构成的衬底的实施例，其中嵌入绝缘体中的导电元件和暴露于绝缘体的两个表面的两个表面分别电连接，同时导电元件的一部分 可以以这种方式突出绝缘体，因此不需要焊球，此外，衬底的导电元件还可以包括延伸部分或突出部分，并且本发明可以提供更薄的电子器件厚度，增强的可靠性 ，生产成本降低。

公开(公告)号：US20050157819A1

公开(公告)日：2005-07-21

申请号：US11037912

申请日：2005-01-18

Applicant: Chung-Cheng Wang ,  John-San Yang ,  Yu-Hua Liu

Inventor： Chung-Cheng Wang ,  John-San Yang ,  Yu-Hua Liu

IPC: H04L27/36 ,  H04L5/12

CPC classification number: H04L27/364

Abstract: A receiver comprising an in-phase channel circuit, a quadrature channel circuit, and a gain imbalance calibration circuit comprising a first circuit and a second circuit. The first circuit provides testing signals to the in-phase channel circuit and the quadrature channel circuit. Test resultant signals output from the in-phase channel circuit and the quadrature channel circuit are input to the second circuit. The second circuit calibrates the gain of baseband amplifiers of the in-phase channel and the quadrature channel circuit according to the offset between the test resultant signals, thereby enabling the test resultant signal of the in-phase channel circuit to be substantially equal to the test resultant signal of the quadrature channel circuit.

Abstract translation: 一种接收机，包括同相信道电路，正交信道电路和包括第一电路和第二电路的增益不平衡校准电路。 第一个电路向同相通道电路和正交通道电路提供测试信号。 测试从同相通道电路和正交通道电路输出的合成信号输入到第二电路。 第二电路根据测试结果信号之间的偏移来校准同相信道和正交信道电路的基带放大器的增益，从而使得同相信道电路的测试结果信号基本上等于测试 正交信道电路的合成信号。

公开(公告)号：US20240299704A1

公开(公告)日：2024-09-12

申请号：US18666162

申请日：2024-05-16

Applicant: Chung-Cheng Wang ,  Ming-Chien Chiu

Inventor： Chung-Cheng Wang ,  Yung-Ping Wang ,  Yi-Yuan Chen ,  Chia-Ming Hsu

IPC: A61M25/01 ,  A61M25/00 ,  A61M25/02

CPC classification number: A61M25/0113 ,  A61M2025/0001 ,  A61M25/0105 ,  A61M2025/026 ,  A61M2205/3327 ,  A61M2205/583 ,  A61M2205/587 ,  A61M2205/8206 ,  A61M2210/1096 ,  A61M2210/167

Abstract: A urinary catheter conveying device includes a sleeve member, a conveying assembly and a controller. The sleeve member is for sleeving onto a glans of a penis and has a guiding hole to be registered with an external urethral orifice of the glans. The conveying assembly includes a casing removably mounted to the sleeve member, and a conveying mechanism for advancing the urinary catheter to the guiding hole such that the urinary catheter is inserted into the external urethral orifice. The controller controls the conveying mechanism to advance the urinary catheter to the guiding hole. A urinary catheterization system and a method of using the urinary catheterization system are also disclosed.

公开(公告)号：US09170496B2

公开(公告)日：2015-10-27

申请号：US13365660

申请日：2012-02-03

Applicant: Chi-Hua Fu ,  Chung-Cheng Wang

Inventor： Chi-Hua Fu ,  Chung-Cheng Wang

IPC: B08B3/02 ,  B08B3/00 ,  B08B7/00 ,  B08B7/04 ,  G03F7/16 ,  G03F7/09 ,  G03F7/095

CPC classification number: G03F7/16 ,  B08B3/00 ,  B08B3/02 ,  B08B7/00 ,  B08B7/04 ,  G03F7/091 ,  G03F7/094 ,  G03F7/095

Abstract: A method for pre-treating a wafer surface before applying a material thereon. The method includes positioning the wafer on a rotating apparatus. The wafer is rotated at a first rotational speed between about 50 revolutions per minute (rpm) and about 300 rpm and for a period of about 1 second to about 10 seconds while dispensing a cleaning solvent on the wafer surface. The wafer is rotated at a second rotational speed between about 500 rpm and about 1,500 rpm for a period of about 1 second to about 10 seconds. The wafer is then rotated at a third rotational speed between about 50 rpm and about 300 rpm for a period of about 1 second to about 5 seconds. With the wafer rotating at the third rotational speed, a solvent-containing material is thereafter deposited on the surface of the wafer.

Abstract translation: 一种在施加材料之前预处理晶片表面的方法。 该方法包括将晶片定位在旋转装置上。 以约50转/分钟（rpm）和约300rpm之间的第一旋转速度旋转晶片，并且在晶片表面上分配清洁溶剂约1秒至约10秒的时间。 晶片以约500rpm至约1500rpm之间的第二转速旋转约1秒至约10秒的时间。 然后将晶片以约50rpm至约300rpm之间的第三转速旋转约1秒至约5秒的时间。 随着晶片以第三转速旋转，此后在晶片的表面上沉积含溶剂的材料。

公开(公告)号：US07786567B2

公开(公告)日：2010-08-31

申请号：US11268702

申请日：2005-11-08

Applicant: Chung-Cheng Wang

Inventor： Chung-Cheng Wang

IPC: H01L23/48 ,  H01L21/48

CPC classification number: H01L23/49805 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Substrate for electrical devices and methods of manufacturing such substrate are disclosed. An embodiment for the substrate comprised of an insulator and a plurality of conductive elements, wherein the conductive elements embedded in the insulator, and two surfaces of the conductive element exposed to two surfaces of the insulator for electrical connection respectively, meanwhile a portion of conductive element may protrude the insulator, in this manner, solder balls are not needed, moreover the conductive element of substrate may further include either an extending portion or a protruding portion, and the present invention may be capable of affording a thinner electrical device thickness, enhanced reliability, and a decreased cost in production.

Abstract translation: 公开了用于电气装置的基板和制造这种基板的方法。 用于由绝缘体和多个导电元件构成的衬底的实施例，其中嵌入绝缘体中的导电元件和暴露于绝缘体的两个表面的两个表面分别电连接，同时导电元件的一部分 可以以这种方式突出绝缘体，因此不需要焊球，此外，衬底的导电元件还可以包括延伸部分或突出部分，并且本发明可以提供更薄的电子器件厚度，增强的可靠性 ，生产成本降低。

公开(公告)号：US20070001770A1

公开(公告)日：2007-01-04

申请号：US11455730

申请日：2006-06-20

Applicant: Chung-Cheng Wang ,  Chao-Shi Chuang ,  Yi-Chuan Liu

Inventor： Chung-Cheng Wang ,  Chao-Shi Chuang ,  Yi-Chuan Liu

IPC: H03L7/00

CPC classification number: H03L7/113 ,  H03L7/1972

Abstract: A PLL is provided, comprising a first divider, a PFD, a loop filter, a VCO, a second divider and a controller. The first divider receives a reference signal and divides the reference signal by R to obtain a divided signal. The PFD compares the divided signal and a feedback signal to generate a compared The VCO selects one of a plurality of operating curves for oscillation based on a selection signal, and generates an oscillation signal based on an operating voltage generated by signal the loop filter. The second divider divides the oscillation signal by N to obtain the feedback signal. The controller operates in an initial mode to recursively determine the selection signal by calculating differences of the feedback signal and the divided signal. When the selection signal converges to stable, the PLL switches to a normal mode to operate on the corresponding operating curve.

Abstract translation: 提供PLL，包括第一分频器，PFD，环路滤波器，VCO，第二分频器和控制器。 第一分频器接收参考信号并将参考信号除以R以获得分频信号。 PFD比较分频信号和反馈信号以产生比较VCO基于选择信号选择多个用于振荡的操作曲线中的一个，并且基于由环路滤波器的信号产生的工作电压产生振荡信号。 第二分频器将振荡信号除以N以获得反馈信号。 控制器以初始模式工作，通过计算反馈信号和分频信号的差异递归地确定选择信号。 当选择信号收敛到稳定时，PLL切换到正常模式，以对相应的工作曲线进行操作。

公开(公告)号：US20060038278A1

公开(公告)日：2006-02-23

申请号：US11199273

申请日：2005-08-09

Applicant: Chung-Cheng Wang

Inventor： Chung-Cheng Wang

IPC: H01L23/48

CPC classification number: H01L24/85 ,  H01L23/13 ,  H01L23/36 ,  H01L23/49833 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/49433 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/351 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

Abstract: A submember for electrical device is disclosed. Said submember is mounted on a chip of electrical device. An embodiment for the submember comprised of an insulator and a plurality of conductive elements, wherein the conductive elements embedded in the insulator and a portion of conductive element exposed to the insulator for electrical connection, then (i). the reliability of submember is enhanced; (ii).the material of insulator enables to be saved; and (iii).the thickness of submember is thinner and the heat dissipation of chip enhanced; moreover, a portion of the conductive element may be protruding the insulator for avoiding a short-circuited problem of conductive wire, moreover, the conductive element may be staircase-shaped, then, not only the reliability of submember is enhanced, but the short circuit problem of conductive wire is also avoided; the conductive element may further include an extending portion, furthermore, the conductive element may be placed in a cavity as required.

Abstract translation: 公开了一种用于电气设备的子部件。 所述子部件安装在电气设备的芯片上。 一种由绝缘体和多个导电元件组成的子元件的实施例，其中嵌入绝缘体中的导电元件和暴露于绝缘体的导电元件的一部分用于电连接，然后（i）。 次级成员的可靠性得到提升; （ii）绝缘材料能够节省; 和（iii），子部件的厚度较薄，芯片的散热增强; 此外，导电元件的一部分可以突出绝缘体，以避免导线的短路问题，此外，导电元件可以是阶梯形的，因此不仅可以提高子元件的可靠性，而且短路 也避免了导线问题; 导电元件还可以包括延伸部分，此外，导电元件可以根据需要放置在空腔中。

公开(公告)号：US20050137816A1

公开(公告)日：2005-06-23

申请号：US10707519

申请日：2003-12-19

Applicant: Chao-Shi Chuang ,  Chung-Cheng Wang ,  Wen-Shih Lu

Inventor： Chao-Shi Chuang ,  Chung-Cheng Wang ,  Wen-Shih Lu

IPC: G06F19/00 ,  H03L7/08 ,  H03L7/089 ,  H03L7/099 ,  H03L7/113 ,  H03L7/18 ,  H03L7/199

CPC classification number: H03L7/113 ,  H03L7/0891 ,  H03L7/099 ,  H03L7/199

Abstract: A PLL includes a loop filter for accumulating charge to generate a loop-filter voltage and a VCO having a plurality of frequency ranges. The VCO receives the loop-filter voltage and generates an output signal having a frequency according to the loop-filter voltage and a currently selected VCO frequency range. During PLL calibration, the loop-filter is connected to a constant voltage source; the PLL feedback signal is synchronized with the reference signal; a linear search, a binary search, or a memory lookup is used to find a first and a second VCO frequency range; first and second time durations are measured for the time durations between the second rising edges of the reference signal and the PLL feedback signal for the two VCO frequency ranges, and the optimal VCO frequency range is determined by setting the VCO frequency range to be the VCO frequency range having the shortest measured time duration.

Abstract translation: PLL包括用于累积电荷以产生环路滤波器电压的环路滤波器和具有多个频率范围的VCO。 VCO接收环路滤波器电压，并产生具有根据环路滤波器电压和当前选择的VCO频率范围的频率的输出信号。 在PLL校准期间，环路滤波器连接到恒定电压源; PLL反馈信号与参考信号同步; 使用线性搜索，二进制搜索或存储器查找来找到第一和第二VCO频率范围; 对于参考信号的第二上升沿和两个VCO频率范围的PLL反馈信号之间的持续时间测量第一和第二持续时间，并且通过将VCO频率范围设置为VCO来确定最佳VCO频率范围 频率范围具有最短的测量持续时间。

公开(公告)号：US20050104205A1

公开(公告)日：2005-05-19

申请号：US10944808

申请日：2004-09-21

Applicant: Chung-Cheng Wang

Inventor： Chung-Cheng Wang

IPC: H01L21/68 ,  H01L23/24 ,  H01L23/31 ,  H01L23/433 ,  H01L23/495 ,  H01L23/498 ,  H01L25/10 ,  H05K1/18 ,  H05K3/06 ,  H05K3/40 ,  H01L23/04

CPC classification number: H01L21/6835 ,  H01L23/24 ,  H01L23/3114 ,  H01L23/4334 ,  H01L23/4951 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L24/94 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19105 ,  H01L2924/3511 ,  H05K1/183 ,  H05K3/064 ,  H05K3/403 ,  H05K2201/09036 ,  H05K2201/09645 ,  H05K2201/09845 ,  H05K2203/0369 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Substrate for electrical devices and methods of manufacturing such substrate are disclosed. An embodiment for the substrate comprised of an insulator and a plurality of conductive elements, wherein the insulator having a recess. The conductive elements embedded in the insulator. The conductive elements extend from the insulator surface to the recess. There are two portions of the conductive elements for electrical connection respectively, wherein a portion of conductive element may protrude the insulator surface for electrical connection. In this manner, solder balls are not needed. Moreover, the substrate of the present invention may also comprise an adhesive mean, which is between the conductive elements and the insulator. In addition, the substrate may further comprise a submember such as a chip, heat spreader etc., and the present invention may be capable of affording a thinner electrical device thickness, enhanced reliability, and a decreased cost in production.

Abstract translation: 公开了用于电气装置的基板和制造这种基板的方法。 用于由绝缘体和多个导电元件组成的衬底的实施例，其中绝缘体具有凹部。 绝缘子中嵌入的导电元件。 导电元件从绝缘体表面延伸到凹槽。 用于电连接的导电元件分为两部分，其中导电元件的一部分可以突出绝缘体表面用于电连接。 以这种方式，不需要焊球。 此外，本发明的基底还可以包括位于导电元件和绝缘体之间的粘合剂。 此外，基板还可以包括诸如芯片，散热器等的子部件，并且本发明可以提供更薄的电气设备厚度，增强的可靠性和降低的生产成本。

公开(公告)号：US07994633B2

公开(公告)日：2011-08-09

申请号：US12852458

申请日：2010-08-07

Applicant: Chung-Cheng Wang

Inventor： Chung-Cheng Wang

IPC: H01L23/48 ,  H01L21/48

CPC classification number: H01L23/49805 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Substrate for electrical devices is disclosed. An embodiment for the substrate comprised of an insulator, a conductive element(s) and a conductive material(s), wherein the conductive element embedded in the insulator, and two surfaces of the conductive element exposed to two surfaces of the insulator for electrical connection respectively, wherein the upper surface of conductive element is below the upper surface of insulator and is plated by the conductive material, meanwhile the conductive element include a protruding portion which is protruded the insulator, in this manner, solder balls are not needed, moreover the conductive element can further include an extending portion; the present invention may be capable of affording a thinner electrical device thickness and enhanced reliability.

Abstract translation: 公开了用于电气设备的基板。 用于由绝缘体，导电元件和导电材料组成的衬底的实施例，其中嵌入绝缘体中的导电元件和暴露于绝缘体的两个表面的两个表面用于电连接 其中导电元件的上表面在绝缘体的上表面下方并被导电材料电镀，同时导电元件包括​​突出绝缘体的突出部分，以这种方式不需要焊球，此外， 导电元件还可以包括延伸部分; 本发明可以提供更薄的电气装置厚度和增强的可靠性。