Silicon Carrier Including An Integrated Heater For Die Rework And Wafer Probe
    14.
    发明申请
    Silicon Carrier Including An Integrated Heater For Die Rework And Wafer Probe 审中-公开
    包括用于芯棒返修和晶片探头的集成加热器的硅载体

    公开(公告)号:US20090178275A1

    公开(公告)日:2009-07-16

    申请号:US12348115

    申请日:2009-01-02

    IPC分类号: H05K3/00

    摘要: Forming a silicon carrier interposer having an integrated heater includes forming a multi-layer silicon member having a main body portion including a first surface, a second surface and an intermediate portion, and attaching first and second electronic components to the first surface of the multi-layer silicon member. A plurality of vias extend between the first surface and the second surface and are adapted to provide an interface between the first and second electronic components and a substrate. In addition, a plurality of heating elements are integrated into the main body portion of the multi-layer silicon member. The heating elements are selectively activated to create a reflow of solder to facilitate one of an attachment of one of the first and second electronic components to the multi-layer silicon member and a detachment of the one of the first and second electronic components from the multi-layer silicon member.

    摘要翻译: 形成具有集成加热器的硅载体插入件包括形成具有包括第一表面,第二表面和中间部分的主体部分的多层硅元件,以及将第一和第二电子元件附接到多层硅片的第一表面, 层硅构件。 多个通孔在第一表面和第二表面之间延伸并且适于提供第一和第二电子部件与基板之间的界面。 另外,多层加热元件集成在多层硅构件的主体部分中。 加热元件被选择性地激活以产生焊料的回流,以促进第一和第二电子元件中的一个附着到多层硅元件中的一个以及第一和第二电子元件中的一个与多层硅元件的分离 层硅构件。

    Non-destructive single seed or several seeds NIR analyzer and method
    17.
    发明授权
    Non-destructive single seed or several seeds NIR analyzer and method 有权
    非破坏性单种子或几种种子NIR分析仪和方法

    公开(公告)号:US07508517B2

    公开(公告)日:2009-03-24

    申请号:US11831343

    申请日:2007-07-31

    申请人: Steven L. Wright

    发明人: Steven L. Wright

    IPC分类号: G01N21/00 G01J5/02

    摘要: A method and apparatus for optically interrogating a particle comprising obtaining a plurality of optical interrogations from a plurality of orientations relative the particle. In one aspect, the particle is tumbled relative to optical interrogation direction and reflected or transmitted energy is collected and added into a single spectrum that represents a complete spectral composition of the sample.

    摘要翻译: 用于光学询问颗粒的方法和装置包括从相对于颗粒的多个取向获得多个光学询问。 在一个方面,颗粒相对于光学询问方向翻滚,并且反射或透射的能量被收集并添加到表示样品的完整光谱组成的单个光谱中。

    Silicon carrier including an integrated heater for die rework and wafer probe
    18.
    发明授权
    Silicon carrier including an integrated heater for die rework and wafer probe 有权
    硅载体包括用于模具返修的集成加热器和晶片探针

    公开(公告)号:US07474540B1

    公开(公告)日:2009-01-06

    申请号:US11972388

    申请日:2008-01-10

    IPC分类号: H05K1/11

    摘要: A silicon carrier package includes a multi-layer member having at least a first layer and a second layer. A first electronic component includes a plurality of connector members that establish a first bond electrically interconnecting the first electronic component to the multi-layer member. A second electronic component includes a plurality of connector members that establish a second bond electrically interconnecting the second electronic component to the multi-layer member. At least one heating element is integrated into one of the first and second layers of the multi-layer member. The at least one heating element is selectively activated to loosen only one of the first and second bonds to facilitate removal of only one of the first and second electronic components from the multi-layer member. The other of the first and second bonds remains intact.

    摘要翻译: 硅载体封装包括具有至少第一层和第二层的多层构件。 第一电子部件包括多个连接器构件,其建立将第一电子部件电连接到多层部件的第一接合部。 第二电子部件包括多个连接器构件,其建立将第二电子部件电连接到多层部件的第二接合部。 至少一个加热元件集成到多层构件的第一层和第二层之一中。 选择性地激活至少一个加热元件以松开仅第一和第二键中的一个,以便于从多层构件中仅去除第一和第二电子部件中的仅一个。 第一和第二债券中的另一个保持不变。

    Germanium channel silicon MOSFET
    19.
    发明授权
    Germanium channel silicon MOSFET 失效
    锗通道硅MOSFET

    公开(公告)号:US5019882A

    公开(公告)日:1991-05-28

    申请号:US351630

    申请日:1989-05-15

    摘要: An alloy layer comprising germanium and silicon is grown on top of a silicon substrate. The alloy layer is kept thin enough for proper pseudomorphic, dislocation free growth. A layer of silicon is applied to the alloy layer. The initial silicon layer is from two to three times as thick as the alloy layer. Approximately the upper two-thirds of the silicon layer is oxidized, either thermally, anodically or by plasma anodization. The silicon layer that remains between the silicon dioxide and the alloy layer is kept thin enough so that a parasitic channel does not form on the interface between the silicon and the silicon dioxide. The germanium alloyed channel is thus suitably bounded by silicon crystalline structures on both of the channel layer surfaces. The barrier heights between silicon dioxide and silicon are very large thus providing good carrie confinement. A suitably applied voltage will result in a region of high mobility charge carriers at the interface between the alloy layer and the upper silicon layer.

    Transferable Probe Tips
    20.
    发明申请
    Transferable Probe Tips 有权
    可转移探头技巧

    公开(公告)号:US20120279287A1

    公开(公告)日:2012-11-08

    申请号:US13101253

    申请日:2011-05-05

    IPC分类号: G01B5/28 B05D5/00 C23F1/00

    摘要: Transferable probe tips including a metallic probe, a delamination layer covering a portion of the metallic probe, and a bonding alloy, wherein the bonding alloy contacts the metallic probe at a portion of the probe that is not covered by the delamination layer are provided herein. Also, techniques for creating a transferable probe tip are provided, including etching a handler substrate to form one or more via arrays, depositing a delamination layer in each via array, depositing one or more metals in each via array to form a probe tip structure, and depositing a bonding alloy on a portion of the probe tip structure that is not covered by the delamination layer. Additionally, techniques for transferring transferable probe tips are provided, including removing a handler substrate from a probe tip structure, and transferring the probe tip structure via flip-chip joining the probe tip structure to a target probe head substrate.

    摘要翻译: 本发明提供了包括金属探针,覆盖金属探针的一部分的分层和可接合的探针尖端,以及接合合金,其中接合合金在探针的未被分层的覆盖部分处接触金属探针。 此外,提供了用于产生可转移探针尖端的技术,包括蚀刻处理器衬底以形成一个或多个通孔阵列,在每个通孔阵列中沉积分层,在每个通孔阵列中沉积一个或多个金属以形成探针尖端结构, 以及在未被分层层覆盖的探针尖端结构的一部分上沉积接合合金。 此外,提供了用于传送可转移的探针尖端的技术,包括从探针尖端结构去除处理器基底,以及通过将探针尖端结构连接到目标探针头基底的倒装芯片来传送探针尖端结构。