公开(公告)号：US4831845A

公开(公告)日：1989-05-23

申请号：US234410

申请日：1988-08-19

申请人： Yasukage Oda ,  Hiroshi Asami

发明人： Yasukage Oda ,  Hiroshi Asami

IPC分类号： B01L7/00 ,  B01L7/04 ,  G01N25/12

CPC分类号： G01N25/12

摘要： A temperature testing device in which a sample-receiving sealable chamber from which a specimen can be easily detached and a cooling portion of a refrigeration unit are inserted into a single vacuum vessel, and in which a gaseous refrigerant is circulated between the cooling portion of the refrigeration unit and the sample-receiving chamber so that the sample-receiving chamber can be cooled.

公开(公告)号：US08987899B2

公开(公告)日：2015-03-24

申请号：US13357046

申请日：2012-01-24

申请人： Hiroshi Asami

发明人： Hiroshi Asami

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H05K1/11 ,  H05K3/34 ,  H05K3/28 ,  H01L23/00

CPC分类号： H01L23/49816 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/3142 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2224/81024 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2924/00013 ,  H01L2924/12042 ,  H05K1/111 ,  H05K3/28 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/099 ,  H05K2203/0315 ,  H05K2203/043 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49155 ,  H01L2224/11 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2924/00

摘要： A circuit board includes: an electrode portion which has a copper layer, a copper oxide layer formed thereon, and a removal portion formed by partially removing the copper oxide layer so as to partially expose the copper layer from the copper oxide layer; and a solder bump for flip chip mounting formed on the copper layer exposed by the removal portion.

摘要翻译： 电路板包括：具有铜层，形成在其上的氧化铜层的电极部分和通过部分去除氧化铜层而形成的去除部分，以从铜氧化物层部分地露出铜层; 以及在由去除部分露出的铜层上形成的用于倒装芯片安装的焊料凸块。

公开(公告)号：US08684523B2

公开(公告)日：2014-04-01

申请号：US13452511

申请日：2012-04-20

申请人： Osamu Wada ,  Tadashi Kaga ,  Hiroshi Asami

发明人： Osamu Wada ,  Tadashi Kaga ,  Hiroshi Asami

IPC分类号： G02C7/02

CPC分类号： G02C7/024

摘要： A spectacle lens includes a first region which is located in at least part of a portion of a lens where a pivotal angle of an eyeball of a wearer ranges from 20 to 60 degrees and in which correcting astigmatism has priority over correcting average power based on prescribed power, and a second region which is formed inside the first region and in which correcting the average power has priority over correcting the astigmatism.

摘要翻译： 眼镜透镜包括第一区域，其位于透镜的至少一部分中，其中佩戴者的眼球的枢转角度在20度至60度之间，其中校正像散优先于基于规定的平均功率的校正平均功率 功率，以及第二区域，其形成在第一区域内，并且校正平均功率优先于校正散光。

公开(公告)号：US08455969B2

公开(公告)日：2013-06-04

申请号：US12078894

申请日：2008-04-08

申请人： Yoshihiro Nabe ,  Masaki Hatano ,  Hiroshi Asami ,  Akihiro Morimoto

发明人： Yoshihiro Nabe ,  Masaki Hatano ,  Hiroshi Asami ,  Akihiro Morimoto

IPC分类号： H01L31/00 ,  H01L21/00

CPC分类号： H01L27/14618 ,  H01L21/76898 ,  H01L23/3677 ,  H01L23/481 ,  H01L31/0203 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10158 ,  H01L2924/16235 ,  H01L2924/3025 ,  H01L2924/00014

摘要： A semiconductor device includes a semiconductor substrate having a first electronic circuit and a second electronic circuit formed on an active surface, a pad electrode formed on the active surface by being connected to the first electronic circuit and/or the second electronic circuit, a first opening formed to some point along a depth of the semiconductor substrate toward the pad electrode from a surface opposite to the active surface of the semiconductor substrate, a second opening formed so as to reach the pad electrode from a bottom surface of the first opening, an insulating layer formed by covering sidewall surfaces of the first opening and the second opening, a conductive layer formed by covering at least an inner wall surface of the insulating layer and a bottom surface of the second opening, a third opening formed to some point along the depth of the semiconductor substrate from the surface opposite to the active surface of the semiconductor substrate, and a heat insulator imbedded in the third opening.

摘要翻译： 半导体器件包括具有第一电子电路和形成在有源表面上的第二电子电路的半导体衬底，通过连接到第一电子电路和/或第二电子电路而形成在有源表面上的焊盘电极，第一开口 从与半导体基板的有源面相反的表面沿着半导体基板的深度朝向焊盘电极的某一点形成第二开口，从第一开口的底面到达焊盘电极，形成绝缘体 通过覆盖第一开口和第二开口的侧壁表面形成的层，通过覆盖绝缘层的至少内壁表面和第二开口的底表面形成的导电层，形成在沿着深度的某个点的第三开口 的半导体衬底从与半导体衬底的有源表面相反的表面，以及绝热体imb 在第三次开幕。

公开(公告)号：US08252628B2

公开(公告)日：2012-08-28

申请号：US12046637

申请日：2008-03-12

申请人： Yoshihiro Nabe ,  Hiroshi Asami ,  Yuji Takaoka ,  Yoshimichi Harada

发明人： Yoshihiro Nabe ,  Hiroshi Asami ,  Yuji Takaoka ,  Yoshimichi Harada

IPC分类号： H01L21/76

CPC分类号： H01L27/14618 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L27/14634 ,  H01L27/14636 ,  H01L31/0224 ,  H01L2224/02372 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05647 ,  H01L2224/1134 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16238 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor substrate having first and second surfaces opposite each other, the first surface being an active surface by provided with an electronic element thereon, a pad electrode formed to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening, formed to reach the pad electrode from a bottom surface of the first opening, having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.

摘要翻译： 半导体器件包括具有彼此相对的第一和第二表面的半导体衬底，第一表面是通过在其上设置有电子元件的有源表面，形成为在电子元件的周边部分中连接到电子元件的焊盘电极 在所述活性表面上具有从所述第二表面向所述焊盘电极延伸以便不到达所述半导体衬底的所述第一表面的第一开口，形成为从所述第一开口的底表面到达所述焊盘电极的第二开口， 直径小于第一开口的直径，形成为覆盖第一开口和第二开口的侧壁表面的绝缘层，以及形成在绝缘层内部的导电层，以至少覆盖绝缘层的内壁表面 层和第二开口的底表面。

公开(公告)号：US20110193223A1

公开(公告)日：2011-08-11

申请号：US13018723

申请日：2011-02-01

申请人： Hiroshi Ozaki ,  Hiroshi Asami

发明人： Hiroshi Ozaki ,  Hiroshi Asami

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L25/0657 ,  H01L23/3114 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L25/50 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05562 ,  H01L2224/05647 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/81097 ,  H01L2225/06513 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2224/05552

摘要： A semiconductor device includes: a semiconductor chip having a semiconductor substrate; a pad electrode formed on the semiconductor substrate; a base metal layer formed on said pad electrode; and a bump electrode formed on the base metal layer, in which an exposed surface including a side surface of the base metal layer is covered with the solder bump electrode.

摘要翻译： 半导体器件包括：具有半导体衬底的半导体芯片; 形成在所述半导体基板上的焊盘电极; 形成在所述焊盘电极上的贱金属层; 以及形成在所述基底金属层上的凸起电极，其中包括所述基底金属层的侧表面的暴露表面被所述焊料凸块电极覆盖。

公开(公告)号：US07691672B2

公开(公告)日：2010-04-06

申请号：US11799023

申请日：2007-04-30

申请人： Masaki Hatano ,  Hiroshi Asami

发明人： Masaki Hatano ,  Hiroshi Asami

IPC分类号： H01L21/00

CPC分类号： H01L21/76898 ,  H01L21/6835 ,  H01L24/73 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19043 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： The present invention provides a substrate treating method including the steps of joining a one-side surface of a substrate to be treated to a support substrate, treating the substrate to be treated in the condition where the substrate to be treated is supported by the support substrate, and removing the support substrate from the substrate to be treated. The step of joining the substrate to be treated to the support substrate includes melting a joint bump formed on the substrate to be treated so as to join the substrate to be treated to the support substrate, and the step of removing the support substrate from the substrate to be treated includes polishing the support substrate so as to remove the support substrate.

摘要翻译： 本发明提供了一种基板处理方法，包括以下步骤：将待处理基板的单面表面连接到支撑基板上，在被处理基板被支撑基​​板支撑的状态下处理待处理基板 从待处理的基板上除去支撑基板。 将待处理基板接合到支撑基板的步骤包括熔化形成在待处理基板上的接合凸起，以将待处理的基板接合到支撑基板，以及从基板移除支撑基板的步骤 待处理包括抛光支撑基板以移除支撑基板。

公开(公告)号：US20080224249A1

公开(公告)日：2008-09-18

申请号：US12046637

申请日：2008-03-12

申请人： Yoshihiro Nabe ,  Hiroshi Asami ,  Yuji Takaoka ,  Yoshimichi Harada

发明人： Yoshihiro Nabe ,  Hiroshi Asami ,  Yuji Takaoka ,  Yoshimichi Harada

IPC分类号： H01L31/0224 ,  H01L31/18

CPC分类号： H01L27/14618 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L27/14634 ,  H01L27/14636 ,  H01L31/0224 ,  H01L2224/02372 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05647 ,  H01L2224/1134 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16238 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor substrate having first and second surfaces opposite each other, the first surface being an active surface by provided with an electronic element thereon, a pad electrode formed to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening, formed to reach the pad electrode from a bottom surface of the first opening, having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.

摘要翻译： 半导体器件包括具有彼此相对的第一和第二表面的半导体衬底，第一表面是通过在其上设置有电子元件的有源表面，形成为在电子元件的周边部分中连接到电子元件的焊盘电极 在所述活性表面上具有从所述第二表面向所述焊盘电极延伸以便不到达所述半导体衬底的所述第一表面的第一开口，形成为从所述第一开口的底表面到达所述焊盘电极的第二开口， 直径小于第一开口的直径，形成为覆盖第一开口和第二开口的侧壁表面的绝缘层，以及形成在绝缘层内部的导电层，以至少覆盖绝缘层的内壁表面 层和第二开口的底表面。

公开(公告)号：US20070102191A1

公开(公告)日：2007-05-10

申请号：US11644143

申请日：2006-12-22

申请人： Hiroshi Asami ,  Hidetoshi Kusano ,  Yuji Nishitani ,  Ken Orui

发明人： Hiroshi Asami ,  Hidetoshi Kusano ,  Yuji Nishitani ,  Ken Orui

IPC分类号： H05K1/11

CPC分类号： H05K3/4694 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/49833 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K3/0023 ,  H05K3/205 ,  H05K3/4617 ,  H05K3/4623 ,  H05K2201/0195 ,  H05K2201/09536 ,  H05K2201/09881 ,  H05K2201/09972 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

摘要： The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.

摘要翻译： 本发明提供一种制造多层布线基板的方法，其可以以细间距保持导体图案的尺寸稳定性，从材料选择的角度解决对工艺的限制，并且进一步降低制造成本，并且 多层布线基板。 形成在由金属制成的支撑片和粘合剂层上的第二布线基板通过使用支撑片部分堆叠在第一布线基板的预定区域上。 在第二布线基板的层叠之后，最后蚀刻并去除支撑片。 第二布线基板仅堆叠在第一布线基板上需要多层的部分上，从而减少第二布线基板的结构材料的量。

公开(公告)号：US20070057022A1

公开(公告)日：2007-03-15

申请号：US11499358

申请日：2006-08-04

申请人： Keiichi Mogami ,  Hiroshi Asami

发明人： Keiichi Mogami ,  Hiroshi Asami

IPC分类号： A47J36/02

CPC分类号： H05K3/3436 ,  H01G2/065 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/03505 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/81011 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2924/00015 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01025 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15313 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K1/111 ,  H05K3/3489 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/1134

摘要： A component mounting method configured to mount on a wiring board a surface-mount electronic component that has an electrode terminal on a bonding surface, the method including the steps of preparing the electronic component having a solder layer that covers the electrode terminal, and a resin layer that is provided on the solder layer and has a flux function preparing the wiring board having a projection conductor that is formed on a mounting surface and is to be bonded to the electrode terminal and mounting the electronic component on the wiring board, and implementing reflow of the solder layer so that the projection conductor penetrates the resin layer.

摘要翻译： 一种部件安装方法，其被配置为在接线板上安装在接合面上具有电极端子的表面安装电子部件，所述方法包括准备具有覆盖所述电极端子的焊料层的电子部件和树脂 层，其具有制备布线基板的通量函数，该布线基板具有形成在安装面上并与电极端子接合并将电子部件安装在布线基板上的突起导体，并实现回流焊 的焊料层，使得突起导体穿过树脂层。