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21.发明申请Semiconductor Device and Method of Forming Stepped-Down RDL and Recessed THV in Peripheral Region of the Device 有权半导体器件和在器件的外围区域中形成步进式RDL和嵌入式THV的方法公开(公告)号：US20100096731A1
公开(公告)日：2010-04-22
申请号：US12641958
申请日：2009-12-18
IPC分类号： H01L23/544 , H01L23/538
CPC分类号： H01L24/82 , H01L21/568 , H01L21/6835 , H01L23/3114 , H01L24/19 , H01L24/24 , H01L24/48 , H01L2221/68345 , H01L2224/0401 , H01L2224/04105 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/82001 , H01L2224/82039 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor die has a peripheral region around the die. An insulating layer is formed over the semiconductor die. A portion of the insulating layer and peripheral is removed to form a recess around the semiconductor die. A conductive layer is deposited over the insulating layer and recess. The conductive layer is electrically connected to contact pads on the semiconductor die and conforms to a step into the recess. A gap is created through the conductive layer and peripheral region around the semiconductor die. An insulating material is deposited in the gap. A portion of the insulating material is removed to form a through hole via (THV). A conductive material is deposited in the THV to form a conductive THV. The conductive THV is recessed with respect to a surface of the semiconductor die. The conductive THV is electrically connected to the conductive layer.
摘要翻译： 半导体管芯具有围绕管芯的周边区域。 在半导体管芯上形成绝缘层。 去除绝缘层和周边的一部分以在半导体管芯周围形成凹陷。 在绝缘层和凹槽上沉积导电层。 导电层电连接到半导体管芯上的接触焊盘，并符合入凹槽的步骤。 通过半导体管芯周围的导电层和周边区域产生间隙。 绝缘材料沉积在间隙中。 绝缘材料的一部分被去除以形成通孔（THV）。 导电材料沉积在THV中以形成导电THV。 导电THV相对于半导体管芯的表面凹陷。 导电THV与导电层电连接。
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22.发明授权Semiconductor device and method of stacking die on leadframe electrically connected by conductive pillars 有权半导体器件和在导电框架上通过导电柱电连接的芯片堆叠的方法公开(公告)号：US09177901B2
公开(公告)日：2015-11-03
申请号：US13430538
申请日：2012-03-26
申请人： Reza A. Pagaila , Byung Tai Do , Linda Pei Ee Chua
发明人： Reza A. Pagaila , Byung Tai Do , Linda Pei Ee Chua
IPC分类号： H01L23/49 , H01L23/495 , H01L21/56 , H01L23/31 , H01L23/00 , H01L25/065
CPC分类号： H01L23/49575 , H01L21/568 , H01L23/3107 , H01L23/49517 , H01L23/49541 , H01L24/48 , H01L25/0657 , H01L2224/0401 , H01L2224/04105 , H01L2224/05568 , H01L2224/0557 , H01L2224/16 , H01L2224/16145 , H01L2224/16225 , H01L2224/16245 , H01L2224/32145 , H01L2224/48091 , H01L2224/73253 , H01L2224/73259 , H01L2224/73265 , H01L2224/81005 , H01L2924/00014 , H01L2924/01004 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/09701 , H01L2924/12041 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device has a first semiconductor die mounted to a first contact pad on a leadframe or substrate with bumps. A conductive pillar is formed over a second semiconductor die. The second die is mounted over the first die by electrically connecting the conductive pillar to a second contact pad on the substrate with bumps. The second die is larger than the first die. An encapsulant is deposited over the first and second die. Alternatively, the conductive pillars are formed over the substrate around the first die. A heat sink is formed over the second die, and a thermal interface material is formed between the first and second die. An underfill material is deposited under the first semiconductor die. A shielding layer is formed between the first and second die. An interconnect structure can be formed over the second contact pad of the substrate.
摘要翻译： 半导体器件具有第一半导体管芯，其安装到具有凸块的引线框架或衬底上的第一接触焊盘。 在第二半导体管芯上形成导电柱。 通过将导电柱电连接到具有凸起的衬底上的第二接触焊盘上，将第二裸片安装在第一裸片上。 第二个模具大于第一个模具。 密封剂沉积在第一和第二模具上。 或者，导电柱形成在围绕第一管芯的基板上。 在第二管芯上形成散热器，并且在第一和第二管芯之间形成热界面材料。 在第一半导体管芯下沉积底部填充材料。 在第一和第二管芯之间形成屏蔽层。 可以在衬底的第二接触焊盘上形成互连结构。
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23.发明授权公开(公告)号：US08492201B2
公开(公告)日：2013-07-23
申请号：US12775324
申请日：2010-05-06
申请人： Reza A. Pagaila , Linda Pei Ee Chua , Byung Tai Do
发明人： Reza A. Pagaila , Linda Pei Ee Chua , Byung Tai Do
IPC分类号： H01L21/00
CPC分类号： H01L23/481 , H01L21/50 , H01L21/568 , H01L21/6835 , H01L23/3157 , H01L24/18 , H01L24/19 , H01L24/48 , H01L24/73 , H01L24/82 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68345 , H01L2224/02371 , H01L2224/04105 , H01L2224/12105 , H01L2224/18 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2224/82005 , H01L2224/82039 , H01L2224/9222 , H01L2224/92244 , H01L2224/97 , H01L2225/06513 , H01L2225/06524 , H01L2225/06541 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19107 , H01L2924/30105 , H01L2224/82 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device is made by providing a first semiconductor wafer having semiconductor die. A gap is made between the semiconductor die. An insulating material is deposited in the gap. A portion of the insulating material is removed to form a first through hole via (THV). A conductive lining is conformally deposited in the first THV. A solder material is disposed above the conductive lining of the first THV. A second semiconductor wafer having semiconductor die is disposed over the first wafer. A second THV is formed in a gap between the die of the second wafer. A conductive lining is conformally deposited in the second THV. A solder material is disposed above the second THV. The second THV is aligned to the first THV. The solder material is reflowed to form the conductive vias within the gap. The gap is singulated to separate the semiconductor die.
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24.发明申请公开(公告)号：US20120104562A1
公开(公告)日：2012-05-03
申请号：US13349510
申请日：2012-01-12
申请人： Reza A. Pagaila , Byung Tai Do , Linda Pei Ee Chua
发明人： Reza A. Pagaila , Byung Tai Do , Linda Pei Ee Chua
IPC分类号： H01L23/48
CPC分类号： H01L23/5386 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/768 , H01L23/3121 , H01L23/3128 , H01L23/5389 , H01L24/18 , H01L24/19 , H01L24/96 , H01L24/97 , H01L25/03 , H01L25/0657 , H01L25/074 , H01L25/50 , H01L2224/0401 , H01L2224/04105 , H01L2224/0557 , H01L2224/12105 , H01L2224/16145 , H01L2224/16225 , H01L2224/20 , H01L2224/32145 , H01L2224/73253 , H01L2224/73259 , H01L2224/97 , H01L2225/06517 , H01L2225/06548 , H01L2225/06572 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01032 , H01L2924/01047 , H01L2924/01049 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2224/82 , H01L2224/81 , H01L2924/00 , H01L2224/05552 , H01L2224/83 , H01L2924/00012
摘要： A semiconductor die has a first semiconductor die mounted to a carrier. A plurality of conductive pillars is formed over the carrier around the first die. An encapsulant is deposited over the first die and conductive pillars. A first stepped interconnect layer is formed over a first surface of the encapsulant and first die. The first stepped interconnect layer has a first opening. A second stepped interconnect layer is formed over the first stepped interconnect layer. The second stepped interconnect layer has a second opening. The carrier is removed. A build-up interconnect structure is formed over a second surface of the encapsulant and first die. A second semiconductor die over the first semiconductor die and partially within the first opening. A third semiconductor die is mounted over the second die and partially within the second opening. A fourth semiconductor die is mounted over the second stepped interconnect layer.
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25.发明授权Semiconductor device and method of forming bond wires and stud bumps in recessed region of peripheral area around the device for electrical interconnection to other devices 有权在器件周围的凹陷区域中形成接合线和柱状凸块的半导体器件和方法，用于与其他器件的电互连公开(公告)号：US08168458B2
公开(公告)日：2012-05-01
申请号：US12329800
申请日：2008-12-08
申请人： Byung Tai Do , Reza A. Pagaila , Linda Pei Ee Chua
发明人： Byung Tai Do , Reza A. Pagaila , Linda Pei Ee Chua
IPC分类号： H01L21/00
CPC分类号： H01L23/4952 , H01L21/6835 , H01L21/6836 , H01L23/3107 , H01L23/3185 , H01L23/49541 , H01L24/05 , H01L24/16 , H01L24/29 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2221/68327 , H01L2221/68372 , H01L2224/02333 , H01L2224/03 , H01L2224/0401 , H01L2224/04042 , H01L2224/056 , H01L2224/1134 , H01L2224/1308 , H01L2224/16 , H01L2224/29111 , H01L2224/29144 , H01L2224/2919 , H01L2224/32225 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/48465 , H01L2224/48471 , H01L2224/48479 , H01L2224/4848 , H01L2224/48992 , H01L2224/49111 , H01L2224/49433 , H01L2224/73265 , H01L2224/83805 , H01L2224/85001 , H01L2224/85051 , H01L2224/85951 , H01L2224/85986 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06551 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2225/1088 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01031 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/05042 , H01L2924/12041 , H01L2924/12044 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19107 , H01L2924/30105 , H01L2224/85186 , H01L2924/00 , H01L2924/00012 , H01L2924/0665 , H01L2224/45099 , H01L2224/4554
摘要： A semiconductor wafer contains a plurality of semiconductor die each having a peripheral area around the die. A recessed region with angled or vertical sidewall is formed in the peripheral area. A conductive layer is formed in the recessed region. A first stud bump is formed over a contact pad of the semiconductor die. A second stud bump is formed over the first conductive layer within the recessed region. A bond wire is formed between the first and second stud bumps. A third stud bump is formed over the bond wire and first stud bump. A dicing channel partially formed through the peripheral area. The semiconductor wafer undergoes backgrinding to the dicing channel to singulate the semiconductor wafer and separate the semiconductor die. The semiconductor die can be disposed in a semiconductor package with other components and electrically interconnected through the bond wire and stud bumps.
摘要翻译： 半导体晶片包含多个半导体管芯，每个半导体管芯具有围绕管芯的周边区域。 具有倾斜或垂直侧壁的凹陷区域形成在周边区域中。 在凹陷区域中形成导电层。 在半导体管芯的接触焊盘上形成第一螺柱凸块。 在凹陷区域内的第一导电层上方形成第二凸起凸块。 在第一和第二突起之间形成接合线。 在接合线和第一凸起凸起上形成第三个凸起凸块。 通过外围区域部分地形成的切割通道。 半导体晶片经历对切割通道的后研磨，以切割半导体晶片并分离半导体管芯。 半导体管芯可以配置在具有其它部件的半导体封装中，并且通过接合线和柱形凸起电互连。
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26.发明授权Semiconductor device and method of forming stepped-down RDL and recessed THV in peripheral region of the device 有权在器件的外围区域形成降压RDL和凹入THV的半导体器件和方法公开(公告)号：US08080882B2
公开(公告)日：2011-12-20
申请号：US12641958
申请日：2009-12-18
IPC分类号： H01L23/544
CPC分类号： H01L24/82 , H01L21/568 , H01L21/6835 , H01L23/3114 , H01L24/19 , H01L24/24 , H01L24/48 , H01L2221/68345 , H01L2224/0401 , H01L2224/04105 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/82001 , H01L2224/82039 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor die has a peripheral region around the die. An insulating layer is formed over the semiconductor die. A portion of the insulating layer and peripheral is removed to form a recess around the semiconductor die. A conductive layer is deposited over the insulating layer and recess. The conductive layer is electrically connected to contact pads on the semiconductor die and conforms to a step into the recess. A gap is created through the conductive layer and peripheral region around the semiconductor die. An insulating material is deposited in the gap. A portion of the insulating material is removed to form a through hole via (THV). A conductive material is deposited in the THV to form a conductive THV. The conductive THV is recessed with respect to a surface of the semiconductor die. The conductive THV is electrically connected to the conductive layer.
摘要翻译： 半导体管芯具有围绕管芯的周边区域。 在半导体管芯上形成绝缘层。 去除绝缘层和周边的一部分以在半导体管芯周围形成凹陷。 导电层沉积在绝缘层和凹部上。 导电层电连接到半导体管芯上的接触焊盘，并符合入凹槽的步骤。 通过半导体管芯周围的导电层和周边区域产生间隙。 绝缘材料沉积在间隙中。 绝缘材料的一部分被去除以形成通孔（THV）。 导电材料沉积在THV中以形成导电THV。 导电THV相对于半导体管芯的表面凹陷。 导电THV与导电层电连接。
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27.发明申请Semiconductor Device and Method of Forming Cavity Adjacent to Sensitive Region of Semiconductor Die Using Wafer-Level Underfill Material 有权半导体器件和使用晶片级底层填充材料形成与半导体晶片敏感区相邻的腔的方法公开(公告)号：US20110187005A1
公开(公告)日：2011-08-04
申请号：US12699482
申请日：2010-02-03
申请人： Reza A. Pagaila , Byung Tai Do , Linda Pei Ee Chua
发明人： Reza A. Pagaila , Byung Tai Do , Linda Pei Ee Chua
IPC分类号： H01L23/538 , H01L21/56
CPC分类号： H01L25/50 , H01L21/563 , H01L23/315 , H01L23/66 , H01L24/73 , H01L25/00 , H01L25/0657 , H01L2224/0401 , H01L2224/0557 , H01L2224/05571 , H01L2224/13025 , H01L2224/16145 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/06568 , H01L2924/00011 , H01L2924/00014 , H01L2924/0002 , H01L2924/01322 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/00 , H01L2924/00012 , H01L2224/05552 , H01L2224/81805
摘要： A semiconductor wafer has a plurality of first semiconductor die with a stress sensitive region. A masking layer or screen is disposed over the stress sensitive region. An underfill material is deposited over the wafer. The masking layer or screen prevents formation of the underfill material adjacent to the sensitive region. The masking layer or screen is removed leaving a cavity in the underfill material adjacent to the sensitive region. The semiconductor wafer is singulated into the first die. The first die can be mounted to a build-up interconnect structure or to a second semiconductor die with the cavity separating the sensitive region and build-up interconnect structure or second die. A bond wire is formed between the first and second die and an encapsulant is deposited over the first and second die and bond wire. A conductive via can be formed through the first or second die.
摘要翻译： 半导体晶片具有多个具有应力敏感区域的第一半导体管芯。 掩模层或屏幕设置在应力敏感区域上方。 底部填充材料沉积在晶片上。 掩蔽层或屏幕防止邻近敏感区域形成底部填充材料。 去除掩模层或屏幕，留下邻近敏感区域的底部填充材料中的空腔。 将半导体晶片分割成第一模具。 第一管芯可以安装到堆积互连结构或第二半导体管芯，其中空腔分离敏感区域并建立互连结构或第二管芯。 在第一和第二管芯之间形成接合线，并且密封剂沉积在第一和第二管芯和接合线上。 可以通过第一或第二管芯形成导电通孔。
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28.发明申请公开(公告)号：US20110018114A1
公开(公告)日：2011-01-27
申请号：US12507130
申请日：2009-07-22
申请人： Reza A. Pagaila , Byung Tai Do , Linda Pei Ee Chua
发明人： Reza A. Pagaila , Byung Tai Do , Linda Pei Ee Chua
IPC分类号： H01L23/52 , H01L21/50 , H01L21/58 , H01L21/768
CPC分类号： H01L25/0657 , H01L21/56 , H01L21/561 , H01L21/565 , H01L21/568 , H01L23/3114 , H01L23/3128 , H01L23/36 , H01L23/3677 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L23/5389 , H01L24/19 , H01L24/97 , H01L2223/6677 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/32145 , H01L2224/73267 , H01L2225/06517 , H01L2225/06524 , H01L2225/06541 , H01L2225/06589 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/0103 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/3025 , H01L2924/3511 , H01L2924/00
摘要： A semiconductor device is made by forming a first thermally conductive layer over a first surface of a semiconductor die. A second surface of the semiconductor die is mounted to a sacrificial carrier. An encapsulant is deposited over the first thermally conductive layer and sacrificial carrier. The encapsulant is planarized to expose the first thermally conductive layer. A first insulating layer is formed over the second surface of the semiconductor die and a first surface of the encapsulant. A portion of the first insulating layer over the second surface of the semiconductor die is removed. A second thermally conductive layer is formed over the second surface of the semiconductor die within the removed portion of the first insulating layer. An electrically conductive layer is formed within the insulating layer around the second thermally conductive layer. A heat sink can be mounted over the first thermally conductive layer.
摘要翻译： 通过在半导体管芯的第一表面上形成第一导热层来制造半导体器件。 半导体管芯的第二表面安装到牺牲载体上。 密封剂沉积在第一导热层和牺牲载体上。 将密封剂平坦化以暴露第一导热层。 第一绝缘层形成在半导体管芯的第二表面和密封剂的第一表面上。 半导体管芯的第二表面上的第一绝缘层的一部分被去除。 在第一绝缘层的去除部分内的半导体管芯的第二表面上形成第二导热层。 在第二导热层周围的绝缘层内形成导电层。 散热器可以安装在第一导热层上。
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公开(公告)号：US20100270656A1
公开(公告)日：2010-10-28
申请号：US12832821
申请日：2010-07-08
申请人： Byung Tai Do , Reza A. Pagaila , Linda Pei Ee Chua
发明人： Byung Tai Do , Reza A. Pagaila , Linda Pei Ee Chua
IPC分类号： H01L23/544 , H01L29/06
CPC分类号： H01L23/49816 , H01L21/6835 , H01L21/6836 , H01L23/3107 , H01L23/525 , H01L24/03 , H01L24/05 , H01L24/16 , H01L24/48 , H01L25/105 , H01L2221/68327 , H01L2221/68372 , H01L2224/02313 , H01L2224/02333 , H01L2224/03 , H01L2224/0401 , H01L2224/04042 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/13184 , H01L2224/48137 , H01L2224/4823 , H01L2224/73265 , H01L2224/85399 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2225/1088 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/05042 , H01L2924/12041 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19107 , H01L2924/30105 , H01L2224/13099 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor wafer contains a plurality of semiconductor die each having a peripheral area around the die. A first insulating layer is formed over the die. A recessed region with angled sidewall is formed in the peripheral area. A first conductive layer is formed over the first insulating layer outside the recessed region and further into the recessed region. A conductive pillar is formed over the first conductive layer within the recessed region. A second insulating layer is formed over the first insulating layer, conductive pillar, and first conductive layer such that the conductive pillar is exposed from the second insulating layer. A dicing channel partially through the peripheral area. The semiconductor wafer undergoes backgrinding to the dicing channel to singulate the semiconductor wafer and separate the semiconductor die. The semiconductor die can be disposed in a semiconductor package with other components and electrically interconnected through the conductive pillar.
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30.发明授权Semiconductor device and method of forming through vias with reflowed conductive material 有权用回流导电材料形成通孔的半导体器件和方法公开(公告)号：US07741156B2
公开(公告)日：2010-06-22
申请号：US12127417
申请日：2008-05-27
申请人： Reza A. Pagaila , Linda Pei Ee Chua , Byung Tai Do
发明人： Reza A. Pagaila , Linda Pei Ee Chua , Byung Tai Do
IPC分类号： H01L21/00
CPC分类号： H01L23/481 , H01L21/50 , H01L21/568 , H01L21/6835 , H01L23/3157 , H01L24/18 , H01L24/19 , H01L24/48 , H01L24/73 , H01L24/82 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68345 , H01L2224/02371 , H01L2224/04105 , H01L2224/12105 , H01L2224/18 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2224/82005 , H01L2224/82039 , H01L2224/9222 , H01L2224/92244 , H01L2224/97 , H01L2225/06513 , H01L2225/06524 , H01L2225/06541 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19107 , H01L2924/30105 , H01L2224/82 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device is made by providing a first semiconductor wafer having semiconductor die. A gap is made between the semiconductor die. An insulating material is deposited in the gap. A portion of the insulating material is removed to form a first through hole via (THV). A conductive lining is conformally deposited in the first THV. A solder material is disposed above the conductive lining of the first THV. A second semiconductor wafer having semiconductor die is disposed over the first wafer. A second THV is formed in a gap between the die of the second wafer. A conductive lining is conformally deposited in the second THV. A solder material is disposed above the second THV. The second THV is aligned to the first THV. The solder material is reflowed to form the conductive vias within the gap. The gap is singulated to separate the semiconductor die.
摘要翻译： 通过提供具有半导体管芯的第一半导体晶片来制造半导体器件。 在半导体管芯之间形成间隙。 绝缘材料沉积在间隙中。 去除绝缘材料的一部分以形成通过（THV）的第一通孔。 导电衬里共形沉积在第一个THV中。 焊料材料设置在第一THV的导电衬里之上。 具有半导体管芯的第二半导体晶片设置在第一晶片上。 第二THV形成在第二晶片的管芯之间的间隙中。 导电衬里共形沉积在第二个THV中。 焊料材料设置在第二THV之上。 第二个THV与第一个THV对齐。 焊料材料被回流以在间隙内形成导电通孔。 将间隙分开以分离半导体管芯。
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