Semiconductor package and method for manufacturing the same
    25.
    发明授权
    Semiconductor package and method for manufacturing the same 有权
    半导体封装及其制造方法

    公开(公告)号:US06700187B2

    公开(公告)日:2004-03-02

    申请号:US10103048

    申请日:2002-03-21

    申请人: Jong Sik Paek

    发明人: Jong Sik Paek

    IPC分类号: H01L23495

    摘要: A semiconductor package comprising a semiconductor die having opposed, generally planar first and second surfaces and a peripheral edge. Formed on the second surface of the semiconductor die in close proximity to the peripheral edge thereof are a plurality of bond pads. The semiconductor package further comprises a plurality of leads which are positioned about the peripheral edge of the semiconductor die in spaced relation to the second surface thereof. Each of the leads includes opposed, generally planar first and second surfaces, and a generally planar third surface which is oriented between the first and second surfaces in opposed relation to a portion of the second surface. In the semiconductor package, a plurality of conductive bumps are used to electrically and mechanically connect the bond pads of the semiconductor die to the third surfaces of respective ones of the leads. An encapsulating portion is applied to and partially encapsulates the leads, the semiconductor die, and the conductive bumps.

    摘要翻译: 一种半导体封装,其包括具有相对的,大致平面的第一和第二表面和外围边缘的半导体管芯。 形成在半导体管芯的靠近其周缘的第二表面上的是多个接合焊盘。 半导体封装还包括多个引线,其以与其第二表面间隔的关系围绕半导体管芯的外围边缘定位。 每个引线包括相对的,大致平面的第一和第二表面,以及大致平坦的第三表面,其在与第二表面的一部分相对的第一和第二表面之间取向。 在半导体封装中,使用多个导电凸块将半导体管芯的接合焊盘电连接和机械地连接到各个引线的第三表面。 将封装部分施加到部分地封装引线,半导体管芯和导电凸块。

    Semiconductor package including flip chip
    29.
    发明授权
    Semiconductor package including flip chip 有权
    半导体封装包括倒装芯片

    公开(公告)号:US06803645B2

    公开(公告)日:2004-10-12

    申请号:US10034656

    申请日:2001-12-26

    申请人: Jong Sik Paek

    发明人: Jong Sik Paek

    IPC分类号: H01L23495

    摘要: A semiconductor package comprising a plurality of leads. Each of the leads defines opposed first and second surfaces. Also included in the semiconductor package is a semiconductor chip which defines opposed first and second surfaces, and includes a plurality of input/output pads disposed on the first surface thereof. A plurality of conductive bumps are used to electrically connect the input/output pads of the semiconductor package to the second surfaces of respective ones of the leads. An encapsulant portion of the semiconductor package covers the semiconductor chip, the conductive bumps, and the second surfaces of the leads such that at least portions of the first surfaces of the leads are exposed within the encapsulant portion.

    摘要翻译: 一种包括多个引线的半导体封装。 每个引线限定相对的第一和第二表面。 还包括在半导体封装中的是半导体芯片,其限定相对的第一和第二表面,并且包括设置在其第一表面上的多个输入/输出焊盘。 使用多个导电凸块将半导体封装的输入/输出焊盘电连接到相应引线的第二表面。 半导体封装的密封剂部分覆盖半导体芯片,导电凸块和引线的第二表面,使得引线的至少部分的第一表面暴露在密封剂部分内。

    Optical device packages having improved conductor efficiency, optical coupling and thermal transfer
    30.
    发明授权
    Optical device packages having improved conductor efficiency, optical coupling and thermal transfer 有权
    具有改进的导体效率,光学耦合和热转移的光学器件封装

    公开(公告)号:US06740950B2

    公开(公告)日:2004-05-25

    申请号:US10046995

    申请日:2002-01-14

    申请人: Jong Sik Paek

    发明人: Jong Sik Paek

    IPC分类号: H01L310232

    摘要: An optical device package having improved conductor efficiency, optical coupling and thermal transfer, as well as various methods for packaging a semiconductor die provide reduced connection length, and improved optical and thermal characteristics. In one package, a conductive circuit pattern disposed on a transparent or translucent cover connects bond pads on the light receiving surface of the semiconductor die to external electrical contacts. The construction of the package reduces connection length and eliminates the air gap between the glass and the die. In another package, a substrate having a protruding wall supports the glass and the substrate provides an electrical connection to terminals for connection to an external device. In another package, the glass is supported by a die mounting board that supports the semiconductor die and includes leads for connection to an external device. In other packages, the glass is supported directly by the semiconductor die and the die is supported by an encapsulated assembly including leads that support the semiconductor die.

    摘要翻译: 具有改进的导体效率,光学耦合和热传递的光学器件封装以及用于封装半导体管芯的各种方法提供了缩短的连接长度,以及改进的光学和热特性。 在一个封装中,布置在透明或半透明盖上的导电电路图形将半导体管芯的光接收表面上的接合焊盘连接到外部电触头。 封装的结构减少连接长度并消除玻璃和管芯之间的空气间隙。在另一个封装中,具有突出壁的基板支撑玻璃,并且基板提供与用于连接到外部设备的端子的电连接。 该玻璃由支撑半导体管芯的管芯安装板支撑,并且包括用于连接到外部设备的引线。在其他封装中,玻璃由半导体管芯直接支撑,并且管芯由包封的组件支撑,包括 引线支持半导体芯片。