公开(公告)号：US20070080447A1

公开(公告)日：2007-04-12

申请号：US11607910

申请日：2006-12-04

申请人： Takehiko Hasebe ,  Takehide Yokozuka ,  Nobuyuki Ushifusa ,  Masahide Harada ,  Eiji Matsuzaki ,  Hiroshi Hozoji

发明人： Takehiko Hasebe ,  Takehide Yokozuka ,  Nobuyuki Ushifusa ,  Masahide Harada ,  Eiji Matsuzaki ,  Hiroshi Hozoji

IPC分类号： H01L23/34 ,  H01L21/00

CPC分类号： H01L24/16 ,  H01L23/142 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/49822 ,  H01L23/49833 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/29139 ,  H01L2224/2929 ,  H01L2224/32057 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83385 ,  H01L2224/83851 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01054 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K1/0206 ,  H05K1/0207 ,  H05K1/021 ,  H05K1/056 ,  H05K1/144 ,  H05K3/384 ,  H05K3/4608 ,  H05K3/4641 ,  H05K3/4652 ,  H05K2201/0209 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09572 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09845 ,  H05K2201/10734 ,  H01L2924/05432 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are connected. In the electronic apparatus, a member having a high thermal conductivity is arranged so as to be in contact with both of the metal plate and the electronic part. Accordingly, a heat radiating property of the electronic apparatus is increased.

摘要翻译： 本发明提供一种电子设备，其具有包括金属板的金属芯基板，形成在金属板上的绝缘层和形成在绝缘层上的导电层，以及电子部件，并且导电层和导体层的端子 电子部件连接。 在电子设备中，具有高导热性的部件被布置成与金属板和电子部件都接触。 因此，电子设备的散热性提高。

公开(公告)号：US06281863B1

公开(公告)日：2001-08-28

申请号：US08744759

申请日：1996-11-06

申请人： Takashi Sasaki ,  Masaji Ishigaki ,  Norio Yatsuda ,  Yuji Sano ,  Hiroshi Ohtaka ,  Nobuyuki Ushifusa ,  Eiji Matsuzaki ,  Seiichi Tsuchida

发明人： Takashi Sasaki ,  Masaji Ishigaki ,  Norio Yatsuda ,  Yuji Sano ,  Hiroshi Ohtaka ,  Nobuyuki Ushifusa ,  Eiji Matsuzaki ,  Seiichi Tsuchida

IPC分类号： G09G328

CPC分类号： G09G3/2986 ,  G09G3/2018 ,  G09G2310/06 ,  G09G2320/02 ,  G09G2360/16

摘要： A plasma display panel driving system and method for a display panel having a first common electrode and first independent electrodes arranged at a back plate side, a second common electrode and second independent electrodes arranged at a face plate side, an inner partition positioned between the first common and independent electrodes at the back plate side and the second common and independent electrodes at the face plate side and having an aperture therein connecting a space at the back plate side and a space at the face plate side, and a fluorescent layer arranged in the space at the face plate side. The driving system and method includes a driver for driving the first and second independent and common electrodes through a full writing period, a front surface erasing period, a writing period, and a discharge sustaining period, including supplying a first full writing pulse to the first common electrode at the back plate side and a second full writing pulse having a polarity which is opposite to the polarity of the first full writing pulse to the first independent electrodes at the back plate side for causing discharge between the first common and independent electrodes in the full writing period.

摘要翻译： 一种用于显示面板的等离子体显示面板驱动系统和方法，所述显示面板具有第一公共电极和布置在后板侧的第一独立电极，布置在面板侧的第二公共电极和第二独立电极，位于第一 在背板侧的共用和独立的电极以及在面板侧的第二共用和独立的电极，并且在其中具有连接后板侧的空间和面板侧的空间的孔，以及布置在 面板侧的空间。 驱动系统和方法包括驱动器，用于通过完整的写入周期，前表面擦除周期，写入周期和放电维持周期来驱动第一和第二独立和公共电极，包括向第一和第二独立公共电极提供第一完整写入脉冲 在后板侧的公共电极和第二全写入脉冲，其具有与第一全写入脉冲的极性相反的极性，与第二独立电极在背板侧相反，以在第一共用电极和独立电极之间进行放电 全写作期

公开(公告)号：US5939828A

公开(公告)日：1999-08-17

申请号：US906264

申请日：1997-08-05

申请人： Eiji Matsuzaki ,  Nobuyuki Ushifusa ,  Seiichi Tsuchida ,  Kazuo Suzuki ,  Teruo Takai ,  Kyoko Amemiya ,  Shiyuki Sakaue ,  Fusaji Shoji

发明人： Eiji Matsuzaki ,  Nobuyuki Ushifusa ,  Seiichi Tsuchida ,  Kazuo Suzuki ,  Teruo Takai ,  Kyoko Amemiya ,  Shiyuki Sakaue ,  Fusaji Shoji

IPC分类号： H01J9/38 ,  G09F9/313 ,  H01J9/02 ,  H01J11/12 ,  H01J11/20 ,  H01J11/24 ,  H01J11/26 ,  H01J11/28 ,  H01J11/32 ,  H01J11/34 ,  H01J11/36 ,  H01J11/38 ,  H01J11/40 ,  H01J11/42 ,  H01J11/44 ,  H01J11/50 ,  H01J17/49 ,  G09G3/28

CPC分类号： H01J11/32 ,  H01J11/12 ,  H01J2211/326

摘要： In order to reduce the address voltage in a gas discharge type display pane, the address electrodes in the display panel are formed on the barrier ribs. Further, a fluorescent layer is coated on the wall surface of the barrier ribs thereby suppressing erroneous light emission or degradation of the fluorescent layer during address discharge.

摘要翻译： 为了降低气体放电型显示窗格中的寻址电压，显示面板中的寻址电极形成在隔壁上。 此外，荧光层被涂覆在隔壁的壁表面上，从而在寻址放电期间抑制荧光层的错误发光或劣化。

公开(公告)号：US5900694A

公开(公告)日：1999-05-04

申请号：US778290

申请日：1997-01-02

申请人： Eiji Matsuzaki ,  Nobuyuki Ushifusa ,  Seiichi Tsuchida ,  Teruo Takai

发明人： Eiji Matsuzaki ,  Nobuyuki Ushifusa ,  Seiichi Tsuchida ,  Teruo Takai

IPC分类号： H01J11/12 ,  H01J11/24 ,  H01J17/49 ,  H01J1/62 ,  H01J63/04

CPC分类号： H01J11/12 ,  H01J11/24 ,  H01J2211/245

摘要： A gas discharge display panel in which opaque bus electrodes are structured in a frame shape for making each display cell clear as viewed from outside of the front substrate, and the bus electrodes function as a black matrix of the display screen. Hence the integrity of the black display status is improved and the contrast is increased.

摘要翻译： 一种气体放电显示面板，其中不透明总线电极被构造成框架形状，用于使得每个显示单元从前面基板的外部观察到是透明的，并且总线电极用作显示屏幕的黑矩阵。 因此，黑色显示状态的完整性得到改善并且对比度增加。

公开(公告)号：US5818168A

公开(公告)日：1998-10-06

申请号：US525976

申请日：1995-09-07

申请人： Nobuyuki Ushifusa ,  Seiichi Tsuchida ,  Teruo Takai ,  Ken Hashimoto ,  Hiroshi Ohtaka ,  Michitaka Ohsawa ,  Eiji Matsuzaki ,  Masaji Ishigaki ,  Norio Yatsuda ,  Takashi Sasaki ,  Yuji Sano

发明人： Nobuyuki Ushifusa ,  Seiichi Tsuchida ,  Teruo Takai ,  Ken Hashimoto ,  Hiroshi Ohtaka ,  Michitaka Ohsawa ,  Eiji Matsuzaki ,  Masaji Ishigaki ,  Norio Yatsuda ,  Takashi Sasaki ,  Yuji Sano

IPC分类号： H01J17/49

CPC分类号： H01J11/36 ,  H01J11/12 ,  H01J11/28

摘要： A gas discharge display panel which provides sufficient contrast and good accuracy and is high in yield. When a voltage is applied to auxiliary discharge electrodes, auxiliary discharge occurs in an auxiliary discharge space and excited charged particles communicate with a main discharge space through a priming path made in a discharge space separation bulkhead. In this state, when an alternating voltage is applied between bus electrodes on a front substrate, main discharge occurs in the main discharge space, causing Xe atoms in the sealed gas to generate ultraviolet rays, causing a phosphor to emit light. However, since the auxiliary discharge is shielded by a bulkhead and a barrier rib, the phosphor does not emit light when only auxiliary discharge occurs.

摘要翻译： 气体放电显示面板，其提供足够的对比度和良好的精度并且产量高。 当向辅助放电电极施加电压时，在辅助放电空间中发生辅助放电，并且激发的带电粒子通过在放电空间分隔隔板中形成的起动路径与主放电空间连通。 在这种状态下，当在前基板上的总线电极之间施加交流电压时，在主放电空间发生主放电，导致密封气体中的Xe原子产生紫外线，使荧光体发光。 然而，由于辅助放电由隔板和隔板屏蔽，所以当仅发生辅助放电时，荧光体不发光。

公开(公告)号：US4821142A

公开(公告)日：1989-04-11

申请号：US58255

申请日：1987-06-04

申请人： Nobuyuki Ushifusa ,  Hiroichi Shinohara ,  Kousei Nagayama ,  Satoru Ogihara ,  Tasao Soga

发明人： Nobuyuki Ushifusa ,  Hiroichi Shinohara ,  Kousei Nagayama ,  Satoru Ogihara ,  Tasao Soga

IPC分类号： H01L23/538 ,  C03C3/066 ,  C03C3/093 ,  H01L23/498 ,  H05K1/03 ,  H05K3/46

CPC分类号： C03C3/066 ,  C03C3/093 ,  H01L23/49833 ,  H01L23/49894 ,  H05K1/0306 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/09701 ,  H01L2924/15312 ,  H05K3/4629 ,  Y10T29/49155 ,  Y10T29/4916

摘要： A ceramic multilayer circuit board comprising ceramic layers and wiring conductor layers laminated alternately, in which the ceramic layer has a thermal expansion coefficient lower than that of the wiring conductor and not lower than one half of that of the conductor layer and is formed from a glass which softens at a temperature not higher than the melting point of the wiring conductor layer; a semiconductor module having a high reliability in its solder joint part comprising said ceramic multilayer circuit board mounted with a ceramic carrier substrate being mounted with a semiconductor device, said board being able to use a silver or copper conductor having a good electro-conductivity; and an amorphous glass powder for said ceramic multilayer circuit board.

摘要翻译： 一种陶瓷多层电路板，包括交替层叠的陶瓷层和布线导体层，其中陶瓷层的热膨胀系数低于布线导体的热膨胀系数，不低于导体层的热膨胀系数的一半，并且由玻璃形成 其在不高于布线导体层的熔点的温度下软化; 在其焊接部分具有高可靠性的半导体模块，包括安装有安装有半导体器件的陶瓷载体衬底的所述陶瓷多层电路板，所述板可以使用具有良好导电性的银或铜导体; 和用于所述陶瓷多层电路板的无定形玻璃粉末。

公开(公告)号：US4764233A

公开(公告)日：1988-08-16

申请号：US862169

申请日：1986-05-12

申请人： Satoru Ogihara ,  Nobuyuki Ushifusa

发明人： Satoru Ogihara ,  Nobuyuki Ushifusa

IPC分类号： H05K3/46 ,  B32B18/00 ,  H01L23/498 ,  H05K1/00 ,  H05K1/03 ,  B32B31/04

CPC分类号： H01L23/49894 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/4629 ,  H05K3/4676

摘要： This invention provides a ceramic multi-layer circuit board wherein electroconductive patterns and ceramic insulating layers are piled alternately, characterized in that each ceramic insulating layer is a sintered product comprising one or more kinds of silica and a glass. Since the glass has a softening point lower than the melting point of the material of the electroconductive patterns, it enables sintering of the ceramic multi-layer circuit board at low temperatures. The silica is effective for reduction of the dielectric constant of each ceramic insulating layer.

摘要翻译： 本发明提供一种陶瓷多层电路板，其中导电图案和陶瓷绝缘层交替堆叠，其特征在于每个陶瓷绝缘层是包含一种或多种二氧化硅和玻璃的烧结产品。 由于玻璃的软化点低于导电图案的材料的熔点，所以能够在低温下烧结陶瓷多层电路板。 二氧化硅对于降低每个陶瓷绝缘层的介电常数是有效的。

公开(公告)号：US4736276A

公开(公告)日：1988-04-05

申请号：US865396

申请日：1986-05-21

申请人： Nobuyuki Ushifusa ,  Satoru Ogihara ,  Kousei Nagayama ,  Hiroichi Shinohara ,  Gyozo Toda

发明人： Nobuyuki Ushifusa ,  Satoru Ogihara ,  Kousei Nagayama ,  Hiroichi Shinohara ,  Gyozo Toda

IPC分类号： C04B35/18 ,  H01L21/48 ,  H01L23/15 ,  H05K1/00 ,  H05K1/03 ,  H05K1/11 ,  B32B9/04

CPC分类号： H01L23/15 ,  C04B35/18 ,  H01L21/4807 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01037 ,  H01L2924/01055 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15312 ,  H01L2924/15787 ,  H05K1/0306 ,  H05K3/4676 ,  Y10S428/901 ,  Y10T29/49163 ,  Y10T428/24322 ,  Y10T428/24917

摘要： Ceramic insulating substrate layers (1) for a multilayered ceramic wiring circuit board (3) consist essentially of crystals of mullite and sillimanite, non-crystalline silicon dioxide occupying the interstices between the crystals and magnesium oxide dissolved substantially in the crystals in solid solution and have a thermal expansion coefficient of 40-60.times.10.sup.-7 /.degree. C. and a dielectric constant below 6.7.

摘要翻译： 用于多层陶瓷布线电路板（3）的陶瓷绝缘基底层（1）基本上由莫来石和硅线石晶体组成，非结晶二氧化硅占据晶体间的空隙和基本上在固溶体中的晶体中溶解的氧化镁，并且具有 热膨胀系数为40-60×10-7 /℃，介电常数低于6.7。

公开(公告)号：US4672152A

公开(公告)日：1987-06-09

申请号：US888410

申请日：1986-07-23

申请人： Hiroichi Shinohara ,  Nobuyuki Ushifusa ,  Kousei Nagayama ,  Satoru Ogihara

发明人： Hiroichi Shinohara ,  Nobuyuki Ushifusa ,  Kousei Nagayama ,  Satoru Ogihara

IPC分类号： C03C8/24 ,  C03C10/00 ,  H01L23/15 ,  H01L23/538 ,  H05K1/00 ,  H05K1/03 ,  H05K3/46

CPC分类号： H01L23/5383 ,  C03C10/0027 ,  H01L23/15 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01055 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15312 ,  H05K1/0306 ,  H05K3/4629 ,  H05K3/4676 ,  Y10S428/901 ,  Y10T428/24926

摘要： A ceramic insulating layer (2) for the multilayer ceramic circuit board (11) consists of 60 wt % of crystallized glass and 40 wt % of a filler such as silicon dioxide bonded by the crystallized glass, which consists of 6-15 wt % of lithium oxide, 70-90 wt % of silicon dioxide, 1-8 wt % of aluminum oxide, 1-5 wt % of alkaline metal oxide other than lithium oxide and 2-5 wt % of alkaline earth metal oxide. The sintered ceramic insulating layer (2) has a dielectric constant below 6.1 and a flexural strength above 150 MPa and is co-firable with a wiring conductor layer of such as gold, silver and copper.

摘要翻译： 用于多层陶瓷电路板（11）的陶瓷绝缘层（2）由60重量％的结晶玻璃和40重量％的由结晶玻璃结合的填料如二氧化硅组成，其由6-15重量％ 氧化锂，70-90重量％的二氧化硅，1-8重量％的氧化铝，1-5重量％的除氧化锂以外的碱金属氧化物和2-5重量％的碱土金属氧化物。 烧结陶瓷绝缘层（2）的介电常数低于6.1，抗弯强度高于150MPa，与金，银和铜等布线导体层共存。