公开(公告)号：US20120160544A1

公开(公告)日：2012-06-28

申请号：US12764994

申请日：2010-04-22

申请人： Timothy Antesberger ,  Rabindra N. Das ,  Frank D. Egitto ,  Voya R. Markovich ,  William E. Wilson

发明人： Timothy Antesberger ,  Rabindra N. Das ,  Frank D. Egitto ,  Voya R. Markovich ,  William E. Wilson

IPC分类号： H05K1/00 ,  H05K1/09 ,  H05K1/03

CPC分类号： H05K3/4623 ,  H05K1/092 ,  H05K3/4053 ,  H05K3/4614 ,  H05K3/4691 ,  H05K2203/061

摘要： A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. The substrate may also contain land grid array (LGA) packaging.

摘要翻译： 一种用于PCB或PWB板的衬底，其具有无芯堆积层和至少一个金属和至少一个介电层。 无芯堆积电介质层可由至少部分固化的热固性树脂和热塑性树脂组成。 衬底还可以包含焊盘阵列（LGA）封装。

公开(公告)号：US20120228014A1

公开(公告)日：2012-09-13

申请号：US13042578

申请日：2011-03-08

申请人： Rabindra N. Das ,  Mark D. Poliks ,  Voya R. Markovich ,  Peter A. Moschak

发明人： Rabindra N. Das ,  Mark D. Poliks ,  Voya R. Markovich ,  Peter A. Moschak

IPC分类号： H05K1/16 ,  B05D5/12

CPC分类号： H05K1/162 ,  H01G4/33 ,  H01G4/38 ,  H05K1/0231 ,  H05K3/4608 ,  H05K2201/017 ,  H05K2201/0179

摘要： A circuitized substrate for use in such electrical structures as information handling systems wherein the substrate includes a capacitive substrate as part thereof. The capacitive substrate includes a thin film layer of capacitive material strategically positioned on a conductive layer relative to added electrically conductive elements to in turn provide a plurality of internal capacitors within the final circuitized substrate during operation thereof. A method of making such a circuitized substrate is also provided.

摘要翻译： 一种用于诸如信息处理系统的电气结构中的电路化基板，其中所述基板包括作为其一部分的电容基板。 电容性衬底包括相对于添加的导电元件策略性地定位在导电层上的电容材料薄层，从而在其操作期间在最终电路化衬底内提供多个内部电容器。 还提供了制造这种电路化基板的方法。

公开(公告)号：US20120068326A1

公开(公告)日：2012-03-22

申请号：US12884421

申请日：2010-09-17

申请人： Rabindra N. Das ,  Voya R. Markovich ,  James J. McNamara, JR. ,  Mark D. Poliks

发明人： Rabindra N. Das ,  Voya R. Markovich ,  James J. McNamara, JR. ,  Mark D. Poliks

IPC分类号： H01L23/22

CPC分类号： H01L23/42 ,  H01L23/573 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29369 ,  H01L2224/29387 ,  H01L2224/29393 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

摘要： A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.

摘要翻译： 防篡改微芯片封装包含流体或纳米流体填充的胶囊，通道或储存器，其中单独或组合的流体可以在尝试逆向工程化时通过蚀刻，烧结或热破坏来破坏电路。 当流体填充的空腔被切掉以便对微芯片进行详细检查时，释放流体。 可以将纳米流体用于烧结过程，并且还可以增加用于管芯热管理的流体的热导率。 通孔和微通孔可以并入设计中以通过改善流体/芯片接触来增加电路破坏功效。 也可以使用热界面材料来促进芯片冷却。

公开(公告)号：US08592299B1

公开(公告)日：2013-11-26

申请号：US13358716

申请日：2012-01-26

申请人： Voya R. Markovich ,  Rabindra N. Das ,  Rajinder S. Rai ,  Michael Vincent

发明人： Voya R. Markovich ,  Rabindra N. Das ,  Rajinder S. Rai ,  Michael Vincent

IPC分类号： H01L21/44

CPC分类号： H01L21/441 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L27/14676 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/1132 ,  H01L2224/11424 ,  H01L2224/13209 ,  H01L2224/13211 ,  H01L2224/13213 ,  H01L2224/13216 ,  H01L2224/13218 ,  H01L2224/1322 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/1329 ,  H01L2224/13294 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13439 ,  H01L2224/13444 ,  H01L2224/16225 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2224/8184 ,  H01L2924/12037 ,  H01L2924/00

摘要： A structure for minimizing resistance between a semi-insulating x-ray detector crystal and an electrically conducting substrate. Electrical contact pads are disposed on the detector crystal and on the substrate with an electrical interconnect between the contact pads formed from a conductive adhesive and washed solder in electrical and mechanical communication with the pads.

摘要翻译： 用于最小化半绝缘x射线检测器晶体和导电基底之间的电阻的结构。 电接触焊盘设置在检测器晶体和基板上，在由导电粘合剂形成的接触焊盘和与焊盘电气和机械连通的冲洗焊料之间具有电互连。

公开(公告)号：US09756724B2

公开(公告)日：2017-09-05

申请号：US13252256

申请日：2011-10-04

申请人： Rabindra N. Das ,  Kostas I. Papathomas ,  Voya R. Markovich

发明人： Rabindra N. Das ,  Kostas I. Papathomas ,  Voya R. Markovich

IPC分类号： H05K3/40 ,  H05K1/03 ,  H05K3/46 ,  B23K26/382 ,  B23K26/40 ,  H01B1/22 ,  H05K1/09 ,  B23K103/00 ,  B23K101/40 ,  B23K103/16

CPC分类号： H05K1/0313 ,  B23K26/382 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/16 ,  B23K2103/172 ,  B23K2103/52 ,  H01B1/22 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/097 ,  H05K3/4053 ,  H05K3/4069 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0257 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/10378 ,  H05K2203/0425 ,  H05K2203/1152 ,  Y10T29/49128 ,  Y10T29/49165 ,  H01L2924/00

摘要： A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a metallic component including nano-particles and may include additional elements such as solder or other metal micro-particles, as well as a conducting polymer and organic. The particles of the paste composition sinter and, depending on what additional elements are added, melt as a result of lamination to thereby form effective contiguous circuit paths through the paste. A method of making such a substrate is also provided, as is an electrical assembly utilizing the substrate and including an electronic component such as a semiconductor chip coupled thereto.

公开(公告)号：US08288857B2

公开(公告)日：2012-10-16

申请号：US12884421

申请日：2010-09-17

申请人： Rabindra N. Das ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  Mark D. Poliks

发明人： Rabindra N. Das ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  Mark D. Poliks

IPC分类号： H01L23/22 ,  H01L23/12

CPC分类号： H01L23/42 ,  H01L23/573 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29369 ,  H01L2224/29387 ,  H01L2224/29393 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

摘要： A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.

摘要翻译： 防篡改微芯片封装包含流体或纳米流体填充的胶囊，通道或储存器，其中单独或组合的流体可以在尝试逆向工程化时通过蚀刻，烧结或热破坏来破坏电路。 当流体填充的空腔被切掉以便对微芯片进行详细检查时，释放流体。 可以将纳米流体用于烧结过程，并且还可以增加用于管芯热管理的流体的热导率。 通孔和微通孔可以并入设计中以通过改善流体/芯片接触来增加电路破坏功效。 也可以使用热界面材料来促进芯片冷却。

公开(公告)号：US20120162928A1

公开(公告)日：2012-06-28

申请号：US12910020

申请日：2010-10-22

申请人： Rabindra N. Das ,  Frank D. Egitto ,  Voya R. Markovich

发明人： Rabindra N. Das ,  Frank D. Egitto ,  Voya R. Markovich

IPC分类号： H05K7/00 ,  H05K3/40 ,  H05K3/46

CPC分类号： H01L23/49833 ,  H01L23/488 ,  H01L23/49827 ,  H01L23/5389 ,  H01L2224/16225 ,  H05K1/111 ,  H05K1/144 ,  H05K3/06 ,  H05K3/368 ,  H05K3/4007 ,  H05K7/00 ,  H05K2201/0373 ,  H05K2201/042 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2203/047 ,  H05K2203/1572 ,  H05K2203/176 ,  Y10T29/49155

摘要： An electronic package with two circuitized substrates which sandwich an interposer therebetween, the interposer electrically interconnecting the substrates and also including an opening therein in which is positioned at least one electrical component, such as a semiconductor chip, coupled to the lower or base substrate. A second component may also be mounted on and electrically coupled to the upper surface of the top or cover circuitized substrate. A method of making such a package is also provided.

摘要翻译： 具有夹在其间的插入件的两个电路化基板的电子封装件，所述插入器将所述基板电连接并且还包括其中的开口，所述开口位于耦合到所述下基板或基底基板的至少一个电部件（例如半导体芯片）。 第二部件也可以安装在顶部或盖子电路化基板的上表面上并电耦合到顶部或盖子电路化基板的上表面。 还提供了制造这种包装的方法。

公开(公告)号：US20120015532A1

公开(公告)日：2012-01-19

申请号：US12837640

申请日：2010-07-16

申请人： Voya R. Markovich ,  Ronald V. Smith ,  How T. Lin ,  Frank D. Egitto ,  Rabindra N. Das ,  William E. Wilson ,  Rajinder S. Rai

发明人： Voya R. Markovich ,  Ronald V. Smith ,  How T. Lin ,  Frank D. Egitto ,  Rabindra N. Das ,  William E. Wilson ,  Rajinder S. Rai

IPC分类号： H01R12/00 ,  H01L21/66

CPC分类号： H05K3/3436 ,  H05K1/111 ,  H05K2201/10378 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/4919

摘要： A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal.

摘要翻译： 柔性，高密度贴花及其在柔性芯片载体和印刷线路板之间形成可拆卸电互连的方法。 柔性贴花在第一表面上具有细间距焊盘，并且在第二表面上具有比微细间距更宽的间距的焊盘，设计成电连接到半导体器件的第一表面上的细间距焊盘和较宽间距 第二表面上的焊盘被设计成电连接到印刷线路板等。 第一表面上的焊盘通过柔性贴花中的一个或多个绝缘水平导电地连接到第二表面上的焊盘。

公开(公告)号：US08063315B2

公开(公告)日：2011-11-22

申请号：US11802434

申请日：2007-05-23

申请人： Rabindra N. Das ,  Kostas I. Papathomas ,  Voya R. Markovich

发明人： Rabindra N. Das ,  Kostas I. Papathomas ,  Voya R. Markovich

IPC分类号： H05K1/11

CPC分类号： H05K1/0313 ,  B23K26/382 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/16 ,  B23K2103/172 ,  B23K2103/52 ,  H01B1/22 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/097 ,  H05K3/4053 ,  H05K3/4069 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0257 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/10378 ,  H05K2203/0425 ,  H05K2203/1152 ,  Y10T29/49128 ,  Y10T29/49165 ,  H01L2924/00

摘要： A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a metallic component including nano-particles and may include additional elements such as solder or other metal micro-particles, as well as a conducting polymer and organic. The particles of the paste composition sinter and, depending on what additional elements are added, melt as a result of lamination to thereby form effective contiguous circuit paths through the paste. A method of making such a substrate is also provided, as is an electrical assembly utilizing the substrate and including an electronic component such as a semiconductor chip coupled thereto.

摘要翻译： 一种电路化基板，包括用于提供电连接的导电浆料。 在一个实施方案中，糊状物包括包含纳米颗粒的金属组分，并且可以包括附加元素，例如焊料或其它金属微粒，以及导电聚合物和有机物。 糊料组合物的颗粒烧结并且根据添加的另外的元素而熔化，因为层压，从而形成通过糊料的有效连续的电路。 还提供了制造这种基板的方法，以及利用该基板并且包括诸如与其耦合的半导体芯片的电子部件的电组件。

公开(公告)号：US08607445B1

公开(公告)日：2013-12-17

申请号：US13517776

申请日：2012-06-14

申请人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin

发明人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin

IPC分类号： H05K3/30

CPC分类号： H01G4/206 ,  H01G4/232 ,  H01G4/33 ,  H05K1/162 ,  H05K3/0032 ,  H05K3/107 ,  H05K2201/0209 ,  H05K2201/0257 ,  H05K2201/09236 ,  H05K2201/09309 ,  H05K2201/09881 ,  H05K2203/0108 ,  H05K2203/066

摘要： A method of making a circuitized substrate which includes at least one and possibly several capacitors as part thereof. In one embodiment, the substrate is produced by forming a layer of capacitive dielectric material on a dielectric layer and thereafter forming channels with the capacitive material, e.g., using a laser. The channels are then filled with conductive material, e.g., copper, using selected deposition techniques, e.g., sputtering, electro-less plating and electroplating. A second dielectric layer is then formed atop the capacitor and a capacitor “core” results. This “core” may then be combined with other dielectric and conductive layers to form a larger, multilayered PCB or chip carrier. In an alternative approach, the capacitive dielectric material may be photo-imageable, with the channels being formed using conventional exposure and development processing known in the art.

摘要翻译： 一种制造电路化衬底的方法，其包括至少一个可能的几个电容器作为其一部分。 在一个实施例中，通过在电介质层上形成电容电介质材料层，然后用电容材料形成通道，例如使用激光来制造衬底。 然后使用所选择的沉积技术，例如溅射，无电镀和电镀，用导电材料（例如铜）填充通道。 然后在电容器顶部形成第二电介质层，并产生电容器“芯”。 然后，该“芯”可以与其它电介质层和导电层组合以形成较大的多层PCB或芯片载体。 在替代方法中，电容介电材料可以是可光成像的，其中通道是使用本领域已知的常规曝光和显影处理形成的。