公开(公告)号：US5171656A

公开(公告)日：1992-12-15

申请号：US556014

申请日：1990-07-20

Applicant: Michael Sebald ,  Juergen Beck ,  Rainer Leuschner ,  Recai Sezi ,  Hans J. Bestmann

Inventor： Michael Sebald ,  Juergen Beck ,  Rainer Leuschner ,  Recai Sezi ,  Hans J. Bestmann

IPC: G03F7/039 ,  G03F7/016 ,  G03F7/075 ,  H01L21/027

CPC classification number: G03F7/0163

Abstract: Photosensitive compositions comprising a polymer and a photoactive constituent, which are able to be developed with aqueous, alkaline agents exhibit good bleaching properties in the DUV range, whereby the photoactive constituent has good solubility-inhibiting properties and does not evaporate during the drying process, when the photoactive constituent comprises diazo tetronic acid or a diazo tetronic acid derivative of the following structure: ##STR1## where the residues R are the same or different and signify H, alkyl, cycloalkyl, aryl or a silicon-containing residue.

Abstract translation: 包含能够用水性碱性试剂显影的聚合物和光活性成分的光敏性组合物在DUV范围内表现出良好的漂白性能，由此光活性成分具有良好的溶解性抑制性能，并且在干燥过程中不会蒸发， 光活性组分包括重氮四氢酸或具有以下结构的重氮四氢酸衍生物：其中残基R相同或不同并且表示H，烷基，环烷基，芳基或含硅残基。

公开(公告)号：US4812200A

公开(公告)日：1989-03-14

申请号：US166436

申请日：1988-03-10

Applicant: Siegfried Birkle ,  Recai Sezi ,  Hans-Dieter Feucht ,  Rainer Leuschner

Inventor： Siegfried Birkle ,  Recai Sezi ,  Hans-Dieter Feucht ,  Rainer Leuschner

IPC: G03C1/72 ,  G03F7/022 ,  G03F7/039 ,  G03F7/075 ,  H01L21/312 ,  B44C1/22 ,  B29C37/00 ,  C03C15/00 ,  C03C25/06

CPC classification number: G03F7/0758

Abstract: In generating resist structures according to bilayer technology a series of requirements is made of silicon-containing positive resists. The new method is intended to ensure, inter alia, the profile retention respectively the ability of the resist structures to maintain precise dimensions. According to the invention vinyl phenol-vinyl silane copolymers are used as resist materials.

Abstract translation: 在根据双层技术生成抗蚀剂结构的过程中，对含硅正性抗蚀剂有一系列要求。 新方法旨在确保分别保留抗蚀剂结构保持精确尺寸的能力。 根据本发明，使用乙烯基苯酚 - 乙烯基硅烷共聚物作为抗蚀材料。

公开(公告)号：US08258633B2

公开(公告)日：2012-09-04

申请号：US12750969

申请日：2010-03-31

Applicant: Recai Sezi ,  Thorsten Meyer

Inventor： Recai Sezi ,  Thorsten Meyer

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/28

CPC classification number: H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L2224/03442 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/211 ,  H01L2224/221 ,  H01L2224/96 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/10336 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A polymer layer is generated on a wafer. The wafer is then separated into semiconductor chips. At least two semiconductor chips are placed on a carrier with the polymer layer facing the carrier. The at least two semiconductor chips are covered with an encapsulating material to form an encapsulant. The carrier is removed from the encapsulant, and the encapsulant and the polymer layer are thinned.

Abstract translation: 在晶片上产生聚合物层。 然后将晶片分离成半导体芯片。 将至少两个半导体芯片放置在载体上，聚合物层面向载体。 至少两个半导体芯片被封装材料覆盖以形成密封剂。 载体从密封剂中除去，密封剂和聚合物层变薄。

公开(公告)号：US20120208319A1

公开(公告)日：2012-08-16

申请号：US13453787

申请日：2012-04-23

Applicant: Thorsten Meyer ,  Rainer Leuschner ,  Gerald Ofner ,  Reinhard Hess ,  Recai Sezi

Inventor： Thorsten Meyer ,  Rainer Leuschner ,  Gerald Ofner ,  Reinhard Hess ,  Recai Sezi

IPC: H01L21/77 ,  B23K31/02 ,  H01L21/78

CPC classification number: H01L21/568 ,  H01L23/49811 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/12105 ,  H01L2224/211 ,  H01L2224/221 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2224/82

Abstract: A method of manufacturing a semiconductor package includes embedding a semiconductor chip in an encapsulant. First contact pads are formed on a first main face of the semiconductor package and second contact pads are formed on a second main face of the semiconductor package opposite the first main face. A diameter d in micrometers of an exposed contact pad area of the second contact pads satisfies d≧(8/25)x+142 μm, where x is a pitch of the second contact pads in micrometers.

Abstract translation: 制造半导体封装的方法包括将半导体芯片嵌入密封剂中。 第一接触焊盘形成在半导体封装的第一主面上，并且第二接触焊盘形成在与第一主面相对的半导体封装的第二主面上。 第二接触焊盘的暴露的接触焊盘区域的直径d（以微米为单位）满足d≥（8/25）×+142μm，其中x是以微米为单位的第二接触焊盘的间距。

公开(公告)号：US08183696B2

公开(公告)日：2012-05-22

申请号：US12750946

申请日：2010-03-31

Applicant: Thorsten Meyer ,  Rainer Leuschner ,  Gerald Ofner ,  Reinhard Hess ,  Recai Sezi

Inventor： Thorsten Meyer ,  Rainer Leuschner ,  Gerald Ofner ,  Reinhard Hess ,  Recai Sezi

IPC: H01L23/48 ,  H01L21/78 ,  H01L23/488 ,  H01L21/98

CPC classification number: H01L21/568 ,  H01L23/49811 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/12105 ,  H01L2224/211 ,  H01L2224/221 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2224/82

Abstract: A semiconductor package includes a semiconductor chip, an encapsulant embedding the semiconductor chip, first contact pads on a first main face of the semiconductor package and second contact pads on a second main face of the semiconductor package opposite to the first main face. The diameter d in micrometers of an exposed contact pad area of the second contact pads satisfies d≧(8/25)x+142 μm, wherein x is the pitch of the second contact pads in micrometers.

Abstract translation: 半导体封装包括半导体芯片，将半导体芯片嵌入的密封剂，在半导体封装的第一主面上的第一接触焊盘和与第一主面相对的半导体封装的第二主面上的第二接触焊盘。 第二接触焊盘的暴露的接触焊盘区域的直径d（以微米为单位）满足d≥（8/25）×+142μm，其中x是以微米为单位的第二接触焊盘的间距。

公开(公告)号：US20110241222A1

公开(公告)日：2011-10-06

申请号：US12750969

申请日：2010-03-31

Applicant: Recai Sezi ,  Thorsten Meyer

Inventor： Recai Sezi ,  Thorsten Meyer

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/28

CPC classification number: H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L2224/03442 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/211 ,  H01L2224/221 ,  H01L2224/96 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/10336 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A polymer layer is generated on a wafer. The wafer is then separated into semiconductor chips. At least two semiconductor chips are placed on a carrier with the polymer layer facing the carrier. The at least two semiconductor chips are covered with an encapsulating material to form an encapsulant. The carrier is removed from the encapsulant, and the encapsulant and the polymer layer are thinned.

Abstract translation: 在晶片上产生聚合物层。 然后将晶片分离成半导体芯片。 将至少两个半导体芯片放置在载体上，聚合物层面向载体。 至少两个半导体芯片被封装材料覆盖以形成密封剂。 载体从密封剂中除去，密封剂和聚合物层变薄。

公开(公告)号：US20110241218A1

公开(公告)日：2011-10-06

申请号：US12750946

申请日：2010-03-31

Applicant: Thorsten Meyer ,  Rainer Leuschner ,  Gerald Ofner ,  Reinhard Hess ,  Recai Sezi

Inventor： Thorsten Meyer ,  Rainer Leuschner ,  Gerald Ofner ,  Reinhard Hess ,  Recai Sezi

IPC: H01L23/48 ,  H01L23/488 ,  H01L21/78 ,  H01L21/98

CPC classification number: H01L21/568 ,  H01L23/49811 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/12105 ,  H01L2224/211 ,  H01L2224/221 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2224/82

Abstract: A semiconductor package includes a semiconductor chip, an encapsulant embedding the semiconductor chip, first contact pads on a first main face of the semiconductor package and second contact pads on a second main face of the semiconductor package opposite to the first main face. The diameter d in micrometers of an exposed contact pad area of the second contact pads satisfies d≧(8/25)x+142 μm, wherein x is the pitch of the second contact pads in micrometers.

Abstract translation: 半导体封装包括半导体芯片，将半导体芯片嵌入的密封剂，在半导体封装的第一主面上的第一接触焊盘和与第一主面相对的半导体封装的第二主面上的第二接触焊盘。 第二接触焊盘的暴露的接触焊盘区域的直径d（以微米为单位）满足d≥（8/25）×+142μm，其中x是以微米为单位的第二接触焊盘的间距。

公开(公告)号：US20100013091A1

公开(公告)日：2010-01-21

申请号：US12174155

申请日：2008-07-16

Applicant: Thorsten Meyer ,  Recai Sezi

Inventor： Thorsten Meyer ,  Recai Sezi

IPC: H01L21/768 ,  H01L23/498

CPC classification number: H01L24/96 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00

Abstract: A semiconductor device including a chip including an integrated circuit, a conductive layer, a copolymer layer and metal elements. The conductive layer is disposed over the chip and electrically coupled to the integrated circuit. The copolymer is disposed on the conductive layer. The metal elements are electrically coupled to the conductive layer via through-connects in the copolymer layer.

Abstract translation: 一种包括集成电路，导电层，共聚物层和金属元素的芯片的半导体器件。 导电层设置在芯片上并电耦合到集成电路。 共聚物设置在导电层上。 金属元件通过共聚物层中的通孔电连接到导电层。

公开(公告)号：US07476412B2

公开(公告)日：2009-01-13

申请号：US09817963

申请日：2001-03-27

Applicant: Klaus Lowack ,  Günter Schmid ,  Recai Sezi

Inventor： Klaus Lowack ,  Günter Schmid ,  Recai Sezi

IPC: B05D5/12 ,  G03F7/00 ,  H01L21/00

CPC classification number: C23C18/30 ,  C23C18/1608 ,  H05K3/184 ,  H05K3/465 ,  H05K3/4661

Abstract: The invention relates to a process for the metallization of an insulator and/or a dielectric, wherein the insulator is firstly activated, it is subsequently coated with another insulator and the latter is patterned, then the first is seeded and lastly metallized.

公开(公告)号：US20080265383A1

公开(公告)日：2008-10-30

申请号：US11939938

申请日：2007-11-14

Applicant: Markus Brunnbauer ,  Jens Pohl ,  Klaus Pressel ,  Thorsten Meyer ,  Recai Sezi ,  Stephan Bradl ,  Ralf Plieninger

Inventor： Markus Brunnbauer ,  Jens Pohl ,  Klaus Pressel ,  Thorsten Meyer ,  Recai Sezi ,  Stephan Bradl ,  Ralf Plieninger

IPC: H01L23/552 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5389 ,  H01L23/60 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/056 ,  H01L2224/12105 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05099

Abstract: A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.

Abstract translation: 工件具有至少两个半导体芯片，每个半导体芯片具有至少部分暴露的第一主表面和第二主表面。 所述工件还包括布置在所述至少两个半导体芯片上的导电层，所述导电层至少布置在所述第二主表面的区域上，所述模制化合物布置在所述导电层上。 在模塑料中配置有接触孔。