公开(公告)号：US09116368B2

公开(公告)日：2015-08-25

申请号：US14122687

申请日：2012-08-21

申请人： Hiroto Kawakami ,  Eiji Yoshida ,  Yutaka Miyamoto

发明人： Hiroto Kawakami ,  Eiji Yoshida ,  Yutaka Miyamoto

IPC分类号： G02F1/01 ,  G02F1/00 ,  H04B10/12 ,  G02B6/28 ,  G02F1/21 ,  H04B10/54 ,  H04L27/34 ,  H04L27/36 ,  H04B10/548 ,  H04B10/50

CPC分类号： G02F1/0123 ,  G02B6/28 ,  G02F1/21 ,  G02F2001/212 ,  H04B10/5053 ,  H04B10/50575 ,  H04B10/50595 ,  H04B10/541 ,  H04B10/548 ,  H04L27/3411 ,  H04L27/364

摘要： An optical modulation device including: bias power supplies that output a signal having a bias voltage corresponding to the null point of an optical modulation unit to the optical modulation unit; and synchronous detection circuits that determine whether an intensity of a QAM signal at a drift non-occurrence time where no drift occurs in the bias voltage becomes larger or smaller than the intensity of the QAM signal at a drift occurrence time where a drift occurs in the bias voltage, adjust the bias voltage to maximize the intensity of the QAM signal when determining that the intensity of the QAM signal at the drift non-occurrence time becomes larger than the intensity of the QAM signal at the drift occurrence time, and adjust the bias voltage to minimize the intensity of the QAM signal when determining that the intensity of the QAM signal at the drift non-occurrence time becomes smaller than the intensity of the QAM signal at the drift occurrence time.

摘要翻译： 一种光调制装置，包括：向光调制单元输出具有对应于光调制单元的零点的偏置电压的信号的偏置电源; 以及同步检测电路，其确定在偏置电压中不发生漂移的漂移不发生时间的QAM信号的强度是否大于或者小于在漂移发生时的QAM信号的强度， 当确定漂移不发生时间的QAM信号的强度变得大于漂移发生时的QAM信号的强度时，调整偏置电压以最大化QAM信号的强度，并且调整偏置 电压，以便在确定漂移不发生时间的QAM信号的强度变得小于漂移发生时的QAM信号的强度时，使QAM信号的强度最小化。

公开(公告)号：US09020361B2

公开(公告)日：2015-04-28

申请号：US13393101

申请日：2010-09-07

申请人： Hiroto Kawakami ,  Eiji Yoshida ,  Masahiro Tachibana

发明人： Hiroto Kawakami ,  Eiji Yoshida ,  Masahiro Tachibana

IPC分类号： H04B10/04 ,  G02F1/01 ,  H04B10/50

CPC分类号： G02F1/0123 ,  H04B10/5053 ,  H04B10/5057 ,  H04B10/50572 ,  H04B10/50575 ,  H04B10/5561

摘要： An optical signal transmitter of the present invention includes: two phase modulating portions; a phase shifter which displaces carrier phases of two output lights from the phase modulating portions by π/2; a multiplexing portion which multiplexes two signal lights, carrier phases of the two signal lights being made orthogonal to each other by the phase shifter; a drive signal electrode portion which supplies a differential data signal to each of four paths of interference optical waveguides, each of the two phase modulating portions having the interference optical waveguides, the differential data signal having an amplitude which is equal to a half-wave voltage Vπ of the two phase modulating portions; a drive amplifier which amplifies the differential data signal to be supplied to each of the four paths of the interference optical waveguides; a data bias electrode portion which supplies a total of four data bias voltages to two arms, each of the two phase modulating portions having the two arms; an orthogonal bias electrode portion which supplies an orthogonal bias voltage to the phase shifter; a data bias power supply portion that adjusts delay times in the two phase modulating portions by applying the data bias voltages to the data bias electrode portion; an orthogonal bias power supply portion that adjusts a delay amount relative to a light output from at least one of the two phase modulating portions by applying the orthogonal bias voltage to the orthogonal bias electrode portion; a dither signal adding portion that adds a dither signal to at most three of the four data bias voltages; a dither detecting portion which detects a wave that is n-times a dither component from an output of the multiplexing portion (where n is an integer equal to or greater than one); and an orthogonal bias control portion which feeds back a detection result of the dither detecting portion to the orthogonal bias power supply portion. The orthogonal bias power supply portion adjusts the delay amount relative to the light output from at least one of the two phase modulating portions by controlling the orthogonal bias voltage to be applied to the orthogonal bias electrode portion based on feedback from the orthogonal bias control portion.

公开(公告)号：US08977141B2

公开(公告)日：2015-03-10

申请号：US13983233

申请日：2012-02-07

申请人： Kengo Horikoshi ,  Etsushi Yamazaki ,  Takayuki Kobayashi ,  Eiji Yoshida ,  Yutaka Miyamoto

发明人： Kengo Horikoshi ,  Etsushi Yamazaki ,  Takayuki Kobayashi ,  Eiji Yoshida ,  Yutaka Miyamoto

IPC分类号： H04B10/06 ,  H04B1/10 ,  H03H21/00 ,  H04B10/61 ,  H04L25/03 ,  H04B10/00

CPC分类号： H04B1/10 ,  H03H21/0012 ,  H03H2021/0092 ,  H04B10/616 ,  H04L25/03261

摘要： A parameter of an adaptive filter is optimized so that inter-symbol interference having an amount corresponding to an inserted fixed filter remains. A digital signal processing apparatus which is included in an optical signal receiver and processes a digital signal converted from an optical signal is provided with: a linear adaptive filter which applies a dynamically controllable linear transfer function to the digital signal; a maximum likelihood sequence decoder which applies a transfer function of a transmission-path model to a plurality of signal sequence candidates to generate a plurality of reference signals, and decodes a reception signal using maximum likelihood sequence estimation which evaluates the differences between an output signal of the linear adaptive filter and the reference signals to estimate the most likely transmission time sequence; a signal regenerator which generates a signal corresponding to decoded data from the maximum likelihood sequence decoder; a feedback distortion adding filter which adds distortion that is equivalent to the transmission-path model used in the maximum likelihood sequence decoder to an output signal of the signal regenerator; and an adaptive equalization filter control block which updates a tap coefficient of the linear adaptive filter in accordance with an LMS algorithm using the difference between a target signal that is an output signal of the feedback distortion adding filter and the digital signal as an error signal.

摘要翻译： 对自适应滤波器的参数进行优化，使得具有与插入的固定滤波器相对应的量的符号间干扰保留。 包括在光信号接收机中并处理从光信号转换的数字信号的数字信号处理装置具有：向数字信号施加动态可控线性传递函数的线性自适应滤波器; 最大似然序列解码器，其将传输路径模型的传递函数应用于多个信号序列候选以产生多个参考信号，并且使用最大似然序列估计解码接收信号，所述最大似然序列估计用于评估接收信号的输出信号 线性自适应滤波器和参考信号来估计最可能的传输时间序列; 信号再生器，其生成对应于来自最大似然序列解码器的解码数据的信号; 将与最大似然序列解码器中使用的传输路径模型相当的失真与信号再生器的输出信号相加的反馈失真相加滤波器; 以及自适应均衡滤波器控制块，其使用作为反馈失真相加滤波器的输出信号的目标信号和数字信号之间的差作为误差信号，根据LMS算法更新线性自适应滤波器的抽头系数。

公开(公告)号：US08899669B2

公开(公告)日：2014-12-02

申请号：US13976718

申请日：2011-01-12

申请人： Eiji Yoshida

发明人： Eiji Yoshida

IPC分类号： B62D25/06 ,  B62D29/04 ,  B62D29/00

CPC分类号： B62D25/06 ,  B62D29/005 ,  B62D29/04 ,  B62D29/043

摘要： To obtain a vehicular panel structure that can suppress changes in angles between vehicle frame members.Ribs (30) and (32) are formed in each corner portion on an undersurface side of a roof panel (28) in such a way as to straddle headers (38) and roof side rails (12). Engaging holes (34) are formed in both lengthwise direction end sides of each of the ribs (30) and (32), and weld nuts (36) disposed on the headers (38) and the roof side rails (12) are engaged with the engaging holes (34).

摘要翻译： 以获得可以抑制车架构件之间的角度变化的车辆面板结构。 在顶板（28）的下表面侧的每个角部分中形成肋（30）和（32），以跨越集管（38）和屋顶侧轨（12）。 在每个肋（30）和（32）的两个长度方向的端侧形成啮合孔（34），并且设置在集管（38）和屋顶侧轨道（12）上的焊接螺母（36）与 接合孔（34）。

公开(公告)号：US08781029B2

公开(公告)日：2014-07-15

申请号：US13701963

申请日：2011-06-17

申请人： Tadao Nakagawa ,  Munehiro Matsui ,  Koichi Ishihara ,  Riichi Kudo ,  Takayuki Kobayashi ,  Etsushi Yamazaki ,  Akihide Sano ,  Eiji Yoshida ,  Masato Mizoguchi ,  Yutaka Miyamoto ,  Yasushi Takatori

发明人： Tadao Nakagawa ,  Munehiro Matsui ,  Koichi Ishihara ,  Riichi Kudo ,  Takayuki Kobayashi ,  Etsushi Yamazaki ,  Akihide Sano ,  Eiji Yoshida ,  Masato Mizoguchi ,  Yutaka Miyamoto ,  Yasushi Takatori

IPC分类号： H03K9/10 ,  H04L17/14

CPC分类号： H04L27/14 ,  H04B7/10 ,  H04B10/611 ,  H04B10/6164 ,  H04B17/327 ,  H04L27/2659 ,  H04L2027/0026 ,  H04L2027/0032 ,  H04L2027/0046

摘要： Provided is a frequency offset estimation apparatus that appropriately estimates and compensates for a frequency offset of a received signal when estimating the frequency offset which is the difference between a carrier frequency of the received signal and the frequency of an output signal of a local oscillator. The frequency offset estimation apparatus converts the received signal sampled in advance with a predetermined sampling frequency into a frequency spectrum having N frequency components, limits a frequency band of negative frequency components from 1 to N/2 of the frequency spectrum and a frequency band of positive frequency components from N/2+1 to N of the frequency spectrum, calculates the sum of the squares of the positive frequency components of the frequency spectrum that have been subjected to frequency band limitation and the sum of the squares of the negative frequency components of the frequency spectrum that have been subjected to frequency band limitation to calculate power of the positive frequency components and power of the negative frequency components, and cyclically shifts all frequency components of the frequency spectrum in a frequency domain until the absolute value of a power difference between the power of the positive frequency components and the power of the negative frequency components is less than or equal to a predetermined threshold value, and estimates the frequency offset based on a shift amount until the absolute value is less than or equal to the threshold value.

摘要翻译： 提供一种频率偏移估计装置，其在估计作为接收信号的载波频率与本地振荡器的输出信号的频率之间的差的频率偏移时，适当地估计和补偿接收信号的频率偏移。 频率偏移估计装置将预先采样的接收信号以预定的采样频率转换成具有N个频率分量的频谱，将频谱的负频率分量的频带从1到N / 2限制，并且频带为正 频率分量从频谱的N / 2 + 1到N的频率分量计算已经经受频带限制的频谱的正频率分量的平方和的和的频率分量的平方和之和 已经进行了频带限制的频谱，以计算正频率分量的功率和负频率分量的功率，并且循环移位频域中的频谱的所有频率分量，直到频域中的频差的绝对值 正频率分量的功率和ne的功率 同步频率分量小于或等于预定阈值，并且基于偏移量来估计频率偏移，直到绝对值小于或等于阈值。

公开(公告)号：US20130070874A1

公开(公告)日：2013-03-21

申请号：US13701963

申请日：2011-06-17

申请人： Tadao Nakagawa ,  Munehiro Matsui ,  Koichi Ishihara ,  Riichi Kudo ,  Takayuki Kobayashi ,  Etsushi Yamazaki ,  Akihide Sano ,  Eiji Yoshida ,  Masato Mizoguchi ,  Yutaka Miyamoto ,  Yasushi Takatori

发明人： Tadao Nakagawa ,  Munehiro Matsui ,  Koichi Ishihara ,  Riichi Kudo ,  Takayuki Kobayashi ,  Etsushi Yamazaki ,  Akihide Sano ,  Eiji Yoshida ,  Masato Mizoguchi ,  Yutaka Miyamoto ,  Yasushi Takatori

IPC分类号： H04L27/14

CPC分类号： H04L27/14 ,  H04B7/10 ,  H04B10/611 ,  H04B10/6164 ,  H04B17/327 ,  H04L27/2659 ,  H04L2027/0026 ,  H04L2027/0032 ,  H04L2027/0046

摘要： Provided is a frequency offset estimation apparatus that appropriately estimates and compensates for a frequency offset of a received signal when estimating the frequency offset which is the difference between a carrier frequency of the received signal and the frequency of an output signal of a local oscillator. The frequency offset estimation apparatus converts the received signal sampled in advance with a predetermined sampling frequency into a frequency spectrum having N frequency components, limits a frequency band of negative frequency components from 1 to N/2 of the frequency spectrum and a frequency band of positive frequency components from N/2+1 to N of the frequency spectrum, calculates the sum of the squares of the positive frequency components of the frequency spectrum that have been subjected to frequency band limitation and the sum of the squares of the negative frequency components of the frequency spectrum that have been subjected to frequency band limitation to calculate power of the positive frequency components and power of the negative frequency components, and cyclically shifts all frequency components of the frequency spectrum in a frequency domain until the absolute value of a power difference between the power of the positive frequency components and the power of the negative frequency components is less than or equal to a predetermined threshold value, and estimates the frequency offset based on a shift amount until the absolute value is less than or equal to the threshold value.

摘要翻译： 提供一种频率偏移估计装置，其在估计作为接收信号的载波频率与本地振荡器的输出信号的频率之间的差的频率偏移时，适当地估计和补偿接收信号的频率偏移。 频率偏移估计装置将预先采样的接收信号以预定的采样频率转换成具有N个频率分量的频谱，将频谱的负频率分量的频带从1到N / 2限制，并且频带为正 频率分量从频谱的N / 2 + 1到N的频率分量计算已经经受频带限制的频谱的正频率分量的平方和的和的频率分量的平方和之和 已经经过频带限制的频谱，以计算正频率分量的功率和负频率分量的功率，并且循环移位频域中的频谱的所有频率分量，直到频域中的功率差的绝对值 正频率分量的功率和ne的功率 同步频率分量小于或等于预定阈值，并且基于偏移量来估计频率偏移，直到绝对值小于或等于阈值。

公开(公告)号：US08399932B2

公开(公告)日：2013-03-19

申请号：US13118918

申请日：2011-05-31

申请人： Eiji Yoshida ,  Akihisa Yamaguchi

发明人： Eiji Yoshida ,  Akihisa Yamaguchi

IPC分类号： H01L21/70

CPC分类号： H01L27/092 ,  H01L21/823475 ,  H01L21/823493 ,  H01L21/823871 ,  H01L21/823892 ,  H01L27/0207 ,  H01L27/11 ,  H01L27/1104 ,  H01L29/1083 ,  H01L29/7833

摘要： A semiconductor device includes a silicon substrate; an element isolation region; an element region including a first well; a contact region; a gate electrode extending from the element region to a sub-region of the element isolation region between the element region and the contact region; a source diffusion region; a drain diffusion region; a first insulating region contacting a lower end of the source diffusion region; a second insulating region contacting a lower end of the drain diffusion region; and a via plug configured to electrically connect the gate electrode with the contact region. The first well is disposed below the gate electrode and is electrically connected with the contact region via the silicon substrate under the sub-region. The lower end of the element isolation region except the sub-region is located lower than the lower end of the first well.

摘要翻译： 半导体器件包括硅衬底; 元件隔离区; 包括第一井的元件区域; 接触区域 从元件区域延伸到元件区域和接触区域之间的元件隔离区域的子区域的栅电极; 源扩散区; 漏极扩散区域; 与源极扩散区域的下端接触的第一绝缘区域; 接触所述漏极扩散区域的下端的第二绝缘区域; 以及通孔，被配置为将所述栅极电极与所述接触区域电连接。 第一阱设置在栅电极下方，并且在子区域下经由硅衬底与接触区域电连接。 除了子区域之外的元件隔离区域的下端位于比第一阱的下端低的位置。

公开(公告)号：US20120106618A1

公开(公告)日：2012-05-03

申请号：US13381114

申请日：2010-07-15

申请人： Riichi Kudo ,  Takayuki Kobayashi ,  Koichi Ishihara ,  Yasushi Takatori ,  Hideyuki Nosaka ,  Munehiro Matsui ,  Masato Mizoguchi ,  Tadao Nakagawa ,  Etsushi Yamazaki ,  Akihide Sano ,  Yutaka Miyamoto ,  Eiji Yoshida

发明人： Riichi Kudo ,  Takayuki Kobayashi ,  Koichi Ishihara ,  Yasushi Takatori ,  Hideyuki Nosaka ,  Munehiro Matsui ,  Masato Mizoguchi ,  Tadao Nakagawa ,  Etsushi Yamazaki ,  Akihide Sano ,  Yutaka Miyamoto ,  Eiji Yoshida

IPC分类号： H04L27/06 ,  H04L27/01

CPC分类号： H04L27/2672 ,  H04L25/03159 ,  H04L27/2633 ,  H04L27/265 ,  H04L27/266 ,  H04L2025/03414

摘要： A frequency domain multiplexed signal receiving method which decodes received signals that are multiplexed in a frequency domain, includes: a digital signal acquisition step of acquiring digital signals from the received signals that are multiplexed in the frequency domain; an offset discrete Fourier transform step of applying an offset discrete Fourier transform to odd discrete point numbers based on the acquired digital signals; and a decode step of decoding frequency domain digital signals in the frequency domain obtained by the offset discrete Fourier transform, and that are the frequency domain digital signals of one or more frequency channels.

摘要翻译： 一种频域复用信号接收方法，对在频域中被复用的接收信号进行解码，包括：数字信号获取步骤，从在频域中复用的接收信号中获取数字信号; 偏移离散傅立叶变换步骤，基于所获取的数字信号将偏移离散付里叶变换应用于奇数离散点数; 以及解码步骤，对通过偏移离散付里叶变换获得的频域中的频域数字信号进行解码，并且其是一个或多个频率信道的频域数字信号。

公开(公告)号：US07884459B2

公开(公告)日：2011-02-08

申请号：US12210645

申请日：2008-09-15

申请人： Eiji Yoshida ,  Takao Ohno ,  Yoshito Akutagawa ,  Koji Sawahata ,  Masataka Mizukoshi ,  Takao Nishimura ,  Akira Takashima ,  Mitsuhisa Watanabe

发明人： Eiji Yoshida ,  Takao Ohno ,  Yoshito Akutagawa ,  Koji Sawahata ,  Masataka Mizukoshi ,  Takao Nishimura ,  Akira Takashima ,  Mitsuhisa Watanabe

IPC分类号： H01L23/02

CPC分类号： H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/13008 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/45144 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.

摘要翻译： 提供一种半导体器件，其形成具有彼此堆叠的半导体器件的三维半导体器件。 在该半导体器件中，在具有形成在外侧的主面上的集成电路单元和电极焊盘的硅半导体基板中形成有孔。 通过蚀刻形成孔，电极焊盘用作蚀刻停止层。 埋入电极形成在孔中。 该嵌入电极用于将电极焊盘导电到硅半导体衬底的底侧的主表面。

公开(公告)号：US07166882B2

公开(公告)日：2007-01-23

申请号：US10095101

申请日：2002-03-12

申请人： Shunji Nakamura ,  Eiji Yoshida

发明人： Shunji Nakamura ,  Eiji Yoshida

IPC分类号： H01L31/119

CPC分类号： H01L27/10852 ,  H01L21/7682 ,  H01L27/10814 ,  H01L27/10873 ,  H01L27/10885 ,  H01L27/10891 ,  H01L27/10894 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device comprises: an insulation film 72 formed over a silicon substrate 10, an insulation film 78 formed on the insulation film 72 and having opening 82, and conductor 84 formed at least in the opening 82. Cavity 88 having the peripheral edges conformed to a configuration of the opening 82 is formed in the insulation film 72. The cavity 88 is formed in the region between the electrodes or the regions between the interconnection layers so as to decrease the dielectric constant between the electrodes or between the interconnection layers, whereby the parasitic capacitances of the region between the electrodes or the region between the interconnection layers can be drastically decreased, and consequently the semiconductor device can have higher speed.

摘要翻译： 半导体器件包括：形成在硅衬底10上的绝缘膜72，形成在绝缘膜72上并具有开口82的绝缘膜78和至少形成在开口82中的导体84。 在绝缘膜72上形成具有与开口82的构造一致的周缘的腔88。 空腔88形成在电极之间的区域或互连层之间的区域中，以便降低电极之间或互连层之间的介电常数，由此电极之间的区域或互连层之间的区域的寄生电容 层可以大大降低，因此半导体器件可以具有更高的速度。