公开(公告)号：US07026680B2

公开(公告)日：2006-04-11

申请号：US10790760

申请日：2004-03-03

申请人： John David Baniecki ,  Takeshi Shioga ,  Kazuaki Kurihara

发明人： John David Baniecki ,  Takeshi Shioga ,  Kazuaki Kurihara

IPC分类号： H01L27/108 ,  H01L29/76

CPC分类号： H01L28/55 ,  H01L27/0805

摘要： An integrated thin film capacitive element comprising a dielectric material of the specified composition that exhibits increased voltage tunability of capacitance and capacitance density and a production process thereof are disclosed. The integrated thin film capacitive element comprises a capacitor structure constituted from a lower electrode, a dielectric layer comprised of the high dielectric constant material represented by the formula: (Ba(1-y)(1-x)Sr(1-y)xYy)Ti1+zO3+δ with the range 0

摘要翻译： 公开了一种集成的薄膜电容元件，其包括具有增加的电容和电容密度的电压可调谐性的特定组成的介电材料及其制造方法。 集成薄膜电容元件包括由下电极构成的电容器结构，由下式表示的高介电常数材料构成的介电层：（Ba（1-y）（1-x）） Sr 1（1-y）x Y y y）Ti 1 + z O 3 +δ，其范围为0 （1-y）（1-x）+ Sr（1-y）x <1，0.007

公开(公告)号：US08058110B2

公开(公告)日：2011-11-15

申请号：US13043854

申请日：2011-03-09

申请人： Masataka Mizukoshi ,  Kanae Nakagawa ,  Takeshi Shioga ,  Kazuaki Kurihara ,  John David Baniecki

发明人： Masataka Mizukoshi ,  Kanae Nakagawa ,  Takeshi Shioga ,  Kazuaki Kurihara ,  John David Baniecki

IPC分类号： H01L21/76

CPC分类号： H01L24/91 ,  H01L21/4846 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/76801 ,  H01L21/7687 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76885 ,  H01L23/5283 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/19 ,  H01L24/45 ,  H01L24/48 ,  H01L24/82 ,  H01L2224/02333 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48132 ,  H01L2224/73267 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/381 ,  H05K3/4602 ,  H05K3/4661 ,  H05K2201/0209 ,  H05K2201/086 ,  H05K2201/09509 ,  H05K2203/0195 ,  H05K2203/0228 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： The plating method comprises the step of forming a resin layer 10 over a substrate 16; the step of cutting the surface part of the resin layer 10 with a cutting tool 12; the step of forming a seed layer 36 on the resin layer 10 by electroless plating; and the step of forming a plating film 44 on the seed layer 36 by electroplating. Suitable roughness can be give to the surface of the resin layer 10, whereby the adhesion between the seed layer 36 and the resin layer 10 can be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer 10 as are by desmearing treatment, whereby a micronized pattern of a photoresist film 40 can be formed on the resin layer 10. Thus, interconnections 44, etc. can be formed over the resin layer 10 at a narrow pitch with high reliability ensured.

摘要翻译： 电镀方法包括在基板16上形成树脂层10的步骤; 用切割工具12切割树脂层10的表面部分的步骤; 通过无电解电镀在树脂层10上形成种子层36的步骤; 以及通过电镀在种子层36上形成电镀膜44的步骤。 可以赋予树脂层10的表面适当的粗糙度，由此能够充分确保种子层36与树脂层10之间的粘附性。 在树脂层10的表面没有形成过度的深孔，如通过去污处理，从而可以在树脂层10上形成光致抗蚀剂膜40的微粉化图案。因此，可以在 确保了高可靠性的窄间距树脂层10。

公开(公告)号：US07614142B2

公开(公告)日：2009-11-10

申请号：US12068272

申请日：2008-02-05

申请人： Takeshi Shioga ,  Yoshikatsu Ishizuki ,  Kanae Nakagawa ,  Taiji Sakai ,  Masataka Mizukoshi ,  John David Baniecki ,  Kazuaki Kurihara

发明人： Takeshi Shioga ,  Yoshikatsu Ishizuki ,  Kanae Nakagawa ,  Taiji Sakai ,  Masataka Mizukoshi ,  John David Baniecki ,  Kazuaki Kurihara

IPC分类号： H05K3/36 ,  H01L23/29

CPC分类号： H01L23/50 ,  H01L21/4846 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/642 ,  H01L23/645 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/162 ,  H05K1/165 ,  H05K3/0023 ,  H05K3/0044 ,  H05K3/20 ,  H05K3/4614 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/09481 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/09763 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/0733 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2224/05599

摘要： A method for fabricating an interposer includes: forming on one primary surface of a first substrate a thin-film capacitor including a first capacitor electrode, a crystalline capacitor dielectric film formed on the first electrode and a second capacitor electrode formed on the dielectric film; and forming on the primary surface of the first substrate and the capacitor a first layer as semi-cured, and a first partial electrode to be a part of a through-electrode, buried in the first resin layer and electrically connected to the first electrode or the second electrode. The method further includes cutting an upper part of the first partial electrode and an upper part of the first resin layer with a cutting tool; forming on one primary surface of a second substrate a second resin layer as semi-cured, and a second partial electrode to be a part of the through-electrode, buried in the second resin layer and disposed in alignment with the first partial electrode; cutting an upper part of the second partial electrode and an upper part of the second resin layer with a cutting tool; making thermal processing with the first resin layer and the second resin layer in close contact with each other to adhere the first resin and the second resin layer to each other while jointing the first and second partial electrodes to each other; removing the first substrate; forming on said one primary surface of the second substrate a third resin layer, covering the thin-film capacitor, burying a third partial electrode to be a part of the through-electrode in the third resin layer, supporting the third resin layer by a supporting substrate; and removing the second substrate.

摘要翻译： 一种用于制造插入件的方法，包括：在第一基板的一个主表面上形成薄膜电容器，薄膜电容器包括第一电容器电极，形成在第一电极上的晶体电容器电介质膜和形成在电介质膜上的第二电容器电极; 并且在第一基板和电容器的主表面上形成半固化的第一层，以及作为通孔的一部分的第一部分电极，埋入第一树脂层中并电连接到第一电极或 第二电极。 该方法还包括用切割工具切割第一部分电极的上部和第一树脂层的上部; 在第二基板的一个主表面上形成半固化的第二树脂层和作为所述通孔的一部分的第二部分电极，所述第二部分电极埋入所述第二树脂层中并与所述第一部分电极对准; 用切割工具切割第二部分电极的上部和第二树脂层的上部; 使第一树脂层和第二树脂层彼此紧密接触进行热处理，以将第一和第二部分电极彼此接合，使第一树脂和第二树脂层彼此粘合; 去除第一衬底; 在所述第二基板的所述一个主表面上形成覆盖所述薄膜电容器的第三树脂层，在所述第三树脂层中埋设作为所述贯通电极的一部分的第三部分电极，通过支撑所述第三树脂层 基质; 并移除第二基板。

公开(公告)号：US20090007405A1

公开(公告)日：2009-01-08

申请号：US11790732

申请日：2007-04-27

申请人： Takeshi Shioga ,  John David Baniecki ,  Kazuaki Kurihara

发明人： Takeshi Shioga ,  John David Baniecki ,  Kazuaki Kurihara

IPC分类号： H01G7/00

CPC分类号： H01L27/0805 ,  H01L21/76877 ,  H01L24/11 ,  H01L28/40 ,  H01L2224/06102 ,  H01L2224/1147 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156

摘要： A capacitor device includes a capacitor Q constituted by a lower electrode (12) formed on a substrate (10), a dielectric film (14), and an upper electrode (16); an insulating film (18) covering the capacitor Q; a first contact hole (18a) formed in the insulating film (18) on a connection portion (16a) of the upper electrode (16); an electrode pad (20) for preventing a diffusion of solder, formed in the first contact hole (18a); and a solder bump (22) electrically connected to the electrode pad (20), and the upper electrode (16) has a protrusion portion (16a) protruding from the dielectric film (14), and is connected to the first contact hole (18a) on the protrusion portion (16a).

摘要翻译： 电容器装置包括由形成在基板（10）上的下电极（12），电介质膜（14）和上电极（16）构成的电容器Q; 覆盖电容器Q的绝缘膜（18）; 形成在所述上电极（16）的连接部（16a）上的绝缘膜（18）中的第一接触孔（18a） 用于防止形成在第一接触孔（18a）中的焊料扩散的电极焊盘（20）; 和与电极焊盘（20）电连接的焊料凸点（22），上部电极（16）具有从电介质膜（14）突出的突出部（16a），并与第一接触孔 ）突出部（16a）。

公开(公告)号：US07466152B2

公开(公告)日：2008-12-16

申请号：US11486053

申请日：2006-07-14

申请人： Takeshi Shioga ,  John David Baniecki ,  Kazuaki Kurihara

发明人： Takeshi Shioga ,  John David Baniecki ,  Kazuaki Kurihara

IPC分类号： G01R31/02

CPC分类号： G01R1/07378 ,  G01R31/2886 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2224/05599

摘要： A probe card including probes, a build-up interconnection layer having a multilayer interconnection structure therein and carrying the probes on a top surface in electrical connection with the multilayer interconnection structure, and a capacitor provided on the build-up interconnection layer in electrical connection with one of the probes via the multilayer interconnection structure, wherein the multilayer interconnection structure includes an inner via-contact in the vicinity of the probe and the capacitor is embedded in a resin insulation layer constituting the build-up layer.

摘要翻译： 一种探针卡，包括探针，其中具有多层互连结构的堆叠互连层，并且在与多层互连结构电连接的顶表面上承载探针;以及电容器，其设置在积层互连层上，与电连接 通过多层互连结构的探针中的一个，其中多层互连结构包括在探针附近的内部通孔接触，并且电容器嵌入构成堆积层的树脂绝缘层中。

公开(公告)号：US07439199B2

公开(公告)日：2008-10-21

申请号：US11581383

申请日：2006-10-17

申请人： Takeshi Shioga ,  John David Baniecki ,  Kazuaki Kurihara

发明人： Takeshi Shioga ,  John David Baniecki ,  Kazuaki Kurihara

IPC分类号： H01G7/00

CPC分类号： H01L28/55 ,  H01G4/33 ,  H01L24/73 ,  H01L27/0805 ,  H01L28/65 ,  H01L28/75 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/12044 ,  H01L2924/1515 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10S257/924 ,  Y10S438/957 ,  Y10T29/435 ,  H01L2924/00012 ,  H01L2924/00

摘要： A capacitive element is characterized by including: a base (12); a lower barrier layer (13) formed on the base (12); capacitors (Q1 and Q2) made by forming a lower electrode (14a), capacitor dielectric layers (15a), and upper electrodes (16a) in this order on the lower barrier layer (13); and an upper barrier layer (20) covering at least the capacitor dielectric layers (15a) and the lower barrier layer (13).

摘要翻译： 电容元件的特征在于包括：基座（12）; 形成在所述基座（12）上的下阻挡层（13）; 在此形成下电极（14a），电容器电介质层（15a）和上电极（16a）的电容器（Q 1和Q 2） 在下阻挡层（13）上的顺序; 和覆盖至少电容器电介质层（15a）和下阻挡层（13）的上阻挡层（20）。

公开(公告)号：US07417276B2

公开(公告)日：2008-08-26

申请号：US11582480

申请日：2006-10-18

申请人： John David Baniecki ,  Takeshi Shioga ,  Kazuaki Kurihara

发明人： John David Baniecki ,  Takeshi Shioga ,  Kazuaki Kurihara

IPC分类号： H01L27/108

CPC分类号： H01L21/02197 ,  H01G4/085 ,  H01G4/1227 ,  H01G4/33 ,  H01L21/02186 ,  H01L21/02266 ,  H01L21/02304 ,  H01L21/02337 ,  H01L21/31691 ,  H01L27/10852 ,  H01L27/11507 ,  H01L28/55

摘要： A thin film capacitor comprising a top electrode, a bottom electrode, and a dielectric film held between the top and bottom electrodes. The dielectric film is composed of at least cations Ba, Sr, and Ti and anion O. The concentration of Sr, Ti, and O ions are uniform along the growth direction of the dielectric film while the concentration of the Ba cation is non-uniform along the growth direction such that a reduced Ba-I region in which the average concentration of perovskite type Ba cations (Ba-I) is less than the average concentration of non-perovskite type Ba cations (Ba-II) exists at or near the boundary between at least one of the top and bottom electrodes, with ratio R=(atm % Ba-I)/[(atm % Ba-I)+(atm % Ba-II)] within a range of 0.1

公开(公告)号：US07405366B2

公开(公告)日：2008-07-29

申请号：US11339661

申请日：2006-01-26

申请人： Takeshi Shioga ,  Yoshikatsu Ishizuki ,  John David Baniecki ,  Kazuaki Kurihara

发明人： Takeshi Shioga ,  Yoshikatsu Ishizuki ,  John David Baniecki ,  Kazuaki Kurihara

IPC分类号： H05K1/16

CPC分类号： H01G4/30 ,  H01G4/232 ,  H01L21/6835 ,  H01L2221/68345 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/16265 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K1/112 ,  H05K1/141 ,  H05K1/162 ,  H05K3/007 ,  H05K3/4602 ,  H05K2201/0179 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/0191 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

摘要： An interposer 2 including a base 10 formed of a plurality of resin layers 26, 34, 42, 52, 56; a thin-film capacitor 12 buried in the base 10, including a lower electrode 20, a capacitor dielectric film 22 and an upper electrode 24; a first through-electrode 14b formed through the base 10 and electrically connected to the upper electrode 24 of the thin-film capacitor 12; and a second through-electrode 14a formed through the base 10 and electrically connected to the lower electrode 20 of the thin-film capacitor 12, further including: an interconnection 48 buried in the base 10 and electrically connected to the respective upper electrodes 24 of a plurality of the thin-film capacitors 12, a plurality of the first through-electrodes 14b being electrically connected to the upper electrodes 24 of said plurality of the thin-film capacitors 12 via the interconnection 48, and said plurality of the first through-electrodes 14b being electrically interconnected by the interconnections 48.

摘要翻译： 包括由多个树脂层26,34,42,52,56形成的基座10的插入件2; 埋在基座10中的薄膜电容器12，包括下电极20，电容器电介质膜22和上电极24; 通过基底10形成并与薄膜电容器12的上部电极24电连接的第一贯通电极14b; 以及通过基底10形成并电连接到薄膜电容器12的下部电极20的第二贯通电极14a，还包括：埋入基座10中并电连接到各个上部电极24的互连件48 多个薄膜电容器12，多个第一贯通电极14b经由互连件48与所述多个薄膜电容器12的上部电极24电连接，所述多个第一贯通电极 - 电极14b通过互连48电互连。

公开(公告)号：US20080134499A1

公开(公告)日：2008-06-12

申请号：US12068272

申请日：2008-02-05

申请人： Takeshi Shioga ,  Yoshikatsu Ishizuki ,  Kanae Nakagawa ,  Taiji Sakai ,  Masataka Mizukoshi ,  John David Baniecki ,  Kazuaki Kurihara

发明人： Takeshi Shioga ,  Yoshikatsu Ishizuki ,  Kanae Nakagawa ,  Taiji Sakai ,  Masataka Mizukoshi ,  John David Baniecki ,  Kazuaki Kurihara

IPC分类号： H05K3/46

CPC分类号： H01L23/50 ,  H01L21/4846 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/642 ,  H01L23/645 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/162 ,  H05K1/165 ,  H05K3/0023 ,  H05K3/0044 ,  H05K3/20 ,  H05K3/4614 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/09481 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/09763 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/0733 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2224/05599

摘要： The interposer comprises a base 8 formed of a plurality of resin layers 68, 20, 32, 48; thin-film capacitors 18a, 18b buried between a first resin layer 68 of said plurality of resin layers and a second resin layer 20 of said plurality of resin layers, which include first capacitor electrodes 12a, 12b, second capacitor electrodes 16 opposed to the first capacitor electrode 12a, 12b and the second capacitor electrode 16, and a capacitor dielectric film 14 of a relative dielectric constant of 200 or above formed between the first capacitor electrode 12a, 12b and the second capacitor electrode 16; a first through-electrode 77a formed through the base 8 and electrically connected to the first capacitor electrode 12a, 12b; and a second through-electrode 77b formed through the base 8 and electrically connected to the second capacitor electrode 16.

摘要翻译： 插入件包括由多个树脂层68,20,32,48形成的基座8; 掩埋在所述多个树脂层的第一树脂层68和所述多个树脂层的第二树脂层20之间的薄膜电容器18a，18b，其包括第一电容器电极12a，12b，第二电容器电极16 与第一电容器电极12a，12b和第二电容器电极16相对，以及形成在第一电容器电极12a，12b和第二电容器电极16之间的相对介电常数为200或更大的电容器电介质膜14 ; 通过基座8形成并电连接到第一电容器电极12a，12b的第一贯通电极77a; 以及通过基底8形成并电连接到第二电容器电极16的第二贯通电极77b。

公开(公告)号：US07180119B2

公开(公告)日：2007-02-20

申请号：US10849791

申请日：2004-05-21

申请人： John David Baniecki ,  Takeshi Shioga ,  Kazuaki Kurihara

发明人： John David Baniecki ,  Takeshi Shioga ,  Kazuaki Kurihara

IPC分类号： H01L27/108

CPC分类号： H01G4/33 ,  H01G4/008 ,  H01G4/228 ,  H01L21/28568 ,  H01L27/0805 ,  H01L27/10852 ,  H01L28/55 ,  H01L28/65 ,  H01L28/75 ,  H01L2224/11

摘要： The capacitor according to the present invention comprises a lower electrode 18 formed on a base substrate 14, a dielectric film 20 formed on the lower electrode 18, and an upper electrode 28 formed on the dielectric film 20 and including a polycrystalline conduction film 22, and a amorphous conduction film 24 formed on the polycrystalline conduction film 22. Because of the amorphous conduction film 24 included in the upper electrode 28, which can shut off hydrogen and water, hydrogen and water can be prohibited from arriving at the dielectric film 20. Accordingly, the dielectric film 20 of an oxide is prevented from being reduced with hydrogen, and the capacitor can have good electric characteristics.

摘要翻译： 根据本发明的电容器包括形成在基底基板14上的下电极18，形成在下电极18上的电介质膜20和形成在电介质膜20上并包括多晶导体膜22的上电极28，以及 形成在多晶导体膜22上的非晶导体膜24。 由于上部电极28中包含的能够截断氢和水的非晶导体膜24，所以可以禁止氢和水到达电介质膜20。 因此，防止氧化物的电介质膜20被氢还原，并且电容器可以具有良好的电特性。