公开(公告)号：US10658205B2

公开(公告)日：2020-05-19

申请号：US15719208

申请日：2017-09-28

Applicant: ASM IP Holding B.V.

Inventor： Varun Sharma

IPC: H01L21/67 ,  H01J37/32 ,  H01L21/3065 ,  C23C16/455 ,  C23C16/448

Abstract: A chemical dispensing apparatus for providing a chlorine vapor to a reaction chamber is disclosed. The chemical dispensing apparatus may include: a chemical storage vessel configured for storing a chlorine-containing chemical species, a reservoir vessel in fluid communication with the chemical storage vessel, the reservoir vessel configured for converting the chlorine-containing chemical species to the chlorine vapor, and a reaction chamber in fluid communication with the reservoir vessel. Methods for dispensing a chlorine vapor to a reaction chamber are also disclosed.

公开(公告)号：US10535516B2

公开(公告)日：2020-01-14

申请号：US15886225

申请日：2018-02-01

Applicant: ASM IP Holding B.V.

Inventor： David Kohen ,  Nupur Bhargava ,  John Tolle ,  Vijay D'Costa

IPC: H01L21/00 ,  H01L21/02 ,  H01L29/165

Abstract: A method for depositing a semiconductor structure on a surface of a substrate is disclosed. The method may include: depositing a first group IVA semiconductor layer over a surface of the substrate; contacting an exposed surface of the first group IVA semiconductor layer with a first gas comprising a first chloride gas; and depositing a second group IVA semiconductor layer over a surface of the first group IVA semiconductor layer. Related semiconductor structures are also disclosed.

公开(公告)号：US10480078B2

公开(公告)日：2019-11-19

申请号：US16116321

申请日：2018-08-29

Applicant: ASM IP HOLDING B.V.

Inventor： Harm C. M. Knoops ,  Koen de Peuter ,  Wilhelmus M. M. Kessels

IPC: C23C16/52 ,  C23C16/34 ,  C23C16/455 ,  H01L21/02

Abstract: Plasma atomic layer deposition (ALD) is optimized through modulation of the gas residence time during an excited species phase, wherein activated reactant is supplied such as from a plasma. Reduced residence time increases the quality of the deposited layer, such as reducing wet etch rates, increasing index of refraction and/or reducing impurities in the layer. For example, dielectric layers, particularly silicon nitride films, formed from such optimized plasma ALD processes have low levels of impurities remaining from the silicon precursor.

公开(公告)号：US10023960B2

公开(公告)日：2018-07-17

申请号：US15466149

申请日：2017-03-22

Applicant: ASM IP Holding B.V.

Inventor： Fred Alokozai ,  Robert Brennan Milligan

IPC: H01L21/461 ,  C23C16/505 ,  C23C16/455 ,  H01J37/32 ,  H01L21/02 ,  H01L21/285

CPC classification number: C23C16/505 ,  C23C16/452 ,  C23C16/45563 ,  C23C16/507 ,  H01J37/321 ,  H01J37/3244 ,  H01J2237/3321 ,  H01L21/02274 ,  H01L21/0262 ,  H01L21/28556 ,  Y10T137/6851

Abstract: Embodiments related to hardware and methods for processing a semiconductor substrate are disclosed. One example film deposition reactor includes a process gas distributor including a plasma gas-feed inlet located to supply plasma gas to a plasma generation region within the film deposition reactor and a precursor gas-feed inlet located to supply film precursor gas downstream of the plasma generation region; an insulating confinement vessel configured to maintain a plasma generation region at a reduced pressure within the film deposition reactor and an inductively-coupled plasma (ICP) coil arranged around a portion of a sidewall of the insulating confinement vessel and positioned so that the sidewall separates the plasma generation region from the ICP coil; and a susceptor configured to support the semiconductor substrate so that a film deposition surface of the semiconductor substrate is exposed to a reaction region formed downstream of the process gas distributor.

公开(公告)号：US09523148B1

公开(公告)日：2016-12-20

申请号：US14835465

申请日：2015-08-25

Applicant: ASM IP Holding B.V.

Inventor： Viljami J. Pore ,  Seiji Okura ,  Hidemi Suemori

IPC: C23C16/30 ,  H01L21/02 ,  H01L21/311 ,  C23C16/455 ,  H01L21/28

CPC classification number: H01L21/02186 ,  C23C16/308 ,  C23C16/45525 ,  C23C16/45527 ,  C23C16/45531 ,  C23C16/45534 ,  C23C16/45536 ,  C23C16/4554 ,  C23C16/45542 ,  C23C16/45553 ,  H01L21/02249 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0337 ,  H01L21/28202 ,  H01L21/31111

Abstract: A process is provided for depositing a substantially amorphous titanium oxynitride thin film that can be used, for example, in integrated circuit fabrication, such as in forming spacers in a pitch multiplication process. The process comprises contacting the substrate with a titanium reactant and removing excess titanium reactant and reaction byproducts, if any. The substrate is then contacted with a second reactant which comprises reactive species generated by plasma, wherein one of the reactive species comprises nitrogen. The second reactant and reaction byproducts, if any, are removed. The contacting and removing steps are repeated until a titanium oxynitride thin film of desired thickness has been formed.

Abstract translation: 提供了用于沉积可用于例如集成电路制造中的基本上无定形的氮氧化钛薄膜的方法，例如在间距倍增过程中形成间隔物。 该方法包括使底物与钛反应物接触并除去过量的钛反应物和反应副产物（如果有的话）。 然后将衬底与包含由等离子体产生的反应物质的第二反应物接触，其中一个反应性物质包含氮。 第二反应物和反应副产物（如果有的话）被除去。 重复接触和除去步骤，直至形成所需厚度的氮氧化钛薄膜。

公开(公告)号：US09177784B2

公开(公告)日：2015-11-03

申请号：US14183187

申请日：2014-02-18

Applicant: ASM IP Holding B.V.

Inventor： Petri Raisanen ,  Michael Givens ,  Mohith Verghese

IPC: H01L21/285 ,  H01L21/336 ,  H01L21/31 ,  H01L21/66 ,  H01L21/02 ,  H01L29/51 ,  H01L29/78 ,  H01L21/28

CPC classification number: H01L21/02233 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02197 ,  H01L21/022 ,  H01L21/0223 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02247 ,  H01L21/02249 ,  H01L21/02252 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02315 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L22/12 ,  H01L22/20 ,  H01L29/511 ,  H01L29/512 ,  H01L29/513 ,  H01L29/517

Abstract: Embodiments related to methods for forming a film stack on a substrate are provided. One example method comprises exposing the substrate to an activated oxygen species and converting an exposed surface of the substrate into a continuous monolayer of a first dielectric material. The example method also includes forming a second dielectric material on the continuous monolayer of the first dielectric material without exposing the substrate to an air break.

Abstract translation: 提供了与在衬底上形成膜堆叠的方法相关的实施例。 一个示例性方法包括将基底暴露于活化氧物质并将基底的暴露表面转化为第一介电材料的连续单层。 该示例性方法还包括在第一介电材料的连续单层上形成第二介电材料，而不将基板暴露于空气断裂。

公开(公告)号：US20140073143A1

公开(公告)日：2014-03-13

申请号：US13612538

申请日：2012-09-12

Applicant: Fred Alokozai ,  Robert Brennan Milligan

Inventor： Fred Alokozai ,  Robert Brennan Milligan

IPC: C23C16/505 ,  H01L21/31 ,  F17D1/00

CPC classification number: C23C16/505 ,  C23C16/452 ,  C23C16/45563 ,  C23C16/507 ,  H01J37/321 ,  H01J37/3244 ,  H01J2237/3321 ,  H01L21/02274 ,  H01L21/0262 ,  H01L21/28556 ,  Y10T137/6851

Abstract: Embodiments related to hardware and methods for processing a semiconductor substrate are disclosed. One example film deposition reactor includes a process gas distributor including a plasma gas-feed inlet located to supply plasma gas to a plasma generation region within the film deposition reactor and a precursor gas-feed inlet located to supply film precursor gas downstream of the plasma generation region; an insulating confinement vessel configured to maintain a plasma generation region at a reduced pressure within the film deposition reactor and an inductively-coupled plasma (ICP) coil arranged around a portion of a sidewall of the insulating confinement vessel and positioned so that the sidewall separates the plasma generation region from the ICP coil; and a susceptor configured to support the semiconductor substrate so that a film deposition surface of the semiconductor substrate is exposed to a reaction region formed downstream of the process gas distributor.

Abstract translation: 公开了与用于处理半导体衬底的硬件和方法相关的实施例。 一个示例性膜沉积反应器包括处理气体分配器，其包括等离子体气体进料入口，该等离子体气体进料入口定位成将等离子体气体供应到膜沉积反应器内的等离子体产生区域;以及前体气体进料入口，其位于将等离子体产生 地区; 绝缘限制容器，其被配置为将所述膜沉积反应器内的等离子体产生区域保持在较低的压力;以及电感耦合等离子体（ICP）线圈，其布置在所述绝缘限制容器的侧壁的一部分周围并且被定位成使得所述侧壁将 来自ICP线圈的等离子体产生区域; 以及基座，被配置为支撑半导体衬底，使得半导体衬底的膜沉积表面暴露于形成在处理气体分配器下游的反应区域。

公开(公告)号：US20130264659A1

公开(公告)日：2013-10-10

申请号：US13439528

申请日：2012-04-04

Applicant: Sung-Hoon Jung

Inventor： Sung-Hoon Jung

IPC: H01L21/316 ,  H01L29/78 ,  B82Y40/00 ,  B82Y99/00

CPC classification number: H01L21/28229 ,  C23C16/405 ,  C23C16/409 ,  C23C16/45527 ,  H01L21/02186 ,  H01L21/02197 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02362 ,  H01L21/28194 ,  H01L29/513 ,  H01L29/517

Abstract: Embodiments related to metal oxide protective layers formed on a surface of a halogen-sensitive metal-including layer present on a substrate processed in a semiconductor processing reactor are provided. In one example, a method for forming a metal oxide protective layer is provided. The example method includes forming a metal-including active species on the halogen-sensitive metal-including layer, the metal-including active species being derived from a non-halogenated metal oxide precursor. The example method also includes reacting an oxygen-containing reactant with the metal-including active species to form the metal oxide protective layer.

Abstract translation: 提供与在半导体处理反应器中处理的基板上存在的含卤敏感性金属包覆层的表面上形成的金属氧化物保护层有关的实施方式。 在一个实例中，提供了形成金属氧化物保护层的方法。 示例性方法包括在含卤素敏感的含金属层上形成含金属的活性物质，所述含金属的活性物质衍生自非卤化金属氧化物前体。 该示例性方法还包括使含氧反应物与含金属的活性物质反应以形成金属氧化物保护层。