公开(公告)号：US07261230B2

公开(公告)日：2007-08-28

申请号：US10652434

申请日：2003-08-29

申请人： Fuaida Harun ,  Chiaw Mong Chan ,  Lan Chu Tan ,  Lau Teck Beng ,  Kong Bee Tiu ,  Soo San Yong

发明人： Fuaida Harun ,  Chiaw Mong Chan ,  Lan Chu Tan ,  Lau Teck Beng ,  Kong Bee Tiu ,  Soo San Yong

IPC分类号： B23K1/06

CPC分类号： H01L24/85 ,  B23K20/005 ,  B23K2101/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/45565 ,  H01L2224/45669 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/78301 ,  H01L2224/85181 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2924/00015 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/01004 ,  H01L2924/00014 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/2075

摘要： An improved method of bonding an insulated wire (14) that has one end connected to a first bond pad (16) to a second bond pad (18) includes moving a tip of a capillary (20) holding the bond wire (14) over the surface of the second bond pad (18) such that the bond wire (14) is rubbed between the capillary tip (20) and the second bond pad (18), which tears the bond wire insulation so that at least a portion of a metal core of the wire (14) contacts the second bond pad (18). The wire (14) is then bonded to the second pad (18) using thermocompression bonding. The tip of the capillary (20) is roughened to enhance the tearing of the bond wire insulation.

摘要翻译： 将具有一端连接到第一接合焊盘（16）的绝缘电线（14）的改进方法连接到第二接合焊盘（18）包括将保持接合线（14）的毛细管（20）的尖端移动到 所述第二接合焊盘（18）的表面使得所述接合线（14）在所述毛细管尖端（20）和所述第二接合焊盘（18）之间摩擦，所述接合焊盘撕裂所述接合线绝缘体，使得至少一部分 金属丝（14）的金属芯与第二接合焊盘（18）接触。 然后使用热压接将导线（14）接合到第二焊盘（18）。 毛细管（20）的尖端被粗糙化以增强接合线绝缘层的撕裂。

公开(公告)号：US06933614B2

公开(公告)日：2005-08-23

申请号：US10662541

申请日：2003-09-15

申请人： Chu-Chung Lee ,  Fuaida Harun ,  Kevin J. Hess ,  Lan Chu Tan ,  Cheng Choi Yong

发明人： Chu-Chung Lee ,  Fuaida Harun ,  Kevin J. Hess ,  Lan Chu Tan ,  Cheng Choi Yong

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L23/48

CPC分类号： H01L24/85 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48647 ,  H01L2224/48747 ,  H01L2224/48847 ,  H01L2224/85013 ,  H01L2224/85207 ,  H01L2224/85375 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2224/78 ,  H01L2924/00

摘要： An integrated circuit die (10) has a copper contact (16, 18), which, upon exposure to the ambient air, forms a native copper oxide. An organic material is applied to the copper contact which reacts with the native copper oxide to form an organic coating (12, 14) on the copper contact in order to prevent further copper oxidation. In this manner, further processing at higher temperatures, such as those greater than 100 degrees Celsius, is not inhibited by excessive copper oxidation. For example, due to the organic coating, the high temperature of the wire bond process does not result in excessive oxidation which would prevent reliable wire bonding. Thus, the formation of the organic coating allows for a reliable and thermal resistance wire bond (32, 34). Alternatively, the organic coating can be formed over exposed copper at any time during the formation of the integrated circuit die to prevent or limit the formation of copper oxidation.

摘要翻译： 集成电路管芯（10）具有铜接触（16,18），其在暴露于环境空气时形成天然铜氧化物。 将有机材料施加到与天然氧化铜反应的铜接触处，以在铜接触上形成有机涂层（12,14），以防止进一步的铜氧化。 以这种方式，在较高温度（例如大于100摄氏度的温度）下的进一步处理不会被过度的铜氧化所阻碍。 例如，由于有机涂层，引线键合过程的高温不会导致过度的氧化，这将阻止可靠的引线接合。 因此，有机涂层的形成允许可靠和耐热的引线键合（32,34）。 或者，可以在形成集成电路管芯期间的任何时间在暴露的铜上形成有机涂层，以防止或限制铜氧化的形成。

公开(公告)号：US06900531B2

公开(公告)日：2005-05-31

申请号：US10280952

申请日：2002-10-25

申请人： Chee Seng Foong ,  Kok Wai Mui ,  Kim Heng Tan ,  Lan Chu Tan

发明人： Chee Seng Foong ,  Kok Wai Mui ,  Kim Heng Tan ,  Lan Chu Tan

IPC分类号： H01L23/10 ,  H01L23/22 ,  H01L27/14 ,  H01L27/146 ,  H01L31/0203 ,  H04N5/369

CPC分类号： H01L27/14634 ,  H01L27/14618 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/00014

摘要： An image sensor device is made using an ultra-thin substrate so that the overall device height is less than 1.0 mm. The image sensor includes a flexible circuit substrate having first and second opposing sides, the first side having a central area and an outer, bonding pad area including bonding pads. A sensor integrated circuit (IC) is attached to the central area of the first side of the circuit substrate. The IC has an active area and a peripheral bonding pad area including bonding pads. Wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the circuit substrate bonding pads to electrically connect the IC and the circuit substrate. A wall having a first end with a step and a second end has its second end attached to an outer portion beyond the outer bonding pad area of the first side of the flexible circuit substrate. The wall at least partially surrounds the sensor integrated circuit. A transparent cover is located above the IC such that light can pass through the cover onto the IC active area. Opposing edges of the cover are secured within the step of the wall. Solder balls are attached to the second side of the circuit substrate. The circuit substrate provides for electrical interconnect between the solder balls and the bonding pads on the first side of the circuit substrate.

摘要翻译： 使用超薄基板制造图像传感器装置，使得整个装置高度小于1.0mm。 图像传感器包括具有第一和第二相对侧的柔性电路基板，第一侧具有包括接合焊盘的中心区域和外部焊接区域。 传感器集成电路（IC）附接到电路基板的第一侧的中心区域。 IC具有包括接合焊盘的有源区和外围接合焊盘区域。 电线与各个IC接合焊盘和对应的电路衬底接合焊盘引线接合，以电连接IC和电路衬底。 具有台阶和第二端的第一端的壁的第二端具有附接到柔性电路基板的第一侧的外部焊盘区域外部的外部部分。 墙壁至少部分地围绕传感器集成电路。 透明盖位于IC上方，使得光可以穿过盖到IC活动区域。 盖的相对边缘固定在墙壁的台阶内。 焊球附接到电路基板的第二侧。 电路基板提供焊球和电路基板第一面上的接合焊盘之间的电互连。

公开(公告)号：US09474162B2

公开(公告)日：2016-10-18

申请号：US14151828

申请日：2014-01-10

申请人： Chee Seng Foong ,  Lan Chu Tan

发明人： Chee Seng Foong ,  Lan Chu Tan

IPC分类号： H01L21/00 ,  H05K3/00 ,  H05K1/09

CPC分类号： H05K3/007 ,  H05K1/097 ,  H05K2203/107

摘要： A circuit interconnecting substrate manufacturing method includes depositing a first layer of metallic powder on top of a carrier, and then forming a first layer of electrically conductive traces from the first layer of metallic powder. A second layer of metallic powder is then deposited onto at least one region of the first layer of electrically conductive traces. Then a second layer of electrically conductive traces is formed from the second layer of metallic powder and each trace of the second layer is electrically coupled to a trace of the first layer. An insulating material is deposited onto the carrier to provide an insulating substrate that supports the traces. The method does not require the use of any wet chemicals or chemical etching steps.

摘要翻译： 电路互连衬底制造方法包括在载体的顶部上沉积第一层金属粉末，然后从第一层金属粉末形成第一层导电迹线。 然后将第二层金属粉末沉积到第一层导电迹线的至少一个区域上。 然后从第二层金属粉末形成第二层导电迹线，并且第二层的每个迹线电耦合到第一层的迹线。 将绝缘材料沉积到载体上以提供支撑迹线的绝缘基板。 该方法不需要使用任何湿化学品或化学蚀刻步骤。

公开(公告)号：US09437492B2

公开(公告)日：2016-09-06

申请号：US14499266

申请日：2014-09-29

申请人： Kai Yun Yow ,  Chee Seng Foong ,  Lan Chu Tan

发明人： Kai Yun Yow ,  Chee Seng Foong ,  Lan Chu Tan

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/78 ,  H01L23/00 ,  H01L23/544 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L21/78 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/11 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54486 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49171 ,  H01L2224/83132 ,  H01L2224/85132 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

摘要： A method of assembling semiconductor devices with semiconductor dies of alternative different configurations uses the same substrate panel. The dies of the selected configuration are placed in an array, mounted, and connected to internal electrical contact pads on a first face of the panel using main fiducial markings and an array of subsidiary fiducial markings corresponding universally to arrays of semiconductor dies of the different alternative configurations. The pitch of the subsidiary fiducial markings is equal to the spacing between adjacent rows of the internal electrical contact pads on the panel and is a sub-multiple of the pitch of the array of dies.

摘要翻译： 使用替代不同配置的半导体管芯组装半导体器件的方法使用相同的衬底面板。 所选择的配置的管芯被放置在阵列中，安装并连接到面板的第一面上的内部电接触焊盘，使用主要的基准标记和通常对应于不同替代的半导体管芯阵列的辅助基准标记阵列 配置 附属基准标记的间距等于面板上的内部电接触焊盘的相邻行之间的间隔，并且是管芯阵列的间距的次倍数。

公开(公告)号：US09401345B2

公开(公告)日：2016-07-26

申请号：US14474294

申请日：2014-09-01

申请人： Chee Seng Foong ,  Navas Khan Oratti Kalandar ,  Lan Chu Tan

发明人： Chee Seng Foong ,  Navas Khan Oratti Kalandar ,  Lan Chu Tan

IPC分类号： H05K7/10 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48 ,  H01L21/768 ,  H01L23/498

CPC分类号： H01L25/0657 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/6835 ,  H01L21/76877 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/03602 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/81801 ,  H01L2224/8185 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/92 ,  H01L2924/18161 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L21/565 ,  H01L21/304 ,  H01L2224/83

摘要： A method of making an integrated circuit package, such as a ball grid array, includes providing a flexible tape that has first and second sets of bond pads on respective first and second surfaces thereof. A carrier is attached to the first surface of the flexible tape. Then conductive pillars are formed on the second set of bond pads and an intermediate layer of polymeric compound is deposited on the second surface of the flexible tape. After the compound has cured, a surface of the intermediate layer is ground to expose ends of the conductive pillars to form a sub-assembly comprising the flexible tape and the intermediate layer. Then the carrier is removed from the sub-assembly, thereby creating an interposer. The interposer is attached to a substrate and at least one die is attached to the interposer.

摘要翻译： 制造诸如球栅阵列的集成电路封装的方法包括提供在其相应的第一和第二表面上具有第一组和第二组接合焊盘的柔性带。 载体附接到柔性带的第一表面。 然后在第二组接合焊盘上形成导电柱，并且在柔性带的第二表面上沉积聚合物化合物的中间层。 在化合物固化之后，研磨中间层的表面以暴露导电柱的端部以形成包括柔性带和中间层的子组件。 然后从子组件移除载体，从而形成插入件。 插入器附接到衬底，并且至少一个管芯附接到插入器。

公开(公告)号：US20160093533A1

公开(公告)日：2016-03-31

申请号：US14499266

申请日：2014-09-29

申请人： Kai Yun Yow ,  Chee Seng Foong ,  Lan Chu Tan

发明人： Kai Yun Yow ,  Chee Seng Foong ,  Lan Chu Tan

IPC分类号： H01L21/78 ,  H01L23/28 ,  H01L23/535 ,  H01L23/544 ,  H01L23/00 ,  H01L21/56

CPC分类号： H01L21/78 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/11 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54486 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49171 ,  H01L2224/83132 ,  H01L2224/85132 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

摘要： A method of assembling semiconductor devices with semiconductor dies of alternative different configurations uses the same substrate panel. The dies of the selected configuration are placed in an array, mounted, and connected to internal electrical contact pads on a first face of the panel using main fiducial markings and an array of subsidiary fiducial markings corresponding universally to arrays of semiconductor dies of the different alternative configurations. The pitch of the subsidiary fiducial markings is equal to the spacing between adjacent rows of the internal electrical contact pads on the panel and is a sub-multiple of the pitch of the array of dies.

摘要翻译： 使用替代不同配置的半导体管芯组装半导体器件的方法使用相同的衬底面板。 所选择的配置的管芯被放置在阵列中，安装并连接到面板的第一面上的内部电接触焊盘，使用主要的基准标记和通常对应于不同替代的半导体管芯阵列的辅助基准标记阵列 配置 附属基准标记的间距等于面板上的内部电接触焊盘的相邻行之间的间隔，并且是管芯阵列的间距的次倍数。

公开(公告)号：US20160071789A1

公开(公告)日：2016-03-10

申请号：US14479377

申请日：2014-09-08

申请人： Pei Fan Tong ,  Boon Yew Low ,  Lan Chu Tan

发明人： Pei Fan Tong ,  Boon Yew Low ,  Lan Chu Tan

IPC分类号： H01L23/498 ,  H05K3/34 ,  H01L21/52 ,  H05K1/18 ,  H01L23/31 ,  H01L21/48

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L2224/16227 ,  H01L2924/15192 ,  H01L2924/15311 ,  H05K3/0014 ,  H05K3/0044 ,  H05K3/0097 ,  H05K3/06 ,  H05K3/4046 ,  H05K3/4688 ,  H05K2201/09118 ,  H05K2201/10242 ,  H05K2201/10378 ,  H05K2203/0235

摘要： A method for forming a pass-through layer of an interposer of a packaged semiconductor device in which conducting structures are extended between first and second ends of a casing. The conducting structures are subsequently encapsulated in a molding compound to form a molded bar, and the molded bar is sliced to obtain the pass-through layer. The pass-through layer has conducting vias, each corresponding to a sliced section of one of the conducting structures. The cost of pass-through layers formed in this manner may be less than that of comparable silicon or glass pass-through layers.

摘要翻译： 一种用于形成封装半导体器件的中介层的贯穿层的方法，其中导电结构在壳体的第一和第二端之间延伸。 然后将导电结构封装在模塑料中以形成模制棒，并将模制棒切片以获得穿透层。 穿通层具有导电孔，每个对应于一个导电结构的切片部分。 以这种方式形成的直通层的成本可能低于可比较的硅或玻璃直通层的成本。

公开(公告)号：US20150294924A1

公开(公告)日：2015-10-15

申请号：US14552497

申请日：2014-11-25

申请人： Zhigang Bai ,  Jinzhong Yao ,  Lan Chu Tan

发明人： Zhigang Bai ,  Jinzhong Yao ,  Lan Chu Tan

IPC分类号： H01L23/495 ,  H01L21/56 ,  H01L23/58 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L24/85 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49551 ,  H01L23/49861 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/456 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a first lead frame type having a first type of package leads and a pre-molded portion, and a second lead frame type having a second type of package leads that surround a die pad and are supported by the pre-molded portion. An integrated circuit is attached to the die pad and electrically connected to the first and second types of leads with bond wires. A mold compound, which forms a mold cap, covers the first and second lead frame types, the integrated circuit and the bond wires. The first lead frame type may be a QFP type and the second lead frame type may be a QFN type.

摘要翻译： 半导体封装包括具有第一类型的封装引线和预成型部分的第一引线框架型和具有围绕芯片焊盘并由预模制部分支撑的第二类型的封装引线的第二引线框架型 。 集成电路附接到管芯焊盘并且用接合线电连接到第一和第二类型的引线。 形成模具帽的模具复合体覆盖第一和第二引线框架类型，集成电路和接合线。 第一引线框类型可以是QFP型，第二引线框类型可以是QFN型。

公开(公告)号：US20150200180A1

公开(公告)日：2015-07-16

申请号：US14151811

申请日：2014-01-10

申请人： Kee Cheong Fam ,  Mohd Rusli Ibrahim ,  Lan Chu Tan

发明人： Kee Cheong Fam ,  Mohd Rusli Ibrahim ,  Lan Chu Tan

IPC分类号： H01L23/00 ,  H01L29/84 ,  H01L21/56

CPC分类号： H01L24/83 ,  H01L21/56 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/3135 ,  H01L24/29 ,  H01L24/45 ,  H01L29/84 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/48137 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/92247 ,  H01L2924/11 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/0665

摘要： A pressure sensor device includes a gel retainer that is mounted or formed on a substrate. The gel retainer has a cavity and a pressure sensing die is mounted inside the cavity. The die is electrically connected to one or more other package elements. A pressure-sensitive gel material is dispensed into the cavity to cover an active region of the pressure sensing die. A mold compound is applied on an upper surface of the substrate outside of the gel retainer.

摘要翻译： 压力传感器装置包括安装或形成在基底上的凝胶保持器。 凝胶保持器具有空腔，并且压力感测模具安装在腔体内。 模具电连接到一个或多个其它封装元件。 将压敏凝胶材料分配到空腔中以覆盖压力感测模具的有源区域。 将模具化合物施加在凝胶保持器外部的基板的上表面上。