公开(公告)号：US20130088255A1

公开(公告)日：2013-04-11

申请号：US13268681

申请日：2011-10-07

申请人： PERRY H. PELLEY ,  Kevin J. Hess ,  Michael B. McShane

发明人： PERRY H. PELLEY ,  Kevin J. Hess ,  Michael B. McShane

IPC分类号： G01R31/26 ,  H01L23/48 ,  H01L23/544

CPC分类号： H01L25/0657 ,  H01L21/76898 ,  H01L22/32 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2225/06596

摘要： A stacked semiconductor device includes a first and a second semiconductor device. A first major surface of each of the first and second devices which includes the active circuitry directly face each other. The first major surface of each of the devices includes a beveled edge on at least one edge, and a probe pad which extends onto the beveled edge. A first opening is located between the beveled edges of the first and second devices on a vertical side of the stacked semiconductor device.

摘要翻译： 叠层半导体器件包括第一和第二半导体器件。 第一和第二装置中的每一个的第一主表面包括有源电路直接面对彼此。 每个装置的第一主表面包括在至少一个边缘上的斜边缘和延伸到斜边上的探针垫。 第一开口位于堆叠半导体器件的垂直侧上的第一和第二器件的斜边之间。

公开(公告)号：US20120153464A1

公开(公告)日：2012-06-21

申请号：US13355748

申请日：2012-01-23

申请人： Kevin J. Hess ,  Chu-Chung Lee

发明人： Kevin J. Hess ,  Chu-Chung Lee

IPC分类号： H01L23/485 ,  H01B5/00

CPC分类号： H01L24/85 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48453 ,  H01L2224/48465 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48764 ,  H01L2224/48769 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/49171 ,  H01L2224/78301 ,  H01L2224/85205 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2924/00015 ,  H01L2924/013 ,  H01L2924/00013

摘要： Methods of forming gold-aluminum electrical interconnects are described. The method may include interposing a diffusion retardant layer between the gold and the aluminum, the diffusion retardant layer including regions containing and regions substantially devoid of a diffusion retardant material; bringing into contact the diffusion retardant layer, the gold, and the aluminum; forming alloys of gold and the diffusion retardant material in regions containing the material and forming gold-aluminum intermetallic compounds in regions substantially devoid of the material; and forming a continuous electrically conducting path between the aluminum and the gold. A structure for gold-aluminum interconnect is provided. The structure may include an aluminum alloy bond pad and a diffusion retardant layer in contact with the bond pad, the diffusion retardant layer including regions containing and regions substantially devoid of a diffusion retardant material. The structure may include a gold free air ball in contact with the diffusion retardant layer.

摘要翻译： 描述形成金 - 铝电互连的方法。 该方法可以包括在金和铝之间插入扩散阻挡层，扩散阻挡层包含含有基本上没有扩散阻挡材料的区域; 与扩散阻挡层，金和铝接触; 在含有材料的区域中形成金和扩散阻挡材料的合金，并在基本上不含该材料的区域中形成金 - 铝金属间化合物; 并在铝和金之间形成连续的导电路径。 提供了金 - 铝互连结构。 该结构可以包括铝合金接合焊盘和与接合焊盘接触的扩散阻挡层，扩散阻挡层包括含有基本上没有扩散阻挡材料的区域。 该结构可以包括与扩散阻挡层接触的无金空气球。

公开(公告)号：US08129226B2

公开(公告)日：2012-03-06

申请号：US12599625

申请日：2007-05-10

申请人： James P. Johnston ,  Chu-Chung Lee ,  Tu-Anh N. Tran ,  James W. Miller ,  Kevin J. Hess

发明人： James P. Johnston ,  Chu-Chung Lee ,  Tu-Anh N. Tran ,  James W. Miller ,  Kevin J. Hess

IPC分类号： H01L21/44

CPC分类号： H01L23/49816 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49833 ,  H01L23/50 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/91 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48471 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2224/4945 ,  H01L2224/85191 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/4554

摘要： A packaging assembly (30), such as a ball grid array package, is formed which distributes power across an interior region of an integrated circuit die (52) by using an encapsulated patterned leadframe conductor (59) that is disposed over the die (52) and bonded to a plurality of bonding pads (45) formed in a BGA carrier substrate (42) and in the interior die region, thereby electrically coupling the interior die region to an externally provided reference voltage.

摘要翻译： 形成诸如球栅阵列封装的封装组件（30），其通过使用设置在模具（52）上的封装的图案化引线框导体（59）来分布跨集成电路管芯（52）的内部区域的电力 ）并且接合到形成在BGA载体衬底（42）中的多个接合焊盘（45）和内部管芯区域中，从而将内部管芯区域电连接到外部提供的参考电压。

公开(公告)号：US08105933B2

公开(公告)日：2012-01-31

申请号：US11669556

申请日：2007-01-31

申请人： Kevin J. Hess ,  Chu-Chung Lee

发明人： Kevin J. Hess ,  Chu-Chung Lee

IPC分类号： H01L21/44

CPC分类号： H01L24/85 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48453 ,  H01L2224/48465 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48764 ,  H01L2224/48769 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/49171 ,  H01L2224/78301 ,  H01L2224/85205 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2924/00015 ,  H01L2924/013 ,  H01L2924/00013

摘要： In some embodiments a method of forming a gold-aluminum electrical interconnect is described. The method may include interposing a diffusion retardant layer between the gold and the aluminum (1002), the diffusion retardant layer including regions containing and regions substantially devoid of a diffusion retardant material; bringing into contact the diffusion retardant layer, the gold, and the aluminum (1004); forming alloys of gold and the diffusion retardant material in regions containing the material (1006) and forming gold-aluminum intermetallic compounds in regions substantially devoid of the material (1008); and forming a continuous electrically conducting path between the aluminum and the gold (1010). In some embodiments, a structure useful in a gold-aluminum interconnect is provided. The structure may include an aluminum alloy bond pad (530) and a diffusion retardant layer (520) in contact with the bond pad, the diffusion retardant layer including regions (522) containing and regions (524) substantially devoid of a diffusion retardant material. The structure may include a gold free air ball (714) in contact with the diffusion retardant layer.

摘要翻译： 在一些实施例中描述了形成金 - 铝电互连的方法。 该方法可以包括在金和铝之间插入扩散阻挡层（1002），扩散阻挡层包含含有基本上没有扩散阻挡材料的区域; 与扩散阻挡层，金和铝接触（1004）; 在含有材料（1006）的区域中形成金和扩散阻挡材料的合金并在基本上不含材料（1008）的区域中形成金 - 铝金属间化合物; 以及在所述铝和所述金（1010）之间形成连续的导电路径。 在一些实施例中，提供了可用于金 - 铝互连的结构。 该结构可以包括与接合焊盘接触的铝合金接合焊盘（530）和扩散阻挡层（520），所述扩散阻挡层包括含有基本上没有扩散阻挡材料的区域（522）和区域（524）。 该结构可以包括与扩散阻挡层接触的无金空气球（714）。

公开(公告)号：US07572680B2

公开(公告)日：2009-08-11

申请号：US12033716

申请日：2008-02-19

申请人： Kevin J. Hess ,  Chu-Chung Lee

发明人： Kevin J. Hess ,  Chu-Chung Lee

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L23/50 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/552 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/73207 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package (10) uses a plurality of thermal conductors (56-64) that extend upward within an encapsulant (16) from one or more thermal bond pads (22, 24, 26) on a die (14) to disperse heat. The thermal conductors may be bond wires or conductive stud bumps and do not extend beyond a lateral edge of the die. One or more of the thermal conductors may be looped within the encapsulant and exposed at an upper surface of the encapsulant. In one form a heat spreader (68) is placed overlying the encapsulant for further heat removal. In another form the heat spreader functions as a power or ground terminal directly to points interior to the die via the thermal conductors. Active bond pads may be placed exclusively along the die's periphery or also included within the interior of the die.

摘要翻译： 半导体封装（10）使用从模具（14）上的一个或多个热粘合垫（22,24,26）在密封剂（16）内向上延伸的多个热导体（56-64）以分散热量。 热导体可以是接合线或导电柱状凸起，并且不延伸超过模具的侧边缘。 一个或多个热导体可以环绕在密封剂内并暴露在密封剂的上表面。 在一种形式中，将散热器（68）放置在所述密封剂上方以进一步除热。 在另一种形式中，散热器用作电源或接地端子，直接通过热导体指向芯片的内部。 主动键合焊盘可以沿模具的周边排列，也可以包括在模具的内部。

公开(公告)号：US20080203588A1

公开(公告)日：2008-08-28

申请号：US11680177

申请日：2007-02-28

申请人： Kevin J. Hess ,  Chu-Chung Lee

发明人： Kevin J. Hess ,  Chu-Chung Lee

IPC分类号： H01L21/56

CPC分类号： H01L21/56 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48235 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/4899 ,  H01L2224/49 ,  H01L2224/97 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A packaged integrated circuit has an integrated circuit over a support structure. A plurality of bond wires connected between active terminals of the integrated circuit and the support structure. An encapsulant overlies the support structure, the integrated circuit, and the bond wires. The encapsulant has a first open location in the encapsulant so that a first bond wire is exposed and a second open location in the encapsulant so that a second bond wire is exposed. First and second conductive structures are exposed outside the packaged integrated circuit and are located at the first and second open locations, respectively, and electrically connected to the first and second bond wires, respectively.

摘要翻译： 封装的集成电路在支撑结构上具有集成电路。 连接在集成电路的有源端子和支撑结构之间的多个接合线。 密封剂覆盖支撑结构，集成电路和接合线。 密封剂在密封剂中具有第一开放位置，使得第一接合线暴露，并且密封剂中的第二开放位置使得第二接合线被暴露。 第一和第二导电结构暴露在封装的集成电路外部，分别位于第一和第二开放位置处，并分别电连接到第一和第二接合线。

公开(公告)号：US20080164593A1

公开(公告)日：2008-07-10

申请号：US11620074

申请日：2007-01-05

申请人： Kevin J. Hess ,  Chu-Chung Lee ,  Robert J. Wenzel

发明人： Kevin J. Hess ,  Chu-Chung Lee ,  Robert J. Wenzel

IPC分类号： H01L23/20 ,  H01L21/02

CPC分类号： H01L23/295 ,  H01L21/561 ,  H01L21/568 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/15311

摘要： A method of packaging a semiconductor includes providing a support structure. An adhesive layer is formed overlying the support structure and is in contact with the support structure. A plurality of semiconductor die is placed on the adhesive layer. The semiconductor die are laterally separated from each other and have electrical contacts that are in contact with the adhesive layer. A layer of encapsulating material is formed overlying and between the plurality of semiconductor die and has a distribution of filler material. A concentration of the filler material is increased in all areas laterally adjacent each of the plurality of semiconductor die.

摘要翻译： 包装半导体的方法包括提供支撑结构。 粘合层形成在支撑结构上方并与支撑结构接触。 多个半导体管芯被放置在粘合剂层上。 半导体管芯相互横向分离并具有与粘合剂层接触的电接触。 一层封装材料形成在多个半导体管芯之间并且在多个半导体管芯之间并且具有填充材料的分布。 填充材料的浓度在与多个半导体管芯中的每一个横向相邻的所有区域中增加。

公开(公告)号：US07355289B2

公开(公告)日：2008-04-08

申请号：US11192525

申请日：2005-07-29

申请人： Kevin J. Hess ,  Chu-Chung Lee

发明人： Kevin J. Hess ,  Chu-Chung Lee

IPC分类号： H01L23/28

CPC分类号： H01L23/50 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/552 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/73207 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package (10) uses a plurality of thermal conductors (56-64) that extend upward within an encapsulant (16) from one or more thermal bond pads (22, 24, 26) on a die (14) to disperse heat. The thermal conductors may be bond wires or conductive stud bumps and do not extend beyond a lateral edge of the die. One or more of the thermal conductors may be looped within the encapsulant and exposed at an upper surface of the encapsulant. In one form a heat spreader (68) is placed overlying the encapsulant for further heat removal. In another form the heat spreader functions as a power or ground terminal directly to points interior to the die via the thermal conductors. Active bond pads may be placed exclusively along the die's periphery or also included within the interior of the die.

摘要翻译： 半导体封装（10）使用从模具（14）上的一个或多个热粘合垫（22,24,26）在密封剂（16）内向上延伸的多个热导体（56-64），以分散热量。 热导体可以是接合线或导电柱状凸起，并且不延伸超过模具的侧边缘。 一个或多个热导体可以环绕在密封剂内并暴露在密封剂的上表面。 在一种形式中，将散热器（68）放置在所述密封剂上方以进一步除热。 在另一种形式中，散热器用作电源或接地端子，直接通过热导体指向芯片的内部。 主动键合焊盘可以沿模具的周边排列，也可以包括在模具的内部。

公开(公告)号：US07276435B1

公开(公告)日：2007-10-02

申请号：US11445657

申请日：2006-06-02

申请人： Scott K. Pozder ,  Kevin J. Hess ,  Ruiqi Tian ,  Edward O. Travis ,  Trent S. Uehling ,  Brett P. Wilkerson ,  Katie C. Yu

发明人： Scott K. Pozder ,  Kevin J. Hess ,  Ruiqi Tian ,  Edward O. Travis ,  Trent S. Uehling ,  Brett P. Wilkerson ,  Katie C. Yu

IPC分类号： H01L21/44

CPC分类号： H01L21/76838 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/051 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13171 ,  H01L2224/13181 ,  H01L2224/13184 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/00014

摘要： An integrated circuit has metal bumps on the top surface that create a potentially destructive stress on the underlying layers when the metal bumps are formed. Ensuring a minimum metal concentration in the underlying metal interconnect layers has been implemented to reduce the destructive effect. The minimum metal concentration is highest in the corners, next along the border not in the corner, and next is the interior. The regions in an interconnect layer generally under the metal bump require more concentration than adjacent regions not under a bump. Lesser concentration is required for the metal interconnect layers that are further from the surface of the integrated circuit. The desired metal concentration is achieved by first trying a relatively simple solution. If that is not effective, different approaches are attempted until the minimum concentration is reached or until the last approach has been attempted.

摘要翻译： 集成电路在顶表面上具有金属凸块，当形成金属凸块时，在底层上产生潜在的破坏性应力。 确保底层金属互连层中的最小金属浓度得以实现，以减少破坏作用。 最低金属浓度在角落最高，接下来沿着边界不在拐角处，接下来是内部。 通常在金属凸块下方的互连层中的区域需要比不在凸块下方的相邻区域更多的浓度。 对于远离集成电路表面的金属互连层，需要较小的浓度。 所需的金属浓度通过首先尝试相对简单的解决方案实现。 如果没有效果，则尝试不同的方法，直到达到最小浓度，或直到最后一次尝试。

公开(公告)号：US09099475B2

公开(公告)日：2015-08-04

申请号：US13611076

申请日：2012-09-12

申请人： Michael B. McShane ,  Kevin J. Hess ,  Perry H. Pelley ,  Tab A. Stephens

发明人： Michael B. McShane ,  Kevin J. Hess ,  Perry H. Pelley ,  Tab A. Stephens

IPC分类号： H05K1/00 ,  H05K7/00 ,  G02B6/12 ,  H01L23/02 ,  H01L23/48 ,  G11C5/06 ,  H01L23/538 ,  H01L25/04 ,  H01L25/065 ,  H01L23/00

CPC分类号： H01L23/48 ,  H01L23/538 ,  H01L24/16 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L25/04 ,  H01L25/0657 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/24146 ,  H01L2224/245 ,  H01L2224/2518 ,  H01L2224/32135 ,  H01L2224/73217 ,  H01L2224/73259 ,  H01L2224/8203 ,  H01L2224/82101 ,  H01L2224/83 ,  H01L2224/9202 ,  H01L2224/92144 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/01013 ,  H01L2224/81 ,  H01L2924/014

摘要： An electronic assembly includes a processor die assembly, a first die assembly, and a second die assembly. The first die assembly is positioned on a first side of the processor die assembly. The second die assembly is positioned on a second side of the processor die assembly opposite the first side of the processor die assembly. Through-die vias couple the first and second die assemblies to the processor die assembly.

摘要翻译： 电子组件包括处理器模具组件，第一模具组件和第二模具组件。 第一模具组件定位在处理器模具组件的第一侧上。 第二模具组件位于处理器模具组件的与处理器模具组件的第一侧相对的第二侧。 通孔将第一和第二模具组件耦合到处理器模具组件。