-
公开(公告)号：US08158489B2
公开(公告)日：2012-04-17
申请号：US12751512
申请日：2010-03-31
申请人： Hon-Lin Huang , Ching-Wen Hsiao , Kuo-Ching Hsu , Chen-Shien Chen
发明人： Hon-Lin Huang , Ching-Wen Hsiao , Kuo-Ching Hsu , Chen-Shien Chen
IPC分类号： H01L21/30
CPC分类号： H01L23/544 , H01L21/6836 , H01L23/481 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/81 , H01L25/0657 , H01L2221/6834 , H01L2221/68372 , H01L2223/54453 , H01L2223/54493 , H01L2224/05001 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05025 , H01L2224/05026 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05184 , H01L2224/0557 , H01L2224/05571 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/11002 , H01L2224/1147 , H01L2224/11901 , H01L2224/13007 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/131 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13184 , H01L2224/81193 , H01L2224/81801 , H01L2225/06513 , H01L2225/06541 , H01L2924/00013 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/3511 , H01L2924/00014 , H01L2224/13099 , H01L2924/013
摘要： An integrated circuit structure includes a semiconductor wafer, which includes a first notch extending from an edge of the semiconductor wafer into the semiconductor wafer. A carrier wafer is mounted onto the semiconductor wafer. The carrier wafer has a second notch overlapping at least a portion of the first notch. A side of the carrier wafer facing the semiconductor wafer forms a sharp angle with an edge of the carrier wafer. The carrier wafer has a resistivity lower than about 1×108 Ohm-cm.
摘要翻译： 集成电路结构包括半导体晶片，其包括从半导体晶片的边缘延伸到半导体晶片的第一凹口。 载体晶片安装在半导体晶片上。 载体晶片具有与第一凹口的至少一部分重叠的第二切口。 面向半导体晶片的载体晶片的一侧与载体晶片的边缘形成锐角。 载体晶片的电阻率低于约1×108欧姆 - 厘米。
-
公开(公告)号：US20100330798A1
公开(公告)日：2010-12-30
申请号：US12751512
申请日：2010-03-31
申请人： Hon-Lin Huang , Ching-Wen Hsiao , Kuo-Ching Hsu , Chen-Shien Chen
发明人： Hon-Lin Huang , Ching-Wen Hsiao , Kuo-Ching Hsu , Chen-Shien Chen
IPC分类号： H01L21/768 , H01L21/77
CPC分类号： H01L23/544 , H01L21/6836 , H01L23/481 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/81 , H01L25/0657 , H01L2221/6834 , H01L2221/68372 , H01L2223/54453 , H01L2223/54493 , H01L2224/05001 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05025 , H01L2224/05026 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05184 , H01L2224/0557 , H01L2224/05571 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/11002 , H01L2224/1147 , H01L2224/11901 , H01L2224/13007 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/131 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13184 , H01L2224/81193 , H01L2224/81801 , H01L2225/06513 , H01L2225/06541 , H01L2924/00013 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/3511 , H01L2924/00014 , H01L2224/13099 , H01L2924/013
摘要： An integrated circuit structure includes a semiconductor wafer, which includes a first notch extending from an edge of the semiconductor wafer into the semiconductor wafer. A carrier wafer is mounted onto the semiconductor wafer. The carrier wafer has a second notch overlapping at least a portion of the first notch. A side of the carrier wafer facing the semiconductor wafer forms a sharp angle with an edge of the carrier wafer. The carrier wafer has a resistivity lower than about 1×108 Ohm-cm.
摘要翻译： 集成电路结构包括半导体晶片，其包括从半导体晶片的边缘延伸到半导体晶片的第一凹口。 载体晶片安装在半导体晶片上。 载体晶片具有与第一凹口的至少一部分重叠的第二切口。 面向半导体晶片的载体晶片的一侧与载体晶片的边缘形成锐角。 载体晶片的电阻率低于约1×108欧姆 - 厘米。
-
公开(公告)号：US20100102453A1
公开(公告)日：2010-04-29
申请号：US12259879
申请日：2008-10-28
申请人： Ming-Hong Tseng , Kai-Ming Ching , Chen-Shien Chen , Ching-Wen Hsiao , Hon-Lin Huang , Tsung-Ding Wang
发明人： Ming-Hong Tseng , Kai-Ming Ching , Chen-Shien Chen , Ching-Wen Hsiao , Hon-Lin Huang , Tsung-Ding Wang
IPC分类号： H01L23/52
CPC分类号： H01L25/0657 , H01L21/76898 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L25/50 , H01L2224/05001 , H01L2224/05022 , H01L2224/05568 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555 , H01L2924/01019 , H01L2924/01322 , H01L2924/01327 , H01L2924/15311 , H01L2924/00
摘要： A system, a structure and a method of manufacturing stacked semiconductor substrates is presented. A first substrate includes a first side and a second side. A through substrate via (TSV) protrudes from the first side of the first substrate. A first protruding portion of the TSV has a conductive protective coating and a second protruding portion of the TSV has an isolation liner. The system further includes a second substrate and a joint interface structure that bonds the second substrate to the first substrate at the conductive protective coating of the first protruding portion of the TSV.
摘要翻译： 提出了一种制造叠层半导体衬底的系统，结构和方法。 第一基板包括第一侧和第二侧。 贯穿基板通孔（TSV）从第一基板的第一侧突出。 TSV的第一突出部分具有导电保护涂层，并且TSV的第二突出部分具有隔离衬垫。 该系统还包括在TSV的第一突出部分的导电保护涂层处将第二衬底与第一衬底结合的第二衬底和接合界面结构。
-
44.发明授权公开(公告)号：US08653626B2
公开(公告)日：2014-02-18
申请号：US13551676
申请日：2012-07-18
申请人： Sut-I Lo , Ching-Wen Hsiao , Hsu-Hsien Chen , Chen-Shien Chen
发明人： Sut-I Lo , Ching-Wen Hsiao , Hsu-Hsien Chen , Chen-Shien Chen
CPC分类号： H01L21/56 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L23/642 , H01L24/19 , H01L24/20 , H01L25/105 , H01L28/40 , H01L28/60 , H01L2224/12105 , H01L2224/2413 , H01L2224/73267 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/00
摘要： A package includes a die, an encapsulant, and a capacitor. The package has a package first side and a package second side. The die has a die first side corresponding to the package first side, and has a die second side corresponding to the package second side. The die first side is opposite the die second side. The encapsulant surrounds the die. The capacitor includes a first plate and a second plate in the encapsulant, and opposing surfaces of the first plate and the second plate extend in a direction from the package first side to the package second side. The external conductive connectors are attached to at least one of the package first side and the package second side.
摘要翻译： 封装包括管芯，密封剂和电容器。 包装具有包装第一侧和包装第二侧。 模具具有对应于封装第一侧的管芯第一侧，并且具有对应于封装第二侧的管芯第二侧。 模具第一面与模具第二面相对。 密封剂围绕模具。 电容器包括密封剂中的第一板和第二板，并且第一板和第二板的相对表面沿着从封装第一侧至封装第二侧的方向延伸。 外部导电连接器附接到封装第一侧和封装第二侧中的至少一个。
-
公开(公告)号：US08624360B2
公开(公告)日：2014-01-07
申请号：US12616562
申请日：2009-11-11
CPC分类号： H01L25/0657 , H01L23/46 , H01L23/473 , H01L23/481 , H01L23/49811 , H01L23/49827 , H01L23/49894 , H01L23/5226 , H01L24/82 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/131 , H01L2224/13147 , H01L2225/06513 , H01L2225/06527 , H01L2225/06544 , H01L2225/06589 , H01L2924/00014 , H01L2924/0002 , H01L2924/14 , H01L2924/014 , H01L2224/05552 , H01L2924/00
摘要： An integrated circuit structure includes a die including a semiconductor substrate; dielectric layers over the semiconductor substrate; an interconnect structure including metal lines and vias in the dielectric layers; a plurality of channels extending from inside the semiconductor substrate to inside the dielectric layers; and a dielectric film over the interconnect structure and sealing portions of the plurality of channels. The plurality of channels is configured to allow a fluid to flow through.
摘要翻译： 集成电路结构包括：具有半导体衬底的裸片; 半导体衬底上的电介质层; 包括电介质层中的金属线和通孔的互连结构; 从所述半导体衬底的内部延伸到所述电介质层的内部的多个沟道; 以及在所述多个通道的互连结构和密封部分上的电介质膜。 多个通道被配置成允许流体流过。
-
公开(公告)号：US20130182402A1
公开(公告)日：2013-07-18
申请号：US13352937
申请日：2012-01-18
申请人： Chih-Hua Chen , Chen-Shien Chen , Ching-Wen Hsiao
发明人： Chih-Hua Chen , Chen-Shien Chen , Ching-Wen Hsiao
IPC分类号： H05K7/04
CPC分类号： H05K7/1061 , H01L21/568 , H01L21/6835 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5389 , H01L24/19 , H01L25/0657 , H01L25/105 , H01L2221/68327 , H01L2221/6834 , H01L2221/68363 , H01L2221/68381 , H01L2224/12105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/73267 , H01L2224/9202 , H01L2224/9222 , H01L2225/06513 , H01L2225/06541 , H01L2225/06565 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H01L2924/00
摘要： A device includes a Through-Assembly Via (TAV) Module, which includes a substrate, a plurality of through-vias penetrating through the substrate, and a second plurality of metal posts at a bottom surface of the TAV module and electrically coupled to the plurality of through-vias. A polymer includes a first portion between and contacting sidewalls of the first package component and the TAV module, a second portion disposed between the first plurality of metal posts, and a third portion disposed between the second plurality of metal posts. A first plurality of Redistribution Lines (RDLs) is underlying a bottom surface of the second and the third portions of the polymer. A second plurality of RDLs is over the first package component and the TAV module. The first plurality of RDLs is electrically coupled to the second plurality of RDLs through the plurality of through-vias in the TAV module.
摘要翻译： 一种装置包括一个直通组件通孔（TAV）模块，该组件通孔（TAV）模块包括一个衬底，穿过该衬底的多个贯通孔，以及在该TAV模块的底部表面上的第二个多个金属柱， 的通孔。 聚合物包括在第一包装部件和TAV模块之间和接触侧壁之间的第一部分和设置在第一多个金属柱之间的第二部分和设置在第二多个金属柱之间的第三部分。 第一多个再分配线（RDL）位于聚合物的第二和第三部分的底表面下方。 第二组多个RDL在第一封装组件和TAV模块之上。 第一组多个RDL通过TAV模块中的多个通孔电耦合到第二多个RDL。
-
公开(公告)号：US20130181325A1
公开(公告)日：2013-07-18
申请号：US13352093
申请日：2012-01-17
申请人： Chih-Hua Chen , Chen-Shien Chen , Ching-Wen Hsiao
发明人： Chih-Hua Chen , Chen-Shien Chen , Ching-Wen Hsiao
CPC分类号： H01L21/7687 , H01L21/486 , H01L21/76898 , H01L21/78 , H01L23/147 , H01L23/15 , H01L23/481 , H01L23/49827 , H01L2224/06181 , H01L2924/0002 , H01L2924/00
摘要： A discrete Through-Assembly Via (TAV) module includes a substrate, and vias extending from a surface of the substrate into the substrate. The TAV module is free from conductive features in contact with one end of each of the conductive vias.
-
48.发明授权公开(公告)号：US08318596B2
公开(公告)日：2012-11-27
申请号：US12704183
申请日：2010-02-11
申请人： Tin-Hao Kuo , Chen-Shien Chen , Ching-Wen Hsiao
发明人： Tin-Hao Kuo , Chen-Shien Chen , Ching-Wen Hsiao
IPC分类号： H01L21/44
CPC分类号： H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0345 , H01L2224/03452 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05572 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/13016 , H01L2224/13018 , H01L2224/13022 , H01L2224/13076 , H01L2224/1308 , H01L2224/13084 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/16507 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552 , H01L2924/00
摘要： A conductive pillar for a semiconductor device is provided. The conductive pillar is formed such that a top surface is non-planar. In embodiments, the top surface may be concave, convex, or wave shaped. An optional capping layer may be formed over the conductive pillar to allow for a stronger inter-metallic compound (IMC) layer. The IMC layer is a layer formed between solder material and an underlying layer, such as the conductive pillar or the optional capping layer.
摘要翻译： 提供了一种用于半导体器件的导电柱。 导电柱形成为使得顶表面是非平坦的。 在实施例中，顶表面可以是凹形，凸形或波浪状。 可以在导电柱上形成可选的覆盖层，以允许更强的金属间化合物（IMC）层。 IMC层是在焊料材料和下层之间形成的层，例如导电柱或可选的封盖层。
-
公开(公告)号：US20110227216A1
公开(公告)日：2011-09-22
申请号：US12725322
申请日：2010-03-16
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H01L24/11 , H01L24/05 , H01L24/13 , H01L2224/03912 , H01L2224/0401 , H01L2224/04042 , H01L2224/05022 , H01L2224/05083 , H01L2224/05184 , H01L2224/05541 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05647 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13022 , H01L2224/1308 , H01L2224/13083 , H01L2224/13111 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/45144 , H01L2224/48624 , H01L2224/48639 , H01L2224/48647 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2224/05005
摘要： An under-bump metallization (UBM) structure for a semiconductor device is provided. A passivation layer is formed over a contact pad such that at least a portion of the contact pad is exposed. A protective layer, such as a polyimide layer, may be formed over the passivation layer. The UBM structure, such as a conductive pillar, is formed over the underlying contact pad such that the underlying contact pad extends laterally past the UBM structure by a distance large enough to prevent or reduce cracking of the passivation layer and or protective layer.
摘要翻译： 提供了一种用于半导体器件的凸块下金属化（UBM）结构。 钝化层形成在接触焊盘上，使得接触焊盘的至少一部分被暴露。 可以在钝化层上方形成保护层，例如聚酰亚胺层。 诸如导电柱的UBM结构形成在下面的接触焊盘之上，使得下面的接触焊盘横向延伸越过UBM结构一个足够大的距离，以防止或减少钝化层和/或保护层的破裂。
-
公开(公告)号：US20110193227A1
公开(公告)日：2011-08-11
申请号：US12729021
申请日：2010-03-22
IPC分类号： H01L23/488 , H01L21/60 , H01L23/31
CPC分类号： H01L23/49816 , H01L23/49811 , H01L23/49866 , H01L24/13 , H01L24/16 , H01L2224/1308 , H01L2224/13083 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13157 , H01L2224/13164 , H01L2224/13169 , H01L2224/16225 , H01L2224/16227 , H01L2224/73204 , H01L2924/00013 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01043 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/10329 , H01L2924/14 , H01L2924/15787 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/01027 , H01L2924/01083 , H01L2924/01015 , H01L2224/13099 , H01L2924/00
摘要： Apparatus and methods for providing a robust solder connection in a flip chip arrangement using lead free solder are disclosed. A copper column extends from an input/output terminal of an integrated circuit. A cap layer of a material comprising one of nickel, nickel alloys, palladium, platinum, cobalt, silver, gold, and alloys of these is formed on the exterior surface of the copper column. A lead free solder connector is disposed on the cap layer. A substrate having a metal finish solder pad is aligned with the solder connector. A thermal reflow is performed. The metal finish may be of nickel, nickel alloy and nickel based materials. Following a thermal reflow, the solder connection formed between the copper terminal column and the metal finish solder pad is less than 0.5 wt. %.
摘要翻译： 公开了使用无铅焊料在倒装芯片布置中提供坚固的焊接连接的装置和方法。 铜列从集成电路的输入/输出端子延伸。 包含镍，镍合金，钯，铂，钴，银，金及其合金的材料的盖层形成在铜柱的外表面上。 无铅焊料连接器设置在盖层上。 具有金属整理剂焊盘的基板与焊料连接器对准。 进行热回流。 金属表面可以是镍，镍合金和镍基材料。 在热回流之后，形成在铜端子柱和金属表面焊料焊盘之间的焊接连接小于0.5wt。 ％。
-
-
-
-
-
-
-
-
-
搜索结果
83 条记录 (耗时 0.028 秒)
