公开(公告)号：US08208266B2

公开(公告)日：2012-06-26

申请号：US12119800

申请日：2008-05-13

Applicant: Gheorghe Korony

Inventor： Gheorghe Korony

IPC: H05K1/16 ,  H05K3/00

CPC classification number: H01P1/20 ,  H01L2224/48091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/16 ,  H05K3/0052 ,  H05K3/403 ,  H05K2201/0317 ,  H05K2201/09154 ,  H05K2201/10045 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Shaped integrated passive devices and corresponding methodologies relate to construction and mounting of shaped passive devices on substrates so as to provide both mechanical and electrical connection. Certain components and component assemblies are associated with the implementation of surface mountable devices. Specially shaped integrated passive device are capable of providing simplified mounting on and simultaneous connection to selected electrical pathways on a printed circuit board or other mounting substrate. Shaped, plated side filter devices have plated sides which provide both mounting and grounding/power coupling functions. Thin film filters may be constructed on silicon wafers, which are then diced from the top surface with an angular dicing saw to produce a shaped groove in the top surface. The groove may be v-shaped or other shape, and is then plated with a conductive material. Individual pieces are separated by grinding the back surface of the wafer down to where the grooves are intercepted. The plated grooves serve as ground or power connection points for the filter circuit. The metallized slopes of the plated grooves are used in securing the individual pieces to a mounting surface, by soldering or using conductive epoxy.

Abstract translation: 形状的集成无源器件和相应的方法涉及在基底上的成形无源器件的结构和安装，以便提供机械和电连接。 某些组件和组件组件与表面可安装设备的实现相关联。 特殊形状的集成无源器件能够简化安装在印刷电路板或其他安装基板上的选定电路上并同时连接。 成型的电镀侧过滤器装置具有电镀侧面，其提供安装和接地/电力耦合功能。 薄膜过滤器可以构造在硅晶片上，然后用角切割锯从顶表面切割，以在顶表面中产生成形凹槽。 凹槽可以是v形或其他形状，然后用导电材料镀覆。 通过将晶片的后表面向下研磨到凹槽被截取的地方分开各个片段。 电镀槽用作滤波电路的接地或电源连接点。 电镀槽的金属化斜坡用于通过焊接或使用导电环氧树脂将各个片固定到安装表面。

公开(公告)号：US20100323479A1

公开(公告)日：2010-12-23

申请号：US12868422

申请日：2010-08-25

Applicant: Erich Syri ,  Gerold Gruendler ,  Juergen Hoegerl ,  Thomas Killer ,  Volker Strutz

Inventor： Erich Syri ,  Gerold Gruendler ,  Juergen Hoegerl ,  Thomas Killer ,  Volker Strutz

IPC: H01L21/56

CPC classification number: H01L25/165 ,  H01L21/563 ,  H01L23/293 ,  H01L2224/73203 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/10045 ,  H05K2201/10977 ,  Y02P70/613

Abstract: A semiconductor component including: a substrate, at least one semiconductor chip arranged on the substrate and at least one passive device likewise arranged on the substrate. The passive device is mounted with its underside on the substrate. The semiconductor component further includes an interspace disposed between the underside of the passive device and the substrate. The interspace is filled with an underfilling material. In order to avoid the solder pumping effect, the upper side and the lateral sides of the passive device are also embedded in a plastic compound.

Abstract translation: 一种半导体部件，包括：衬底，布置在衬底上的至少一个半导体芯片和同样布置在衬底上的至少一个无源器件。 无源器件的底面安装在基板上。 半导体部件还包括设置在无源器件的下侧和衬底之间的间隙。 该间隙填充有底部填充材料。 为了避免焊料泵送效应，无源器件的上侧和侧面也嵌入塑料化合物中。

公开(公告)号：US07804178B2

公开(公告)日：2010-09-28

申请号：US11748135

申请日：2007-05-14

Applicant: Erich Syri ,  Gerold Gruendler ,  Juergen Hoegerl ,  Thomas Killer ,  Volker Strutz

Inventor： Erich Syri ,  Gerold Gruendler ,  Juergen Hoegerl ,  Thomas Killer ,  Volker Strutz

IPC: H01L23/02 ,  H01L29/40

CPC classification number: H01L25/165 ,  H01L21/563 ,  H01L23/293 ,  H01L2224/73203 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/10045 ,  H05K2201/10977 ,  Y02P70/613

Abstract: A semiconductor component including: a substrate, at least one semiconductor chip arranged on the substrate and at least one passive device likewise arranged on the substrate. The passive device is mounted with its underside on the substrate. The semiconductor component further includes an interspace disposed between the underside of the passive device and the substrate. The interspace is filled with an underfilling material. In order to avoid the solder pumping effect, the upper side and the lateral sides of the passive device are also embedded in a plastic compound.

Abstract translation: 一种半导体部件，包括：衬底，布置在衬底上的至少一个半导体芯片和同样布置在衬底上的至少一个无源器件。 无源器件的底面安装在基板上。 半导体部件还包括设置在无源器件的下侧和衬底之间的间隙。 该间隙填充有底部填充材料。 为了避免焊料泵送效应，无源器件的上侧和侧面也嵌入塑料化合物中。

公开(公告)号：US20090189269A1

公开(公告)日：2009-07-30

申请号：US12019413

申请日：2008-01-24

Applicant: Lap-Wai Lydia Leung ,  Chang Hwa Chung ,  Jie Liu ,  Chi Kuen Leung ,  Chiu Lun Chan

Inventor： Lap-Wai Lydia Leung ,  Chang Hwa Chung ,  Jie Liu ,  Chi Kuen Leung ,  Chiu Lun Chan

IPC: H05K1/00 ,  H01L23/48

CPC classification number: H05K1/0243 ,  H01L23/3121 ,  H01L23/5387 ,  H01L23/66 ,  H01L24/28 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/48195 ,  H01L2924/00014 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K1/189 ,  H05K3/284 ,  H05K2201/10045 ,  H05K2201/1006 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A electronic circuit package having a flexible substrate with metals layers on one or more of its surfaces forming a wiring pattern and/or surface mount bonding pads. Passive electronic components are integrated onto component packages that are mounted to the flexible substrate and electrically connected with the wiring pattern or bonding pad. An active electronic device is mounted on the flexible substrate or bonding pad.

Abstract translation: 一种电子电路封装，其具有在其一个或多个表面上具有金属层的柔性基板，形成布线图案和/或表面贴装焊盘。 无源电子部件被集成到组件封装上，其安装到柔性衬底并与布线图案或焊盘电连接。 有源电子器件安装在柔性基底或接合垫上。

公开(公告)号：US20080246157A1

公开(公告)日：2008-10-09

申请号：US11732543

申请日：2007-04-03

Applicant: Qiang Richard Chen

Inventor： Qiang Richard Chen

IPC: H01L23/482 ,  H01L21/60

CPC classification number: H05K3/3442 ,  H01L27/016 ,  H01L27/13 ,  H05K1/16 ,  H05K3/366 ,  H05K3/403 ,  H05K2201/0317 ,  H05K2201/09954 ,  H05K2201/10045 ,  Y02P70/613

Abstract: A device according to various aspects of the present invention generally includes a surface mount device having a top side, a bottom side, a plurality of sidewalls, and a circuit comprising one or more layers. The device includes a first conductive surface covering a portion of one of the sidewalls for providing an input to the circuit, a second conductive surface covering a portion of one of the sidewalls for providing an output from the circuit, and a third conductive surface covering a portion of one of the sidewalls for providing an electrical ground to the circuit. When the surface mount device is mounted to a provided mounting surface, at least one layer of the circuit is orthogonal to the provided mounting surface.

Abstract translation: 根据本发明的各个方面的装置通常包括具有顶侧，底侧，多个侧壁和包括一个或多个层的电路的表面安装装置。 所述装置包括覆盖所述侧壁之一的一部分以提供所述电路的输入的第一导电表面，覆盖所述侧壁之一的一部分以提供来自所述电路的输出的第二导电表面，以及覆盖所述侧壁的第三导电表面 所述侧壁之一的一部分用于向所述电路提供电接地。 当表面安装装置安装到所提供的安装表面时，电路的至少一层与所提供的安装表面正交。

公开(公告)号：US20060017133A1

公开(公告)日：2006-01-26

申请号：US11188723

申请日：2005-07-26

Applicant: Kiyoshi Oi ,  Yasuyoshi Horikawa ,  Akihito Takano

Inventor： Kiyoshi Oi ,  Yasuyoshi Horikawa ,  Akihito Takano

IPC: H01L29/00

CPC classification number: H05K1/185 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/18 ,  H01L24/82 ,  H01L2224/18 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/141 ,  H05K1/16 ,  H05K3/20 ,  H05K3/4602 ,  H05K2201/0317 ,  H05K2201/10045 ,  H05K2203/016

Abstract: An electronic part-containing element used by being incorporated in an electronic device, in which the electronic part-containing element comprises an insulating support member which does not take part in the constitution of the electronic device but is removed in the process of producing the electronic device, and a circuit module supported by the support member, and the circuit module contains one or more electronic parts, each in the form of a thin film, therein and has connection terminals for the electronic part at least on the surface thereof that comes into contact with the support member.

Abstract translation: 一种电子部件容纳元件，其通过结合在电子装置中而被使用，其中所述电子部件容纳元件包括绝缘支撑构件，所述绝缘支撑构件不参与所述电子装置的构造，但在制造所述电子装置的过程中被去除 装置和由支撑构件支撑的电路模块，并且电路模块包含一个或多个薄膜形式的电子部件，其中至少在其表面上具有用于电子部件的连接端子 与支撑构件接触。

公开(公告)号：US06946733B2

公开(公告)日：2005-09-20

申请号：US10640073

申请日：2003-08-13

Applicant: David Poole ,  Terry R. Bloom ,  Richard Cooper

Inventor： David Poole ,  Terry R. Bloom ,  Richard Cooper

IPC: H01C1/14 ,  H05K1/02 ,  H05K1/14 ,  H05K1/16 ,  H05K3/28 ,  H05K3/34 ,  H01L23/48

CPC classification number: H05K1/0268 ,  H01C1/14 ,  H05K1/141 ,  H05K1/167 ,  H05K3/28 ,  H05K3/3436 ,  H05K2201/10045

Abstract: A ball grid array package that can be readily tested before or after mounting to a printed circuit board. The ball grid array includes a substrate having a top surface and a bottom surface. Several conductive pads are located on the top surface. Several passive circuit elements are located on the top surface between the conductive pads. An insulative coating is placed on top of the passive circuit elements and the substrate. The insulative coating has openings over the conductive pads. The openings are adapted to be accessible by an electrical probe. Conductive vias extend through the substrate between the top and bottom surfaces. The vias electrically connect with the conductive pad on the top surface. Several conductive balls are located on the bottom surface. Each conductive ball is electrically connected to one of the vias.

Abstract translation: 一种球栅阵列封装，可在安装到印刷电路板之前或之后轻松测试。 球栅阵列包括具有顶表面和底表面的基底。 几个导电垫位于顶部表面。 几个无源电路元件位于导电焊盘之间的顶表面上。 绝缘涂层放置在无源电路元件和基板的顶部。 绝缘涂层在导电焊盘上有开口。 这些开口适于通过电探针来接近。 导电通孔在顶表面和底表面之间延伸通过基底。 通孔与顶表面上的导电垫电连接。 几个导电球位于底面。 每个导电球电连接到一个通孔。

公开(公告)号：US06476695B1

公开(公告)日：2002-11-05

申请号：US09578691

申请日：2000-05-26

Applicant: Masumi Nakamichi

Inventor： Masumi Nakamichi

IPC: H01P308

CPC classification number: H05K1/167 ,  H05K1/0237 ,  H05K1/162 ,  H05K1/165 ,  H05K3/4614 ,  H05K3/4623 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/09763 ,  H05K2201/10045 ,  H05K2203/1461

Abstract: A high frequency module is provided with a resistor array layer with interconnections, in which a plurality of resistor elements having a prescribed resistance value are formed as an array, and in which an interconnection pattern for providing electrical connection to each resistor element is formed in advance. Additionally, a capacitor array layer with interconnection in which a plurality of capacitor elements having a prescribed capacitance value are formed as an array and an interconnection pattern for providing electrical connection to each capacitor element is also formed in advance for later use. A desired circuit constant is obtained by providing interconnections among the plurality of resistor elements and among the plurality of capacitor elements, respectively, in any given combination by simply modifying the respective interconnection patterns instead of the entire module. With this configuration, a high frequency module of a more compact and lighter type which facilitates design modification is provided at a low cost.

Abstract translation: 高频模块设置有具有互连的电阻器阵列层，其中具有规定电阻值的多个电阻元件形成为阵列，并且其中预先形成用于提供与每个电阻器元件的电连接的互连图案 。 此外，具有互连的电容器阵列层，其中具有规定的电容值的多个电容器元件形成为阵列，并且还预先形成用于提供与每个电容器元件的电连接的互连图案供稍后使用。 通过仅通过简单地修改相应的互连图案而不是整个模块，分别在多个电阻元件之间和多个电容器元件之间分别提供互连来获得期望的电路常数。 利用这种配置，以低成本提供了便于设计修改的更紧凑和更轻型的高频模块。

公开(公告)号：US06353540B1

公开(公告)日：2002-03-05

申请号：US08860181

申请日：1997-07-10

Applicant: Yutaka Akiba ,  Yasunori Narizuka ,  Hirayoshi Tanei ,  Naoya Kitamura

Inventor： Yutaka Akiba ,  Yasunori Narizuka ,  Hirayoshi Tanei ,  Naoya Kitamura

IPC: H05K116

CPC classification number: H05K1/0246 ,  H01L23/5383 ,  H01L23/552 ,  H01L25/16 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/16152 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0227 ,  H05K1/0231 ,  H05K1/0234 ,  H05K1/092 ,  H05K1/113 ,  H05K1/115 ,  H05K1/162 ,  H05K1/167 ,  H05K3/403 ,  H05K3/4053 ,  H05K3/429 ,  H05K3/4611 ,  H05K3/4614 ,  H05K3/4652 ,  H05K3/467 ,  H05K9/0039 ,  H05K2201/0209 ,  H05K2201/0715 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09354 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/09663 ,  H05K2201/0979 ,  H05K2201/10022 ,  H05K2201/10045 ,  H05K2201/10446 ,  H05K2201/10636 ,  H05K2201/10689 ,  Y02P70/611 ,  Y10T29/49155 ,  H01L2224/0401

Abstract: A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation off a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed. This invention can remarkably suppress unwanted radiation by absorbing the potential fluctuation (resonance) which occurs in a power supply loop by equivalently reducing the Q-value of the stray capacitance, absorbing the standing wave by the parallel plate lines matchedly terminated and, closing and shielding the parallel plate lines.

Abstract translation: 一种低EMI电路，其通过将电源层上的电位波动相对于在切换IC器件等而发生的接地层的电位变化转换为基底中的焦耳热，而不使用任何部件作为对策来实现高安装密度 针对EMI。 还公开了其结构，使用它的电路板以及制造电路板的方法。 从电源层和接地层观察的固体层之间的杂散电容的Q值的平行板线等效地减少，并且通过形成其中电阻器（电阻层）和另一接地层的结构匹配地终止 除了在多层电路板上的电源层和接地层之外提供。 还公开了封闭的屏蔽结构。 本发明通过吸收电源回路中发生的电位波动（谐振）可以显着地抑制不期望的辐射，通过等效地降低杂散电容的Q值，吸收平行板线匹配终止的驻波，闭合屏蔽 平行板线。

公开(公告)号：US20020021561A1

公开(公告)日：2002-02-21

申请号：US09892746

申请日：2001-06-28

Inventor： Hiroshi Yamauchi ,  Minoru Yamamoto

IPC: H05K007/06 ,  H05K001/16

CPC classification number: H05K3/3442 ,  H01C1/012 ,  H01G4/40 ,  H05K2201/10045 ,  H05K2201/10537 ,  Y02P70/613

Abstract: Three or more, or two or more types of electronic components are formed on one substrate, and these electronic components form an aggregated planar surface on a surface of the substrate to attain the above object.

Abstract translation: 在一个基板上形成三个以上或两个以上的电子部件，这些电子部件在基板的表面上形成聚集的平面，以达到上述目的。