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    Semiconductor package structure
    55.
    发明授权
    Semiconductor package structure 有权

    公开(公告)号：US11670596B2

    公开(公告)日：2023-06-06

    申请号：US17208175

    申请日：2021-03-22

    Applicant: MEDIATEK INC.

    Inventor： Yi-Lin Tsai ,  Wen-Sung Hsu ,  I-Hsuan Peng ,  Yi-Jou Lin

    IPC: H01L23/538 ,  H01L23/498 ,  H01L23/00

    CPC classification number: H01L23/5381 ,  H01L23/49816 ,  H01L24/20 ,  H01L24/73 ,  H01L2224/224 ,  H01L2224/73104

    Abstract: A semiconductor package structure includes a substrate, a first redistribution layer, a second redistribution layer, a bridge structure, a first semiconductor component, and a second semiconductor component. The first redistribution layer is over the substrate. The second redistribution layer is over the first redistribution layer. The bridge structure is between the first redistribution layer and the second redistribution layer, wherein the bridge structure includes an active device. The first semiconductor component and the second semiconductor component are located over the second redistribution layer, wherein the first semiconductor component is electrically coupled to the second semiconductor component through the second redistribution layer and the bridge structure.

    CHIP SCALE PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
    56.
    发明申请
    CHIP SCALE PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME 有权

    公开(公告)号：US20230073399A1

    公开(公告)日：2023-03-09

    申请号：US17989498

    申请日：2022-11-17

    Applicant: MediaTek Inc.

    Inventor： Yen-Yao Chi ,  Nai-Wei Liu ,  Ta-Jen Yu ,  Tzu-Hung Lin ,  Wen-Sung Hsu ,  Shih-Chin Lin

    IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L23/29

    Abstract: A semiconductor package structure includes a semiconductor die, a redistribution layer (RDL) structure, a protective insulating layer, and a conductive structure. The semiconductor die has a first surface, a second surface opposite the first surface, and a third surface adjoined between the first surface and the second surface. The RDL structure is on the first surface of the semiconductor die and is electrically coupled to the semiconductor die. The protective insulating layer covers the RDL structure, the second surface and the third surface of the semiconductor die. The conductive structure passes through the protective insulating layer and is electrically coupled to the RDL structure.

    SEMICONDUCTOR PACKAGE USING FLIP-CHIP TECHNOLOGY
    57.
    发明申请
    SEMICONDUCTOR PACKAGE USING FLIP-CHIP TECHNOLOGY 有权

    公开(公告)号：US20210202425A1

    公开(公告)日：2021-07-01

    申请号：US17199237

    申请日：2021-03-11

    Applicant: MediaTek Inc.

    Inventor： Che-Ya Chou ,  Wen-Sung Hsu ,  Nan-Cheng Chen

    IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/367 ,  H01L25/065 ,  H05K1/11

    Abstract: A semiconductor package is provided. The semiconductor package includes a semiconductor device bonded to a base through a first conductive structure. The semiconductor device includes a carrier substrate including a conductive trace. A portion of the conductive trace is elongated. The semiconductor device also includes a second conductive structure above the carrier substrate. A portion of the second conductive structure is in contact with the portion of the conductive trace. The semiconductor device further includes a semiconductor body mounted above the conductive trace. The semiconductor body is connected to the second conductive structure.

    Structure and formation method of chip package structure
    58.
    发明授权
    Structure and formation method of chip package structure 有权

    公开(公告)号：US10354974B2

    公开(公告)日：2019-07-16

    申请号：US14736684

    申请日：2015-06-11

    Applicant: MediaTek Inc.

    Inventor： Wen-Sung Hsu ,  Shih-Chin Lin ,  Andrew C. Chang ,  Tao Cheng

    IPC: H01L25/065 ,  H01L23/498 ,  H01L23/528 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00

    Abstract: A chip package structure and a method for forming a chip package are provided. The chip package structure includes a first package which includes at least a semiconductor die, a dielectric structure surrounding the semiconductor die, and a plurality of conductive structures penetrating through the dielectric structure and surrounding the semiconductor die. The package structure also includes an interposer substrate over the first package and a plurality of conductive features in or over the interposer substrate. The package structure further includes a second package over the interposer substrate, and the first package electrically couples the second package through the conductive structures and the conductive features.

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